| Masahiro Yamada | bb2ff9d | 2014-10-03 19:21:06 +0900 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2011-2014 Panasonic Corporation |
| 3 | * |
| 4 | * SPDX-License-Identifier: GPL-2.0+ |
| 5 | */ |
| 6 | |
| 7 | #include <common.h> |
| 8 | #include <asm/io.h> |
| Masahiro Yamada | 95387e2 | 2015-02-27 02:26:44 +0900 | [diff] [blame^] | 9 | #include <mach/sg-regs.h> |
| Masahiro Yamada | bb2ff9d | 2014-10-03 19:21:06 +0900 | [diff] [blame] | 10 | |
| 11 | void pin_init(void) |
| 12 | { |
| 13 | u32 tmp; |
| 14 | |
| 15 | /* Comment format: PAD Name -> Function Name */ |
| 16 | |
| 17 | #ifdef CONFIG_UNIPHIER_SERIAL |
| 18 | sg_set_pinsel(85, 1); /* HSDOUT3 -> RXD0 */ |
| 19 | sg_set_pinsel(88, 1); /* HDDOUT6 -> TXD0 */ |
| 20 | |
| 21 | sg_set_pinsel(69, 23); /* PCIOWR -> TXD1 */ |
| 22 | sg_set_pinsel(70, 23); /* PCIORD -> RXD1 */ |
| 23 | |
| 24 | sg_set_pinsel(128, 13); /* XIRQ6 -> TXD2 */ |
| 25 | sg_set_pinsel(129, 13); /* XIRQ7 -> RXD2 */ |
| 26 | |
| 27 | sg_set_pinsel(110, 1); /* SBO0 -> TXD3 */ |
| 28 | sg_set_pinsel(111, 1); /* SBI0 -> RXD3 */ |
| 29 | #endif |
| 30 | |
| 31 | #ifdef CONFIG_NAND_DENALI |
| 32 | sg_set_pinsel(158, 0); /* XNFRE -> XNFRE_GB */ |
| 33 | sg_set_pinsel(159, 0); /* XNFWE -> XNFWE_GB */ |
| 34 | sg_set_pinsel(160, 0); /* XFALE -> NFALE_GB */ |
| 35 | sg_set_pinsel(161, 0); /* XFCLE -> NFCLE_GB */ |
| 36 | sg_set_pinsel(162, 0); /* XNFWP -> XFNWP_GB */ |
| 37 | sg_set_pinsel(163, 0); /* XNFCE0 -> XNFCE0_GB */ |
| 38 | sg_set_pinsel(164, 0); /* NANDRYBY0 -> NANDRYBY0_GB */ |
| 39 | sg_set_pinsel(22, 0); /* MMCCLK -> XFNCE1_GB */ |
| 40 | sg_set_pinsel(23, 0); /* MMCCMD -> NANDRYBY1_GB */ |
| 41 | sg_set_pinsel(24, 0); /* MMCDAT0 -> NFD0_GB */ |
| 42 | sg_set_pinsel(25, 0); /* MMCDAT1 -> NFD1_GB */ |
| 43 | sg_set_pinsel(26, 0); /* MMCDAT2 -> NFD2_GB */ |
| 44 | sg_set_pinsel(27, 0); /* MMCDAT3 -> NFD3_GB */ |
| 45 | sg_set_pinsel(28, 0); /* MMCDAT4 -> NFD4_GB */ |
| 46 | sg_set_pinsel(29, 0); /* MMCDAT5 -> NFD5_GB */ |
| 47 | sg_set_pinsel(30, 0); /* MMCDAT6 -> NFD6_GB */ |
| 48 | sg_set_pinsel(31, 0); /* MMCDAT7 -> NFD7_GB */ |
| 49 | #endif |
| 50 | |
| 51 | #ifdef CONFIG_USB_EHCI_UNIPHIER |
| 52 | sg_set_pinsel(53, 0); /* USB0VBUS -> USB0VBUS */ |
| 53 | sg_set_pinsel(54, 0); /* USB0OD -> USB0OD */ |
| 54 | sg_set_pinsel(55, 0); /* USB1VBUS -> USB1VBUS */ |
| 55 | sg_set_pinsel(56, 0); /* USB1OD -> USB1OD */ |
| 56 | /* sg_set_pinsel(67, 23); */ /* PCOE -> USB2VBUS */ |
| 57 | /* sg_set_pinsel(68, 23); */ /* PCWAIT -> USB2OD */ |
| 58 | #endif |
| 59 | |
| 60 | tmp = readl(SG_IECTRL); |
| 61 | tmp |= 0x41; |
| 62 | writel(tmp, SG_IECTRL); |
| 63 | } |