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Peng Fanaeb9c062018-11-20 10:20:00 +00001/* SPDX-License-Identifier: GPL-2.0+ */
2/*
3 * Copyright 2018 NXP
4 */
5
6#ifndef __IMX8M_EVK_H
7#define __IMX8M_EVK_H
8
9#include <linux/sizes.h>
Simon Glassfb64e362020-05-10 11:40:09 -060010#include <linux/stringify.h>
Peng Fanaeb9c062018-11-20 10:20:00 +000011#include <asm/arch/imx-regs.h>
12
Peng Fan7be67ce2020-07-28 17:28:57 +080013#define CONFIG_SYS_BOOTM_LEN (32 * SZ_1M)
14
Peng Fanaeb9c062018-11-20 10:20:00 +000015#define CONFIG_SPL_MAX_SIZE (124 * 1024)
16#define CONFIG_SYS_MONITOR_LEN (512 * 1024)
17#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
18#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300
Peng Fanaeb9c062018-11-20 10:20:00 +000019
20#ifdef CONFIG_SPL_BUILD
21/*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/
Simon Glass1ba1d4e2021-07-10 21:14:28 -060022#define CONFIG_SPL_WATCHDOG
Simon Glass284cb9c2021-07-10 21:14:31 -060023#define CONFIG_SPL_DRIVERS_MISC
Simon Glasse91ac4c2021-07-10 21:14:24 -060024#define CONFIG_SPL_POWER
Simon Glassbccfc2e2021-07-10 21:14:36 -060025#define CONFIG_SPL_I2C
Peng Fanaeb9c062018-11-20 10:20:00 +000026#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv8/u-boot-spl.lds"
27#define CONFIG_SPL_STACK 0x187FF0
28#define CONFIG_SPL_LIBCOMMON_SUPPORT
29#define CONFIG_SPL_LIBGENERIC_SUPPORT
Simon Glass035939e2021-07-10 21:14:30 -060030#define CONFIG_SPL_GPIO
Peng Fanaeb9c062018-11-20 10:20:00 +000031#define CONFIG_SPL_MMC_SUPPORT
32#define CONFIG_SPL_BSS_START_ADDR 0x00180000
33#define CONFIG_SPL_BSS_MAX_SIZE 0x2000 /* 8 KB */
34#define CONFIG_SYS_SPL_MALLOC_START 0x42200000
35#define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 /* 512 KB */
36#define CONFIG_SYS_SPL_PTE_RAM_BASE 0x41580000
Peng Fanaeb9c062018-11-20 10:20:00 +000037
38/* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
39#define CONFIG_MALLOC_F_ADDR 0x182000
40/* For RAW image gives a error info not panic */
41#define CONFIG_SPL_ABORT_ON_RAW_IMAGE
42
43#undef CONFIG_DM_MMC
44#undef CONFIG_DM_PMIC
45#undef CONFIG_DM_PMIC_PFUZE100
46
Peng Fanaeb9c062018-11-20 10:20:00 +000047#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
48#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
49#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
50
51#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
52
53#define CONFIG_POWER
54#define CONFIG_POWER_I2C
55#define CONFIG_POWER_PFUZE100
56#define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08
57#endif
58
59#define CONFIG_REMAKE_ELF
60
Peng Fanaeb9c062018-11-20 10:20:00 +000061/* ENET Config */
62/* ENET1 */
63#if defined(CONFIG_CMD_NET)
Peng Fanaeb9c062018-11-20 10:20:00 +000064#define CONFIG_MII
65#define CONFIG_ETHPRIME "FEC"
66
67#define CONFIG_FEC_MXC
68#define CONFIG_FEC_XCV_TYPE RGMII
69#define CONFIG_FEC_MXC_PHYADDR 0
70#define FEC_QUIRK_ENET_MAC
71
72#define CONFIG_PHY_GIGE
73#define IMX_FEC_BASE 0x30BE0000
Peng Fanaeb9c062018-11-20 10:20:00 +000074#endif
75
Alice Guoa349b3b2021-01-14 16:23:23 +080076#ifndef CONFIG_SPL_BUILD
77#define BOOT_TARGET_DEVICES(func) \
78 func(MMC, mmc, 0) \
79 func(MMC, mmc, 1) \
80 func(DHCP, dhcp, na)
81
82#include <config_distro_bootcmd.h>
83#endif
84
Peng Fanaeb9c062018-11-20 10:20:00 +000085/* Initial environment variables */
86#define CONFIG_EXTRA_ENV_SETTINGS \
Alice Guoa349b3b2021-01-14 16:23:23 +080087 BOOTENV \
88 "scriptaddr=0x43500000\0" \
89 "kernel_addr_r=0x40880000\0" \
Peng Fanaeb9c062018-11-20 10:20:00 +000090 "image=Image\0" \
Fabio Estevam21b135a2019-12-11 14:31:03 -030091 "console=ttymxc0,115200\0" \
Peng Fanaeb9c062018-11-20 10:20:00 +000092 "fdt_addr=0x43000000\0" \
Peng Fanaeb9c062018-11-20 10:20:00 +000093 "boot_fdt=try\0" \
Patrick Wildt02548cf2019-10-14 13:19:00 +020094 "fdt_file=imx8mq-evk.dtb\0" \
Peng Fanaeb9c062018-11-20 10:20:00 +000095 "initrd_addr=0x43800000\0" \
Grygorii Tertychnyi4d7cbe52020-08-21 15:39:43 +020096 "bootm_size=0x10000000\0" \
Peng Fanaeb9c062018-11-20 10:20:00 +000097 "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
98 "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
Peng Fanaeb9c062018-11-20 10:20:00 +000099
100/* Link Definitions */
101#define CONFIG_LOADADDR 0x40480000
102
103#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
104
105#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
106#define CONFIG_SYS_INIT_RAM_SIZE 0x80000
107#define CONFIG_SYS_INIT_SP_OFFSET \
108 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
109#define CONFIG_SYS_INIT_SP_ADDR \
110 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
111
Peng Fanaeb9c062018-11-20 10:20:00 +0000112#define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */
113
114/* Size of malloc() pool */
115#define CONFIG_SYS_MALLOC_LEN ((CONFIG_ENV_SIZE + (2 * 1024)) * 1024)
116
117#define CONFIG_SYS_SDRAM_BASE 0x40000000
118#define PHYS_SDRAM 0x40000000
119#define PHYS_SDRAM_SIZE 0xC0000000 /* 3GB DDR */
120
Peng Fanaeb9c062018-11-20 10:20:00 +0000121#define CONFIG_MXC_UART_BASE UART1_BASE_ADDR
122
123/* Monitor Command Prompt */
124#undef CONFIG_SYS_PROMPT
125#define CONFIG_SYS_PROMPT "u-boot=> "
Peng Fanaeb9c062018-11-20 10:20:00 +0000126#define CONFIG_SYS_CBSIZE 1024
127#define CONFIG_SYS_MAXARGS 64
128#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
129#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
130 sizeof(CONFIG_SYS_PROMPT) + 16)
131
132#define CONFIG_IMX_BOOTAUX
133
Peng Fanaeb9c062018-11-20 10:20:00 +0000134#define CONFIG_SYS_FSL_USDHC_NUM 2
135#define CONFIG_SYS_FSL_ESDHC_ADDR 0
136
Peng Fanaeb9c062018-11-20 10:20:00 +0000137#define CONFIG_SYS_MMC_IMG_LOAD_PART 1
138
139#define CONFIG_MXC_GPIO
140
Peng Fanaeb9c062018-11-20 10:20:00 +0000141/* I2C Configs */
142#define CONFIG_SYS_I2C_SPEED 100000
143
144#define CONFIG_OF_SYSTEM_SETUP
145
146#ifndef CONFIG_SPL_BUILD
147#define CONFIG_DM_PMIC
148#endif
149
150#endif