blob: 3b17f75d209348197981e38dd2c7f937429096a8 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Dirk Eibachfb605942017-02-22 16:07:23 +01002/*
3 * Copyright (C) 2014 Stefan Roese <sr@denx.de>
4 * Copyright (C) 2016 Mario Six <mario.six@gdsys.cc>
Dirk Eibachfb605942017-02-22 16:07:23 +01005 */
6
7#ifndef _CONFIG_CONTROLCENTERDC_H
8#define _CONFIG_CONTROLCENTERDC_H
9
10/*
11 * High Level Configuration Options (easy to change)
12 */
13#define CONFIG_CUSTOMER_BOARD_SUPPORT
14
15#define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */
Dirk Eibachfb605942017-02-22 16:07:23 +010016
17/*
18 * TEXT_BASE needs to be below 16MiB, since this area is scrubbed
19 * for DDR ECC byte filling in the SPL before loading the main
20 * U-Boot into it.
21 */
Dirk Eibachfb605942017-02-22 16:07:23 +010022
Dirk Eibachfb605942017-02-22 16:07:23 +010023#define CONFIG_LOADADDR 1000000
24
Dirk Eibachfb605942017-02-22 16:07:23 +010025/*
Dirk Eibachfb605942017-02-22 16:07:23 +010026 * SATA/SCSI/AHCI configuration
27 */
Dirk Eibachfb605942017-02-22 16:07:23 +010028#define CONFIG_SCSI_AHCI_PLAT
29#define CONFIG_SYS_SCSI_MAX_SCSI_ID 2
30#define CONFIG_SYS_SCSI_MAX_LUN 1
31#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
32 CONFIG_SYS_SCSI_MAX_LUN)
33
Dirk Eibachfb605942017-02-22 16:07:23 +010034/* USB/EHCI configuration */
35#define CONFIG_EHCI_IS_TDI
36
37/* Environment in SPI NOR flash */
Dirk Eibachfb605942017-02-22 16:07:23 +010038
Dirk Eibachfb605942017-02-22 16:07:23 +010039#define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */
40
41/* PCIe support */
42#ifndef CONFIG_SPL_BUILD
Dirk Eibachfb605942017-02-22 16:07:23 +010043#define CONFIG_PCI_SCAN_SHOW
44#endif
45
Dirk Eibachfb605942017-02-22 16:07:23 +010046/*
47 * Software (bit-bang) MII driver configuration
48 */
Dirk Eibachfb605942017-02-22 16:07:23 +010049#define CONFIG_BITBANGMII_MULTI
50
51/* SPL */
52/*
53 * Select the boot device here
54 *
55 * Currently supported are:
56 * SPL_BOOT_SPI_NOR_FLASH - Booting via SPI NOR flash
57 * SPL_BOOT_SDIO_MMC_CARD - Booting via SDIO/MMC card (partition 1)
58 */
59#define SPL_BOOT_SPI_NOR_FLASH 1
60#define SPL_BOOT_SDIO_MMC_CARD 2
61#define CONFIG_SPL_BOOT_DEVICE SPL_BOOT_SPI_NOR_FLASH
62
63/* Defines for SPL */
Dirk Eibachfb605942017-02-22 16:07:23 +010064#define CONFIG_SPL_SIZE (160 << 10)
65
66#if defined(CONFIG_SECURED_MODE_IMAGE)
Dirk Eibachfb605942017-02-22 16:07:23 +010067#define CONFIG_SPL_MAX_SIZE (CONFIG_SPL_SIZE - 0x2614)
68#else
Dirk Eibachfb605942017-02-22 16:07:23 +010069#define CONFIG_SPL_MAX_SIZE (CONFIG_SPL_SIZE - 0x30)
70#endif
71
72#define CONFIG_SPL_BSS_START_ADDR (0x40000000 + CONFIG_SPL_SIZE)
73#define CONFIG_SPL_BSS_MAX_SIZE (16 << 10)
74
75#ifdef CONFIG_SPL_BUILD
76#define CONFIG_SYS_MALLOC_SIMPLE
77#endif
78
79#define CONFIG_SPL_STACK (0x40000000 + ((212 - 16) << 10))
80#define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)
81
82#define CONFIG_SPL_LIBCOMMON_SUPPORT
83#define CONFIG_SPL_LIBGENERIC_SUPPORT
Simon Glassbccfc2e2021-07-10 21:14:36 -060084#define CONFIG_SPL_I2C
Dirk Eibachfb605942017-02-22 16:07:23 +010085
Dirk Eibachfb605942017-02-22 16:07:23 +010086#if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SDIO_MMC_CARD
87/* SPL related MMC defines */
88#define CONFIG_SPL_MMC_SUPPORT
Dirk Eibachfb605942017-02-22 16:07:23 +010089#ifdef CONFIG_SPL_BUILD
90#define CONFIG_FIXED_SDHCI_ALIGNED_BUFFER 0x00180000 /* in SDRAM */
91#endif
92#endif
93
94/*
95 * Environment Configuration
96 */
Dirk Eibachfb605942017-02-22 16:07:23 +010097
Mario Six790d8442018-03-28 14:38:20 +020098#define CONFIG_HOSTNAME "ccdc"
Dirk Eibachfb605942017-02-22 16:07:23 +010099#define CONFIG_ROOTPATH "/opt/nfsroot"
100#define CONFIG_BOOTFILE "ccdc.img"
101
Dirk Eibachfb605942017-02-22 16:07:23 +0100102#define CONFIG_EXTRA_ENV_SETTINGS \
103 "netdev=eth1\0" \
104 "consoledev=ttyS1\0" \
105 "u-boot=u-boot.bin\0" \
106 "bootfile_addr=1000000\0" \
107 "keyprogram_addr=3000000\0" \
108 "keyprogram_file=keyprogram.img\0" \
109 "fdtfile=controlcenterdc.dtb\0" \
110 "load=tftpboot ${loadaddr} ${u-boot}\0" \
111 "mmcdev=0:2\0" \
112 "update=sf probe 1:0;" \
113 " sf erase 0 +${filesize};" \
114 " sf write ${fileaddr} 0 ${filesize}\0" \
115 "upd=run load update\0" \
116 "fdt_high=0x10000000\0" \
117 "initrd_high=0x10000000\0" \
118 "loadkeyprogram=tpm flush_keys;" \
119 " mmc rescan;" \
120 " ext4load mmc ${mmcdev} ${keyprogram_addr} ${keyprogram_file};"\
121 " source ${keyprogram_addr}:script@1\0" \
122 "gpio1=gpio@22_25\0" \
123 "gpio2=A29\0" \
124 "blinkseq='0 0 0 0 2 0 2 2 3 1 3 1 0 0 2 2 3 1 3 3 2 0 2 2 3 1 1 1 " \
125 "2 0 2 2 3 1 3 1 0 0 2 0 3 3 3 1 2 0 0 0 3 1 1 1 0 0 0 0'\0" \
126 "bootfail=for i in ${blinkseq}; do" \
127 " if test $i -eq 0; then" \
128 " gpio clear ${gpio1}; gpio set ${gpio2};" \
129 " elif test $i -eq 1; then" \
130 " gpio clear ${gpio1}; gpio clear ${gpio2};" \
131 " elif test $i -eq 2; then" \
132 " gpio set ${gpio1}; gpio set ${gpio2};" \
133 " else;" \
134 " gpio clear ${gpio1}; gpio set ${gpio2};" \
135 " fi; sleep 0.12; done\0"
136
137#define CONFIG_NFSBOOTCOMMAND \
138 "setenv bootargs root=/dev/nfs rw " \
139 "nfsroot=${serverip}:${rootpath} " \
140 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}:${netdev}:off " \
141 "console=${consoledev},${baudrate} ${othbootargs}; " \
142 "tftpboot ${bootfile_addr} ${bootfile}; " \
143 "bootm ${bootfile_addr}"
144
145#define CONFIG_MMCBOOTCOMMAND \
146 "setenv bootargs root=/dev/mmcblk0p3 rw rootwait " \
147 "console=${consoledev},${baudrate} ${othbootargs}; " \
148 "ext2load mmc 0:2 ${bootfile_addr} ${bootfile}; " \
149 "bootm ${bootfile_addr}"
150
151#define CONFIG_BOOTCOMMAND \
152 "if env exists keyprogram; then;" \
153 " setenv keyprogram; run nfsboot;" \
154 " fi;" \
155 " run dobootfail"
156
157/*
158 * mv-common.h should be defined after CMD configs since it used them
159 * to enable certain macros
160 */
161#include "mv-common.h"
162
163#endif /* _CONFIG_CONTROLCENTERDC_H */