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git01.mediatek.com / filogic / uboot / 94ef0166f2cd373ee29a9bb11cb8150561750139 / . / dts / upstream / src / arm64 / ti / k3-am654-base-board.dts
blob: aba0c52b121338feabdd5b01ef65bb85f85ed762 [file] [log] [blame]
Tom Rini6bb92fc2024-05-20 09:54:58 -0600[diff] [blame]1// SPDX-License-Identifier: GPL-2.0-only OR MIT
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]2/*
Tom Rini6bb92fc2024-05-20 09:54:58 -0600[diff] [blame]3 * Copyright (C) 2016-2024 Texas Instruments Incorporated - https://www.ti.com/
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]4 */
5
6/dts-v1/;
7
8#include "k3-am654.dtsi"
9#include <dt-bindings/input/input.h>
10#include <dt-bindings/net/ti-dp83867.h>
11
12/ {
13 compatible = "ti,am654-evm", "ti,am654";
14 model = "Texas Instruments AM654 Base Board";
15
16 aliases {
17 serial0 = &wkup_uart0;
18 serial1 = &mcu_uart0;
19 serial2 = &main_uart0;
20 i2c0 = &wkup_i2c0;
21 i2c1 = &mcu_i2c0;
22 i2c2 = &main_i2c0;
23 i2c3 = &main_i2c1;
24 i2c4 = &main_i2c2;
25 ethernet0 = &cpsw_port1;
26 mmc0 = &sdhci0;
27 mmc1 = &sdhci1;
28 };
29
30 chosen {
31 stdout-path = "serial2:115200n8";
32 };
33
34 memory@80000000 {
35 device_type = "memory";
36 /* 4G RAM */
37 reg = <0x00000000 0x80000000 0x00000000 0x80000000>,
38 <0x00000008 0x80000000 0x00000000 0x80000000>;
39 };
40
41 reserved-memory {
42 #address-cells = <2>;
43 #size-cells = <2>;
44 ranges;
45
46 secure_ddr: secure-ddr@9e800000 {
47 reg = <0 0x9e800000 0 0x01800000>; /* for OP-TEE */
48 alignment = <0x1000>;
49 no-map;
50 };
51
52 mcu_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 {
53 compatible = "shared-dma-pool";
54 reg = <0 0xa0000000 0 0x100000>;
55 no-map;
56 };
57
58 mcu_r5fss0_core0_memory_region: r5f-memory@a0100000 {
59 compatible = "shared-dma-pool";
60 reg = <0 0xa0100000 0 0xf00000>;
61 no-map;
62 };
63
64 mcu_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 {
65 compatible = "shared-dma-pool";
66 reg = <0 0xa1000000 0 0x100000>;
67 no-map;
68 };
69
70 mcu_r5fss0_core1_memory_region: r5f-memory@a1100000 {
71 compatible = "shared-dma-pool";
72 reg = <0 0xa1100000 0 0xf00000>;
73 no-map;
74 };
75
76 rtos_ipc_memory_region: ipc-memories@a2000000 {
77 reg = <0x00 0xa2000000 0x00 0x00100000>;
78 alignment = <0x1000>;
79 no-map;
80 };
81 };
82
83 gpio-keys {
84 compatible = "gpio-keys";
85 autorepeat;
86 pinctrl-names = "default";
87 pinctrl-0 = <&push_button_pins_default>;
88
89 switch-5 {
90 label = "GPIO Key USER1";
91 linux,code = <BTN_0>;
92 gpios = <&wkup_gpio0 24 GPIO_ACTIVE_LOW>;
93 };
94
95 switch-6 {
96 label = "GPIO Key USER2";
97 linux,code = <BTN_1>;
98 gpios = <&wkup_gpio0 27 GPIO_ACTIVE_LOW>;
99 };
100 };
101
102 evm_12v0: regulator-0 {
103 /* main supply */
104 compatible = "regulator-fixed";
105 regulator-name = "evm_12v0";
106 regulator-min-microvolt = <12000000>;
107 regulator-max-microvolt = <12000000>;
108 regulator-always-on;
109 regulator-boot-on;
110 };
111
112 vcc3v3_io: regulator-1 {
113 /* Output of TPS54334 */
114 compatible = "regulator-fixed";
115 regulator-name = "vcc3v3_io";
116 regulator-min-microvolt = <3300000>;
117 regulator-max-microvolt = <3300000>;
118 regulator-always-on;
119 regulator-boot-on;
120 vin-supply = <&evm_12v0>;
121 };
122
123 vdd_mmc1_sd: regulator-2 {
124 compatible = "regulator-fixed";
125 regulator-name = "vdd_mmc1_sd";
126 regulator-min-microvolt = <3300000>;
127 regulator-max-microvolt = <3300000>;
128 regulator-boot-on;
129 enable-active-high;
130 vin-supply = <&vcc3v3_io>;
131 gpio = <&pca9554 4 GPIO_ACTIVE_HIGH>;
132 };
133
134 vtt_supply: regulator-3 {
135 compatible = "regulator-fixed";
136 regulator-name = "vtt";
137 pinctrl-names = "default";
138 pinctrl-0 = <&ddr_vtt_pins_default>;
139 regulator-min-microvolt = <3300000>;
140 regulator-max-microvolt = <3300000>;
141 enable-active-high;
142 regulator-always-on;
143 regulator-boot-on;
144 vin-supply = <&vcc3v3_io>;
145 gpio = <&wkup_gpio0 28 GPIO_ACTIVE_HIGH>;
146 };
147};
148
149&wkup_pmx0 {
150 wkup_uart0_pins_default: wkup-uart0-default-pins {
151 pinctrl-single,pins = <
152 AM65X_WKUP_IOPAD(0x00a0, PIN_INPUT, 0) /* (AB1) WKUP_UART0_RXD */
153 AM65X_WKUP_IOPAD(0x00a4, PIN_OUTPUT, 0) /* (AB5) WKUP_UART0_TXD */
154 AM65X_WKUP_IOPAD(0x00c8, PIN_INPUT, 1) /* (AC2) WKUP_GPIO0_6.WKUP_UART0_CTSn */
155 AM65X_WKUP_IOPAD(0x00cc, PIN_OUTPUT, 1) /* (AC1) WKUP_GPIO0_7.WKUP_UART0_RTSn */
156 >;
157 };
158
159 ddr_vtt_pins_default: ddr-vtt-default-pins {
160 pinctrl-single,pins = <
161 AM65X_WKUP_IOPAD(0x0040, PIN_OUTPUT_PULLUP, 7) /* WKUP_GPIO0_28 */
162 >;
163 };
164
165 wkup_i2c0_pins_default: wkup-i2c0-default-pins {
166 pinctrl-single,pins = <
167 AM65X_WKUP_IOPAD(0x00e0, PIN_INPUT, 0) /* (AC7) WKUP_I2C0_SCL */
168 AM65X_WKUP_IOPAD(0x00e4, PIN_INPUT, 0) /* (AD6) WKUP_I2C0_SDA */
169 >;
170 };
171
172 push_button_pins_default: push-button-default-pins {
173 pinctrl-single,pins = <
174 AM65X_WKUP_IOPAD(0x0030, PIN_INPUT, 7) /* (R5) WKUP_GPIO0_24 */
175 AM65X_WKUP_IOPAD(0x003c, PIN_INPUT, 7) /* (P2) WKUP_GPIO0_27 */
176 >;
177 };
178
179 mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-default-pins {
180 pinctrl-single,pins = <
181 AM65X_WKUP_IOPAD(0x0000, PIN_OUTPUT, 0) /* (V1) MCU_OSPI0_CLK */
182 AM65X_WKUP_IOPAD(0x0008, PIN_INPUT, 0) /* (U2) MCU_OSPI0_DQS */
183 AM65X_WKUP_IOPAD(0x000c, PIN_INPUT, 0) /* (U4) MCU_OSPI0_D0 */
184 AM65X_WKUP_IOPAD(0x0010, PIN_INPUT, 0) /* (U5) MCU_OSPI0_D1 */
185 AM65X_WKUP_IOPAD(0x0014, PIN_INPUT, 0) /* (T2) MCU_OSPI0_D2 */
186 AM65X_WKUP_IOPAD(0x0018, PIN_INPUT, 0) /* (T3) MCU_OSPI0_D3 */
187 AM65X_WKUP_IOPAD(0x001c, PIN_INPUT, 0) /* (T4) MCU_OSPI0_D4 */
188 AM65X_WKUP_IOPAD(0x0020, PIN_INPUT, 0) /* (T5) MCU_OSPI0_D5 */
189 AM65X_WKUP_IOPAD(0x0024, PIN_INPUT, 0) /* (R2) MCU_OSPI0_D6 */
190 AM65X_WKUP_IOPAD(0x0028, PIN_INPUT, 0) /* (R3) MCU_OSPI0_D7 */
191 AM65X_WKUP_IOPAD(0x002c, PIN_OUTPUT, 0) /* (R4) MCU_OSPI0_CSn0 */
192 >;
193 };
194
195 wkup_pca554_default: wkup-pca554-default-pins {
196 pinctrl-single,pins = <
197 AM65X_WKUP_IOPAD(0x0034, PIN_INPUT, 7) /* (T1) MCU_OSPI1_CLK.WKUP_GPIO0_25 */
198 >;
199 };
200
201 mcu_uart0_pins_default: mcu-uart0-default-pins {
202 pinctrl-single,pins = <
203 AM65X_WKUP_IOPAD(0x0044, PIN_INPUT, 4) /* (P4) MCU_OSPI1_D1.MCU_UART0_RXD */
204 AM65X_WKUP_IOPAD(0x0048, PIN_OUTPUT, 4) /* (P5) MCU_OSPI1_D2.MCU_UART0_TXD */
205 AM65X_WKUP_IOPAD(0x004C, PIN_INPUT, 4) /* (P1) MCU_OSPI1_D3.MCU_UART0_CTSn */
206 AM65X_WKUP_IOPAD(0x0054, PIN_OUTPUT, 4) /* (N3) MCU_OSPI1_CSn1.MCU_UART0_RTSn */
207 >;
208 };
209
210 mcu_cpsw_pins_default: mcu-cpsw-default-pins {
211 pinctrl-single,pins = <
212 AM65X_WKUP_IOPAD(0x0058, PIN_OUTPUT, 0) /* (N4) MCU_RGMII1_TX_CTL */
213 AM65X_WKUP_IOPAD(0x005c, PIN_INPUT, 0) /* (N5) MCU_RGMII1_RX_CTL */
214 AM65X_WKUP_IOPAD(0x0060, PIN_OUTPUT, 0) /* (M2) MCU_RGMII1_TD3 */
215 AM65X_WKUP_IOPAD(0x0064, PIN_OUTPUT, 0) /* (M3) MCU_RGMII1_TD2 */
216 AM65X_WKUP_IOPAD(0x0068, PIN_OUTPUT, 0) /* (M4) MCU_RGMII1_TD1 */
217 AM65X_WKUP_IOPAD(0x006c, PIN_OUTPUT, 0) /* (M5) MCU_RGMII1_TD0 */
218 AM65X_WKUP_IOPAD(0x0078, PIN_INPUT, 0) /* (L2) MCU_RGMII1_RD3 */
219 AM65X_WKUP_IOPAD(0x007c, PIN_INPUT, 0) /* (L5) MCU_RGMII1_RD2 */
220 AM65X_WKUP_IOPAD(0x0080, PIN_INPUT, 0) /* (M6) MCU_RGMII1_RD1 */
221 AM65X_WKUP_IOPAD(0x0084, PIN_INPUT, 0) /* (L6) MCU_RGMII1_RD0 */
222 AM65X_WKUP_IOPAD(0x0070, PIN_OUTPUT, 0) /* (N1) MCU_RGMII1_TXC */
223 AM65X_WKUP_IOPAD(0x0074, PIN_INPUT, 0) /* (M1) MCU_RGMII1_RXC */
224 >;
225 };
226
227 mcu_mdio_pins_default: mcu-mdio1-default-pins {
228 pinctrl-single,pins = <
229 AM65X_WKUP_IOPAD(0x008c, PIN_OUTPUT, 0) /* (L1) MCU_MDIO0_MDC */
230 AM65X_WKUP_IOPAD(0x0088, PIN_INPUT, 0) /* (L4) MCU_MDIO0_MDIO */
231 >;
232 };
233
234 mcu_i2c0_pins_default: mcu-i2c0-default-pins {
235 pinctrl-single,pins = <
236 AM65X_WKUP_IOPAD(0x00e8, PIN_INPUT, 0) /* (AD8) MCU_I2C0_SCL */
237 AM65X_WKUP_IOPAD(0x00ec, PIN_INPUT, 0) /* (AD7) MCU_I2C0_SDA */
238 >;
239 };
240};
241
242&main_pmx0 {
243 main_uart0_pins_default: main-uart0-default-pins {
244 pinctrl-single,pins = <
245 AM65X_IOPAD(0x01e4, PIN_INPUT, 0) /* (AF11) UART0_RXD */
246 AM65X_IOPAD(0x01e8, PIN_OUTPUT, 0) /* (AE11) UART0_TXD */
247 AM65X_IOPAD(0x01ec, PIN_INPUT, 0) /* (AG11) UART0_CTSn */
248 AM65X_IOPAD(0x01f0, PIN_OUTPUT, 0) /* (AD11) UART0_RTSn */
249 >;
250 };
251
252 main_i2c2_pins_default: main-i2c2-default-pins {
253 pinctrl-single,pins = <
254 AM65X_IOPAD(0x0074, PIN_INPUT, 5) /* (T27) GPMC0_CSn3.I2C2_SCL */
255 AM65X_IOPAD(0x0070, PIN_INPUT, 5) /* (R25) GPMC0_CSn2.I2C2_SDA */
256 >;
257 };
258
259 main_spi0_pins_default: main-spi0-default-pins {
260 pinctrl-single,pins = <
261 AM65X_IOPAD(0x01c4, PIN_INPUT, 0) /* (AH13) SPI0_CLK */
262 AM65X_IOPAD(0x01c8, PIN_INPUT, 0) /* (AE13) SPI0_D0 */
263 AM65X_IOPAD(0x01cc, PIN_INPUT, 0) /* (AD13) SPI0_D1 */
264 AM65X_IOPAD(0x01bc, PIN_OUTPUT, 0) /* (AG13) SPI0_CS0 */
265 >;
266 };
267
268 main_mmc0_pins_default: main-mmc0-default-pins {
269 pinctrl-single,pins = <
270 AM65X_IOPAD(0x01a8, PIN_INPUT_PULLDOWN, 0) /* (B25) MMC0_CLK */
271 AM65X_IOPAD(0x01ac, PIN_INPUT_PULLUP, 0) /* (B27) MMC0_CMD */
272 AM65X_IOPAD(0x01a4, PIN_INPUT_PULLUP, 0) /* (A26) MMC0_DAT0 */
273 AM65X_IOPAD(0x01a0, PIN_INPUT_PULLUP, 0) /* (E25) MMC0_DAT1 */
274 AM65X_IOPAD(0x019c, PIN_INPUT_PULLUP, 0) /* (C26) MMC0_DAT2 */
275 AM65X_IOPAD(0x0198, PIN_INPUT_PULLUP, 0) /* (A25) MMC0_DAT3 */
276 AM65X_IOPAD(0x0194, PIN_INPUT_PULLUP, 0) /* (E24) MMC0_DAT4 */
277 AM65X_IOPAD(0x0190, PIN_INPUT_PULLUP, 0) /* (A24) MMC0_DAT5 */
278 AM65X_IOPAD(0x018c, PIN_INPUT_PULLUP, 0) /* (B26) MMC0_DAT6 */
279 AM65X_IOPAD(0x0188, PIN_INPUT_PULLUP, 0) /* (D25) MMC0_DAT7 */
280 AM65X_IOPAD(0x01b4, PIN_INPUT_PULLUP, 0) /* (A23) MMC0_SDCD */
281 AM65X_IOPAD(0x01b0, PIN_INPUT, 0) /* (C25) MMC0_DS */
282 >;
283 };
284
285 main_mmc1_pins_default: main-mmc1-default-pins {
286 pinctrl-single,pins = <
287 AM65X_IOPAD(0x02d4, PIN_INPUT_PULLDOWN, 0) /* (C27) MMC1_CLK */
288 AM65X_IOPAD(0x02d8, PIN_INPUT_PULLUP, 0) /* (C28) MMC1_CMD */
289 AM65X_IOPAD(0x02d0, PIN_INPUT_PULLUP, 0) /* (D28) MMC1_DAT0 */
290 AM65X_IOPAD(0x02cc, PIN_INPUT_PULLUP, 0) /* (E27) MMC1_DAT1 */
291 AM65X_IOPAD(0x02c8, PIN_INPUT_PULLUP, 0) /* (D26) MMC1_DAT2 */
292 AM65X_IOPAD(0x02c4, PIN_INPUT_PULLUP, 0) /* (D27) MMC1_DAT3 */
293 AM65X_IOPAD(0x02dc, PIN_INPUT_PULLUP, 0) /* (B24) MMC1_SDCD */
294 AM65X_IOPAD(0x02e0, PIN_INPUT, 0) /* (C24) MMC1_SDWP */
295 >;
296 };
297
298 usb1_pins_default: usb1-default-pins {
299 pinctrl-single,pins = <
300 AM65X_IOPAD(0x02c0, PIN_OUTPUT, 0) /* (AC8) USB1_DRVVBUS */
301 >;
302 };
303};
304
305&main_pmx1 {
306 main_i2c0_pins_default: main-i2c0-default-pins {
307 pinctrl-single,pins = <
308 AM65X_IOPAD(0x0000, PIN_INPUT, 0) /* (D20) I2C0_SCL */
309 AM65X_IOPAD(0x0004, PIN_INPUT, 0) /* (C21) I2C0_SDA */
310 >;
311 };
312
313 main_i2c1_pins_default: main-i2c1-default-pins {
314 pinctrl-single,pins = <
315 AM65X_IOPAD(0x0008, PIN_INPUT, 0) /* (B21) I2C1_SCL */
316 AM65X_IOPAD(0x000c, PIN_INPUT, 0) /* (E21) I2C1_SDA */
317 >;
318 };
319
320 ecap0_pins_default: ecap0-default-pins {
321 pinctrl-single,pins = <
322 AM65X_IOPAD(0x0010, PIN_INPUT, 0) /* (D21) ECAP0_IN_APWM_OUT */
323 >;
324 };
325};
326
327&wkup_uart0 {
328 /* Wakeup UART is used by System firmware */
329 status = "reserved";
330 pinctrl-names = "default";
331 pinctrl-0 = <&wkup_uart0_pins_default>;
332};
333
334&mcu_uart0 {
335 status = "okay";
336 pinctrl-names = "default";
337 pinctrl-0 = <&mcu_uart0_pins_default>;
338};
339
340&main_uart0 {
341 status = "okay";
342 pinctrl-names = "default";
343 pinctrl-0 = <&main_uart0_pins_default>;
344 power-domains = <&k3_pds 146 TI_SCI_PD_SHARED>;
345};
346
347&wkup_i2c0 {
348 status = "okay";
349 pinctrl-names = "default";
350 pinctrl-0 = <&wkup_i2c0_pins_default>;
351 clock-frequency = <400000>;
352
353 eeprom@50 {
354 /* AT24CM01 */
355 compatible = "atmel,24c1024";
356 reg = <0x50>;
357 };
358
359 vdd_mpu: regulator@60 {
360 compatible = "ti,tps62363";
361 reg = <0x60>;
362 regulator-name = "VDD_MPU";
363 regulator-min-microvolt = <500000>;
364 regulator-max-microvolt = <1770000>;
365 regulator-always-on;
366 regulator-boot-on;
367 ti,vsel0-state-high;
368 ti,vsel1-state-high;
369 ti,enable-vout-discharge;
370 };
371
372 gpio@38 {
373 compatible = "nxp,pca9554";
374 reg = <0x38>;
375 gpio-controller;
376 #gpio-cells = <2>;
377 };
378
379 pca9554: gpio@39 {
380 compatible = "nxp,pca9554";
381 reg = <0x39>;
382 gpio-controller;
383 #gpio-cells = <2>;
384 pinctrl-names = "default";
385 pinctrl-0 = <&wkup_pca554_default>;
386 interrupt-parent = <&wkup_gpio0>;
387 interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
388 interrupt-controller;
389 #interrupt-cells = <2>;
390 };
391};
392
393&mcu_i2c0 {
394 status = "okay";
395 pinctrl-names = "default";
396 pinctrl-0 = <&mcu_i2c0_pins_default>;
397 clock-frequency = <400000>;
398};
399
400&main_i2c0 {
401 status = "okay";
402 pinctrl-names = "default";
403 pinctrl-0 = <&main_i2c0_pins_default>;
404 clock-frequency = <400000>;
405
406 pca9555: gpio@21 {
407 compatible = "nxp,pca9555";
408 reg = <0x21>;
409 gpio-controller;
410 #gpio-cells = <2>;
411 };
412};
413
414&main_i2c1 {
415 status = "okay";
416 pinctrl-names = "default";
417 pinctrl-0 = <&main_i2c1_pins_default>;
418 clock-frequency = <400000>;
419};
420
421&main_i2c2 {
422 status = "okay";
423 pinctrl-names = "default";
424 pinctrl-0 = <&main_i2c2_pins_default>;
425 clock-frequency = <400000>;
426};
427
428&ecap0 {
429 status = "okay";
430 pinctrl-names = "default";
431 pinctrl-0 = <&ecap0_pins_default>;
432};
433
434&main_spi0 {
435 status = "okay";
436 pinctrl-names = "default";
437 pinctrl-0 = <&main_spi0_pins_default>;
438 #address-cells = <1>;
439 #size-cells = <0>;
440 ti,pindir-d0-out-d1-in;
441
442 flash@0 {
443 compatible = "jedec,spi-nor";
444 reg = <0x0>;
445 spi-tx-bus-width = <1>;
446 spi-rx-bus-width = <1>;
447 spi-max-frequency = <48000000>;
448 };
449};
450
451&sdhci0 {
Tom Rini93743d22024-04-01 09:08:13 -0400[diff] [blame]452 status = "okay";
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]453 pinctrl-names = "default";
454 pinctrl-0 = <&main_mmc0_pins_default>;
455 bus-width = <8>;
456 non-removable;
457 ti,driver-strength-ohm = <50>;
458 disable-wp;
459};
460
461/*
462 * Because of erratas i2025 and i2026 for silicon revision 1.0, the
463 * SD card interface might fail. Boards with sr1.0 are recommended to
464 * disable sdhci1
465 */
466&sdhci1 {
Tom Rini93743d22024-04-01 09:08:13 -0400[diff] [blame]467 status = "okay";
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]468 vmmc-supply = <&vdd_mmc1_sd>;
469 pinctrl-names = "default";
470 pinctrl-0 = <&main_mmc1_pins_default>;
471 ti,driver-strength-ohm = <50>;
472 disable-wp;
473};
474
475&usb1 {
476 pinctrl-names = "default";
477 pinctrl-0 = <&usb1_pins_default>;
478 dr_mode = "otg";
479};
480
481&dwc3_0 {
482 status = "disabled";
483};
484
485&usb0_phy {
486 status = "disabled";
487};
488
489&tscadc0 {
490 status = "okay";
491 adc {
492 ti,adc-channels = <0 1 2 3 4 5 6 7>;
493 };
494};
495
496&tscadc1 {
497 status = "okay";
498 adc {
499 ti,adc-channels = <0 1 2 3 4 5 6 7>;
500 };
501};
502
503&serdes0 {
504 status = "disabled";
505};
506
507&serdes1 {
508 status = "disabled";
509};
510
511&mailbox0_cluster0 {
512 status = "okay";
513 interrupts = <436>;
514
515 mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 {
516 ti,mbox-tx = <1 0 0>;
517 ti,mbox-rx = <0 0 0>;
518 };
519};
520
521&mailbox0_cluster1 {
522 status = "okay";
523 interrupts = <432>;
524
525 mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 {
526 ti,mbox-tx = <1 0 0>;
527 ti,mbox-rx = <0 0 0>;
528 };
529};
530
531&mcu_r5fss0_core0 {
532 memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
533 <&mcu_r5fss0_core0_memory_region>;
Tom Rini6bb92fc2024-05-20 09:54:58 -0600[diff] [blame]534 mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>;
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]535};
536
537&mcu_r5fss0_core1 {
538 memory-region = <&mcu_r5fss0_core1_dma_memory_region>,
539 <&mcu_r5fss0_core1_memory_region>;
Tom Rini6bb92fc2024-05-20 09:54:58 -0600[diff] [blame]540 mboxes = <&mailbox0_cluster1 &mbox_mcu_r5fss0_core1>;
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]541};
542
543&ospi0 {
544 status = "okay";
545 pinctrl-names = "default";
546 pinctrl-0 = <&mcu_fss0_ospi0_pins_default>;
547
548 flash@0 {
549 compatible = "jedec,spi-nor";
550 reg = <0x0>;
551 spi-tx-bus-width = <8>;
552 spi-rx-bus-width = <8>;
553 spi-max-frequency = <25000000>;
554 cdns,tshsl-ns = <60>;
555 cdns,tsd2d-ns = <60>;
556 cdns,tchsh-ns = <60>;
557 cdns,tslch-ns = <60>;
558 cdns,read-delay = <0>;
559
560 partitions {
561 compatible = "fixed-partitions";
562 #address-cells = <1>;
563 #size-cells = <1>;
564
565 partition@0 {
566 label = "ospi.tiboot3";
567 reg = <0x0 0x80000>;
568 };
569
570 partition@80000 {
571 label = "ospi.tispl";
572 reg = <0x80000 0x200000>;
573 };
574
575 partition@280000 {
576 label = "ospi.u-boot";
577 reg = <0x280000 0x400000>;
578 };
579
580 partition@680000 {
581 label = "ospi.env";
582 reg = <0x680000 0x20000>;
583 };
584
585 partition@6a0000 {
586 label = "ospi.env.backup";
587 reg = <0x6a0000 0x20000>;
588 };
589
590 partition@6c0000 {
591 label = "ospi.sysfw";
592 reg = <0x6c0000 0x100000>;
593 };
594
595 partition@800000 {
596 label = "ospi.rootfs";
597 reg = <0x800000 0x37c0000>;
598 };
599
600 partition@3fe0000 {
601 label = "ospi.phypattern";
602 reg = <0x3fe0000 0x20000>;
603 };
604 };
605 };
606};
607
608&mcu_cpsw {
609 pinctrl-names = "default";
610 pinctrl-0 = <&mcu_cpsw_pins_default>;
611};
612
613&davinci_mdio {
614 status = "okay";
615 pinctrl-names = "default";
616 pinctrl-0 = <&mcu_mdio_pins_default>;
617
618 phy0: ethernet-phy@0 {
619 reg = <0>;
620 ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
621 ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
622 };
623};
624
625&cpsw_port1 {
626 phy-mode = "rgmii-rxid";
627 phy-handle = <&phy0>;
628};
629
630&dss {
631 status = "disabled";
632};