Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1 | // SPDX-License-Identifier: (GPL-2.0 OR MIT) |
| 2 | /* |
| 3 | * Copyright (C) 2021 MediaTek Inc. |
| 4 | * Author: Sam.Shih <sam.shih@mediatek.com> |
| 5 | */ |
| 6 | |
| 7 | /dts-v1/; |
| 8 | #include <dt-bindings/pinctrl/mt65xx.h> |
| 9 | |
| 10 | #include "mt7986a.dtsi" |
| 11 | |
| 12 | / { |
| 13 | model = "MediaTek MT7986a RFB"; |
| 14 | chassis-type = "embedded"; |
| 15 | compatible = "mediatek,mt7986a-rfb", "mediatek,mt7986a"; |
| 16 | |
| 17 | aliases { |
| 18 | serial0 = &uart0; |
| 19 | }; |
| 20 | |
| 21 | chosen { |
| 22 | stdout-path = "serial0:115200n8"; |
| 23 | }; |
| 24 | |
| 25 | memory@40000000 { |
| 26 | device_type = "memory"; |
| 27 | reg = <0 0x40000000 0 0x40000000>; |
| 28 | }; |
| 29 | |
| 30 | reg_1p8v: regulator-1p8v { |
| 31 | compatible = "regulator-fixed"; |
| 32 | regulator-name = "fixed-1.8V"; |
| 33 | regulator-min-microvolt = <1800000>; |
| 34 | regulator-max-microvolt = <1800000>; |
| 35 | regulator-boot-on; |
| 36 | regulator-always-on; |
| 37 | }; |
| 38 | |
| 39 | reg_3p3v: regulator-3p3v { |
| 40 | compatible = "regulator-fixed"; |
| 41 | regulator-name = "fixed-3.3V"; |
| 42 | regulator-min-microvolt = <3300000>; |
| 43 | regulator-max-microvolt = <3300000>; |
| 44 | regulator-boot-on; |
| 45 | regulator-always-on; |
| 46 | }; |
| 47 | }; |
| 48 | |
| 49 | &crypto { |
| 50 | status = "okay"; |
| 51 | }; |
| 52 | |
| 53 | ð { |
| 54 | status = "okay"; |
| 55 | |
| 56 | gmac0: mac@0 { |
| 57 | compatible = "mediatek,eth-mac"; |
| 58 | reg = <0>; |
| 59 | phy-mode = "2500base-x"; |
| 60 | |
| 61 | fixed-link { |
| 62 | speed = <2500>; |
| 63 | full-duplex; |
| 64 | pause; |
| 65 | }; |
| 66 | }; |
| 67 | |
Tom Rini | 6bb92fc | 2024-05-20 09:54:58 -0600 | [diff] [blame] | 68 | gmac1: mac@1 { |
| 69 | compatible = "mediatek,eth-mac"; |
| 70 | reg = <1>; |
| 71 | phy-mode = "rgmii"; |
| 72 | |
| 73 | fixed-link { |
| 74 | speed = <1000>; |
| 75 | full-duplex; |
| 76 | pause; |
| 77 | }; |
| 78 | }; |
| 79 | |
Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 80 | mdio: mdio-bus { |
| 81 | #address-cells = <1>; |
| 82 | #size-cells = <0>; |
| 83 | }; |
| 84 | }; |
| 85 | |
| 86 | &mdio { |
| 87 | switch: switch@0 { |
| 88 | compatible = "mediatek,mt7531"; |
| 89 | reg = <31>; |
| 90 | reset-gpios = <&pio 5 0>; |
| 91 | }; |
| 92 | }; |
| 93 | |
| 94 | &mmc0 { |
| 95 | pinctrl-names = "default", "state_uhs"; |
| 96 | pinctrl-0 = <&mmc0_pins_default>; |
| 97 | pinctrl-1 = <&mmc0_pins_uhs>; |
| 98 | bus-width = <8>; |
| 99 | max-frequency = <200000000>; |
| 100 | cap-mmc-highspeed; |
| 101 | mmc-hs200-1_8v; |
| 102 | mmc-hs400-1_8v; |
| 103 | hs400-ds-delay = <0x14014>; |
| 104 | vmmc-supply = <®_3p3v>; |
| 105 | vqmmc-supply = <®_1p8v>; |
| 106 | non-removable; |
| 107 | no-sd; |
| 108 | no-sdio; |
| 109 | }; |
| 110 | |
| 111 | &pcie { |
| 112 | pinctrl-names = "default"; |
| 113 | pinctrl-0 = <&pcie_pins>; |
| 114 | status = "okay"; |
| 115 | }; |
| 116 | |
| 117 | &pcie_phy { |
| 118 | status = "okay"; |
| 119 | }; |
| 120 | |
| 121 | &pio { |
| 122 | mmc0_pins_default: mmc0-pins { |
| 123 | mux { |
| 124 | function = "emmc"; |
| 125 | groups = "emmc_51"; |
| 126 | }; |
| 127 | conf-cmd-dat { |
| 128 | pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2", |
| 129 | "EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5", |
| 130 | "EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD"; |
| 131 | input-enable; |
| 132 | drive-strength = <4>; |
| 133 | bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */ |
| 134 | }; |
| 135 | conf-clk { |
| 136 | pins = "EMMC_CK"; |
| 137 | drive-strength = <6>; |
| 138 | bias-pull-down = <MTK_PUPD_SET_R1R0_10>; /* pull-down 50K */ |
| 139 | }; |
| 140 | conf-ds { |
| 141 | pins = "EMMC_DSL"; |
| 142 | bias-pull-down = <MTK_PUPD_SET_R1R0_10>; /* pull-down 50K */ |
| 143 | }; |
| 144 | conf-rst { |
| 145 | pins = "EMMC_RSTB"; |
| 146 | drive-strength = <4>; |
| 147 | bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */ |
| 148 | }; |
| 149 | }; |
| 150 | |
| 151 | mmc0_pins_uhs: mmc0-uhs-pins { |
| 152 | mux { |
| 153 | function = "emmc"; |
| 154 | groups = "emmc_51"; |
| 155 | }; |
| 156 | conf-cmd-dat { |
| 157 | pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2", |
| 158 | "EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5", |
| 159 | "EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD"; |
| 160 | input-enable; |
| 161 | drive-strength = <4>; |
| 162 | bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */ |
| 163 | }; |
| 164 | conf-clk { |
| 165 | pins = "EMMC_CK"; |
| 166 | drive-strength = <6>; |
| 167 | bias-pull-down = <MTK_PUPD_SET_R1R0_10>; /* pull-down 50K */ |
| 168 | }; |
| 169 | conf-ds { |
| 170 | pins = "EMMC_DSL"; |
| 171 | bias-pull-down = <MTK_PUPD_SET_R1R0_10>; /* pull-down 50K */ |
| 172 | }; |
| 173 | conf-rst { |
| 174 | pins = "EMMC_RSTB"; |
| 175 | drive-strength = <4>; |
| 176 | bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */ |
| 177 | }; |
| 178 | }; |
| 179 | |
| 180 | pcie_pins: pcie-pins { |
| 181 | mux { |
| 182 | function = "pcie"; |
| 183 | groups = "pcie_clk", "pcie_wake", "pcie_pereset"; |
| 184 | }; |
| 185 | }; |
| 186 | |
| 187 | spi_flash_pins: spi-flash-pins { |
| 188 | mux { |
| 189 | function = "spi"; |
| 190 | groups = "spi0", "spi0_wp_hold"; |
| 191 | }; |
| 192 | }; |
| 193 | |
| 194 | spic_pins: spic-pins { |
| 195 | mux { |
| 196 | function = "spi"; |
| 197 | groups = "spi1_2"; |
| 198 | }; |
| 199 | }; |
| 200 | |
| 201 | uart1_pins: uart1-pins { |
| 202 | mux { |
| 203 | function = "uart"; |
| 204 | groups = "uart1"; |
| 205 | }; |
| 206 | }; |
| 207 | |
| 208 | uart2_pins: uart2-pins { |
| 209 | mux { |
| 210 | function = "uart"; |
| 211 | groups = "uart2"; |
| 212 | }; |
| 213 | }; |
| 214 | |
| 215 | wf_2g_5g_pins: wf-2g-5g-pins { |
| 216 | mux { |
| 217 | function = "wifi"; |
| 218 | groups = "wf_2g", "wf_5g"; |
| 219 | }; |
| 220 | conf { |
| 221 | pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4", |
| 222 | "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6", |
| 223 | "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10", |
| 224 | "WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1", |
| 225 | "WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0", |
| 226 | "WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8", |
| 227 | "WF1_TOP_CLK", "WF1_TOP_DATA"; |
| 228 | drive-strength = <4>; |
| 229 | }; |
| 230 | }; |
| 231 | |
| 232 | wf_dbdc_pins: wf-dbdc-pins { |
| 233 | mux { |
| 234 | function = "wifi"; |
| 235 | groups = "wf_dbdc"; |
| 236 | }; |
| 237 | conf { |
| 238 | pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4", |
| 239 | "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6", |
| 240 | "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10", |
| 241 | "WF0_TOP_CLK", "WF0_TOP_DATA"; |
| 242 | drive-strength = <4>; |
| 243 | }; |
| 244 | }; |
| 245 | }; |
| 246 | |
| 247 | &spi0 { |
| 248 | pinctrl-names = "default"; |
| 249 | pinctrl-0 = <&spi_flash_pins>; |
| 250 | cs-gpios = <0>, <0>; |
| 251 | status = "okay"; |
Tom Rini | 6bb92fc | 2024-05-20 09:54:58 -0600 | [diff] [blame] | 252 | |
| 253 | spi_nand: flash@0 { |
Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 254 | compatible = "spi-nand"; |
| 255 | reg = <0>; |
| 256 | spi-max-frequency = <10000000>; |
Tom Rini | 6bb92fc | 2024-05-20 09:54:58 -0600 | [diff] [blame] | 257 | spi-tx-bus-width = <4>; |
| 258 | spi-rx-bus-width = <4>; |
Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 259 | }; |
| 260 | }; |
| 261 | |
| 262 | &spi1 { |
| 263 | pinctrl-names = "default"; |
| 264 | pinctrl-0 = <&spic_pins>; |
| 265 | cs-gpios = <0>, <0>; |
| 266 | status = "okay"; |
| 267 | }; |
| 268 | |
| 269 | &ssusb { |
| 270 | status = "okay"; |
| 271 | }; |
| 272 | |
| 273 | &switch { |
| 274 | ports { |
| 275 | #address-cells = <1>; |
| 276 | #size-cells = <0>; |
| 277 | |
| 278 | port@0 { |
| 279 | reg = <0>; |
| 280 | label = "lan0"; |
| 281 | }; |
| 282 | |
| 283 | port@1 { |
| 284 | reg = <1>; |
| 285 | label = "lan1"; |
| 286 | }; |
| 287 | |
| 288 | port@2 { |
| 289 | reg = <2>; |
| 290 | label = "lan2"; |
| 291 | }; |
| 292 | |
| 293 | port@3 { |
| 294 | reg = <3>; |
| 295 | label = "lan3"; |
| 296 | }; |
| 297 | |
| 298 | port@4 { |
| 299 | reg = <4>; |
| 300 | label = "lan4"; |
| 301 | }; |
| 302 | |
Tom Rini | 6bb92fc | 2024-05-20 09:54:58 -0600 | [diff] [blame] | 303 | port@5 { |
| 304 | reg = <5>; |
| 305 | ethernet = <&gmac1>; |
| 306 | phy-mode = "rgmii"; |
| 307 | |
| 308 | fixed-link { |
| 309 | speed = <1000>; |
| 310 | full-duplex; |
| 311 | pause; |
| 312 | }; |
| 313 | }; |
| 314 | |
Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 315 | port@6 { |
| 316 | reg = <6>; |
| 317 | label = "cpu"; |
| 318 | ethernet = <&gmac0>; |
| 319 | phy-mode = "2500base-x"; |
| 320 | |
| 321 | fixed-link { |
| 322 | speed = <2500>; |
| 323 | full-duplex; |
| 324 | pause; |
| 325 | }; |
| 326 | }; |
| 327 | }; |
| 328 | }; |
| 329 | |
| 330 | &uart0 { |
| 331 | status = "okay"; |
| 332 | }; |
| 333 | |
| 334 | &uart1 { |
| 335 | pinctrl-names = "default"; |
| 336 | pinctrl-0 = <&uart1_pins>; |
| 337 | status = "okay"; |
| 338 | }; |
| 339 | |
| 340 | &uart2 { |
| 341 | pinctrl-names = "default"; |
| 342 | pinctrl-0 = <&uart2_pins>; |
| 343 | status = "okay"; |
| 344 | }; |
| 345 | |
| 346 | &usb_phy { |
| 347 | status = "okay"; |
| 348 | }; |
| 349 | |
| 350 | &wifi { |
| 351 | status = "okay"; |
| 352 | pinctrl-names = "default", "dbdc"; |
| 353 | pinctrl-0 = <&wf_2g_5g_pins>; |
| 354 | pinctrl-1 = <&wf_dbdc_pins>; |
| 355 | }; |