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Tom Rini53633a82024-02-29 12:33:36 -05001# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/timer/nxp,sysctr-timer.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: NXP System Counter Module(sys_ctr)
8
9maintainers:
10 - Bai Ping <ping.bai@nxp.com>
11
12description: |
13 The system counter(sys_ctr) is a programmable system counter
14 which provides a shared time base to Cortex A15, A7, A53, A73,
15 etc. it is intended for use in applications where the counter
16 is always powered and support multiple, unrelated clocks. The
17 compare frame inside can be used for timer purpose.
18
19properties:
20 compatible:
Tom Rini6bb92fc2024-05-20 09:54:58 -060021 enum:
22 - nxp,imx95-sysctr-timer
23 - nxp,sysctr-timer
Tom Rini53633a82024-02-29 12:33:36 -050024
25 reg:
26 maxItems: 1
27
28 interrupts:
29 maxItems: 1
30
31 clocks:
32 maxItems: 1
33
34 clock-names:
35 const: per
36
37 nxp,no-divider:
38 description: if present, means there is no internal base clk divider.
39 type: boolean
40
41required:
42 - compatible
43 - reg
44 - interrupts
45 - clocks
46 - clock-names
47
48additionalProperties: false
49
50examples:
51 - |
52 #include <dt-bindings/interrupt-controller/arm-gic.h>
53
54 timer@306a0000 {
55 compatible = "nxp,sysctr-timer";
56 reg = <0x306a0000 0x20000>;
57 clocks = <&clk_8m>;
58 clock-names = "per";
59 interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
60 };