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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Darwin Ramboc5613142014-02-11 11:06:34 -08002/*
3 * Copyright 2013 Broadcom Corporation.
Darwin Ramboc5613142014-02-11 11:06:34 -08004 */
5
Simon Glassafb02152019-12-28 10:45:01 -07006#include <cpu_func.h>
Darwin Ramboc5613142014-02-11 11:06:34 -08007#include <asm/io.h>
8#include <asm/arch/sysmap.h>
9
10#define EN_MASK 0x08000000 /* Enable timer */
11#define SRSTEN_MASK 0x04000000 /* Enable soft reset */
12#define CLKS_SHIFT 20 /* Clock period shift */
13#define LD_SHIFT 0 /* Reload value shift */
14
Harald Seiler6f14d5f2020-12-15 16:47:52 +010015void reset_cpu(void)
Darwin Ramboc5613142014-02-11 11:06:34 -080016{
17 /*
18 * Set WD enable, RST enable,
19 * 3.9 msec clock period (8), reload value (8*3.9ms)
20 */
21 u32 reg = EN_MASK + SRSTEN_MASK + (8 << CLKS_SHIFT) + (8 << LD_SHIFT);
22 writel(reg, SECWD2_BASE_ADDR);
23
24 while (1)
25 ; /* loop forever till reset */
26}