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git01.mediatek.com / filogic / uboot / 9486710806a31d3e525200ce8b4834a14365d252 / . / arch / powerpc / cpu / mpc83xx / hrcw / Kconfig
blob: c657a47b11435049d013dcd5013eb3b5c1440c9d [file] [log] [blame]
Mario Six94867102019-01-21 09:17:54 +0100[diff] [blame^]1menu "Reset Configuration Word"
2
3choice
4 prompt "Local bus memory controller clock mode"
5
6config LBMC_CLOCK_MODE_1_1
7 bool "1 : 1"
8
9config LBMC_CLOCK_MODE_1_2
10 depends on ARCH_MPC8349 || ARCH_MPC8360 || ARCH_MPC837X
11 bool "1 : 2"
12
13endchoice
14
15choice
16 prompt "DDR SDRAM memory controller clock mode"
17
18config DDR_MC_CLOCK_MODE_1_2
19 bool "1 : 2"
20
21config DDR_MC_CLOCK_MODE_1_1
22 depends on ARCH_MPC8315 || ARCH_MPC8349 || ARCH_MPC8360 || ARCH_MPC837X
23 bool "1 : 1"
24
25endchoice
26
27if !ARCH_MPC8313 && !ARCH_MPC832X && !ARCH_MPC8349
28
29choice
30 prompt "System PLL VCO division"
31
32config SYSTEM_PLL_VCO_DIV_1
33 depends on !ARCH_MPC837X
34 bool "1"
35
36config SYSTEM_PLL_VCO_DIV_2
37 bool "2"
38
39config SYSTEM_PLL_VCO_DIV_4
40 depends on !ARCH_MPC831X
41 bool "4"
42
43config SYSTEM_PLL_VCO_DIV_8
44 depends on !ARCH_MPC831X
45 bool "8"
46
47endchoice
48
49endif
50
51choice
52 prompt "System PLL multiplication factor"
53
54config SYSTEM_PLL_FACTOR_2_1
55 bool "2 : 1"
56
57config SYSTEM_PLL_FACTOR_3_1
58 bool "3 : 1"
59
60config SYSTEM_PLL_FACTOR_4_1
61 bool "4 : 1"
62
63config SYSTEM_PLL_FACTOR_5_1
64 bool "5 : 1"
65
66config SYSTEM_PLL_FACTOR_6_1
67 bool "6 : 1"
68
69config SYSTEM_PLL_FACTOR_7_1
70 depends on ARCH_MPC8349 || ARCH_MPV8360 || ARCH_MPC837X
71 bool "7 : 1"
72
73config SYSTEM_PLL_FACTOR_8_1
74 depends on ARCH_MPC8349 || ARCH_MPV8360 || ARCH_MPC837X
75 bool "8 : 1"
76
77config SYSTEM_PLL_FACTOR_9_1
78 depends on ARCH_MPC8349 || ARCH_MPV8360 || ARCH_MPC837X
79 bool "9 : 1"
80
81config SYSTEM_PLL_FACTOR_10_1
82 depends on ARCH_MPC8349 || ARCH_MPV8360 || ARCH_MPC837X
83 bool "10 : 1"
84
85config SYSTEM_PLL_FACTOR_11_1
86 depends on ARCH_MPC8349 || ARCH_MPV8360 || ARCH_MPC837X
87 bool "11 : 1"
88
89config SYSTEM_PLL_FACTOR_12_1
90 depends on ARCH_MPC8349 || ARCH_MPV8360 || ARCH_MPC837X
91 bool "12 : 1"
92
93config SYSTEM_PLL_FACTOR_13_1
94 depends on ARCH_MPC8349 || ARCH_MPV8360 || ARCH_MPC837X
95 bool "13 : 1"
96
97config SYSTEM_PLL_FACTOR_14_1
98 depends on ARCH_MPC8349 || ARCH_MPV8360 || ARCH_MPC837X
99 bool "14 : 1"
100
101config SYSTEM_PLL_FACTOR_15_1
102 depends on ARCH_MPC8349 || ARCH_MPV8360 || ARCH_MPC837X
103 bool "15 : 1"
104
105config SYSTEM_PLL_FACTOR_16_1
106 depends on ARCH_MPC8349 || ARCH_MPV8360
107 bool "16 : 1"
108
109endchoice
110
111config CORE_PLL_BYPASS
112 bool "Core PLL bypassed"
113
114if !CORE_PLL_BYPASS
115
116choice
117 prompt "Core PLL Ratio"
118
119config CORE_PLL_RATIO_1_1
120 bool "1 : 1"
121
122config CORE_PLL_RATIO_15_1
123 bool "1.5 : 1"
124
125config CORE_PLL_RATIO_2_1
126 bool "2 : 1"
127
128config CORE_PLL_RATIO_25_1
129 bool "2.5 : 1"
130
131config CORE_PLL_RATIO_3_1
132 bool "3 : 1"
133
134endchoice
135
136choice
137 prompt "Core PLL VCO Divider"
138
139config CORE_PLL_VCO_DIVIDER_2
140 bool "2"
141
142config CORE_PLL_VCO_DIVIDER_4
143 bool "4"
144
145config CORE_PLL_VCO_DIVIDER_8
146 depends on !ARCH_MPC8315
147 bool "8"
148
149endchoice
150
151endif
152
153if MPC83XX_QUICC_ENGINE
154
155choice
156 prompt "QUICC Engine PLL VCO Divider"
157
158config QUICC_VCO_DIVIDER_2
159 bool "2"
160
161config QUICC_VCO_DIVIDER_4
162 bool "4"
163
164config QUICC_VCO_DIVIDER_8
165 depends on ARCH_MPC8309
166 bool "8"
167
168endchoice
169
170choice
171 prompt "QUICC Engine PLL division factor"
172
173config QUICC_DIV_FACTOR_1
174 bool "1"
175
176config QUICC_DIV_FACTOR_2
177 bool "2"
178
179endchoice
180
181choice
182 prompt "QUICC Engine PLL multiplication factor"
183
184config QUICC_MULT_FACTOR_2
185 bool "2"
186
187config QUICC_MULT_FACTOR_3
188 bool "3"
189
190config QUICC_MULT_FACTOR_4
191 bool "4"
192
193config QUICC_MULT_FACTOR_5
194 bool "5"
195
196config QUICC_MULT_FACTOR_6
197 bool "6"
198
199config QUICC_MULT_FACTOR_7
200 bool "7"
201
202config QUICC_MULT_FACTOR_8
203 bool "8"
204
205config QUICC_MULT_FACTOR_9
206 depends on ARCH_MPC8360
207 bool "9"
208
209config QUICC_MULT_FACTOR_10
210 depends on ARCH_MPC8360
211 bool "10"
212
213config QUICC_MULT_FACTOR_11
214 depends on ARCH_MPC8360
215 bool "11"
216
217config QUICC_MULT_FACTOR_12
218 depends on ARCH_MPC8360
219 bool "12"
220
221config QUICC_MULT_FACTOR_13
222 depends on ARCH_MPC8360
223 bool "13"
224
225config QUICC_MULT_FACTOR_14
226 depends on ARCH_MPC8360
227 bool "14"
228
229config QUICC_MULT_FACTOR_15
230 depends on ARCH_MPC8360
231 bool "15"
232
233config QUICC_MULT_FACTOR_16
234 depends on ARCH_MPC8360
235 bool "16"
236
237config QUICC_MULT_FACTOR_17
238 depends on ARCH_MPC8360
239 bool "17"
240
241config QUICC_MULT_FACTOR_18
242 depends on ARCH_MPC8360
243 bool "18"
244
245config QUICC_MULT_FACTOR_19
246 depends on ARCH_MPC8360
247 bool "19"
248
249config QUICC_MULT_FACTOR_20
250 depends on ARCH_MPC8360
251 bool "20"
252
253config QUICC_MULT_FACTOR_21
254 depends on ARCH_MPC8360
255 bool "21"
256
257config QUICC_MULT_FACTOR_22
258 depends on ARCH_MPC8360
259 bool "22"
260
261config QUICC_MULT_FACTOR_23
262 depends on ARCH_MPC8360
263 bool "23"
264
265config QUICC_MULT_FACTOR_24
266 depends on ARCH_MPC8360
267 bool "24"
268
269config QUICC_MULT_FACTOR_25
270 depends on ARCH_MPC8360
271 bool "25"
272
273config QUICC_MULT_FACTOR_26
274 depends on ARCH_MPC8360
275 bool "26"
276
277config QUICC_MULT_FACTOR_27
278 depends on ARCH_MPC8360
279 bool "27"
280
281config QUICC_MULT_FACTOR_28
282 depends on ARCH_MPC8360
283 bool "28"
284
285config QUICC_MULT_FACTOR_29
286 depends on ARCH_MPC8360
287 bool "29"
288
289config QUICC_MULT_FACTOR_30
290 depends on ARCH_MPC8360
291 bool "30"
292
293config QUICC_MULT_FACTOR_31
294 depends on ARCH_MPC8360
295 bool "31"
296
297endchoice
298
299endif
300
301if MPC83XX_PCI_SUPPORT
302
303choice
304 prompt "PCI host mode"
305
306config PCI_HOST_MODE_DISABLE
307 bool "Disabled"
308
309config PCI_HOST_MODE_ENABLE
310 bool "Enabled"
311
312endchoice
313
314if ARCH_MPC8349
315
316choice
317 prompt "PCI 64-bit mode"
318
319config PCI_64BIT_MODE_DISABLE
320 bool "Disabled"
321
322config PCI_64BIT_MODE_ENABLE
323 bool "Enabled"
324
325endchoice
326
327endif
328
329choice
330 prompt "PCI internal arbiter 1 mode"
331
332config PCI_INT_ARBITER1_DISABLE
333 bool "Disabled"
334
335config PCI_INT_ARBITER1_ENABLE
336 bool "Enabled"
337
338endchoice
339
340if ARCH_MPC8349
341
342choice
343 prompt "PCI internal arbiter 2 mode"
344
345config PCI_INT_ARBITER2_DISABLE
346 bool "Disabled"
347
348config PCI_INT_ARBITER2_ENABLE
349 bool "Enabled"
350
351endchoice
352
353endif
354
355if ARCH_MPC8360
356
357choice
358 prompt "PCI clock output drive"
359
360config PCI_CLOCK_OUTPUT_DRIVE_DISABLE
361 bool "Disabled"
362
363config PCI_CLOCK_OUTPUT_DRIVE_ENABLE
364 bool "Enabled"
365
366endchoice
367
368endif
369
370endif
371
372choice
373 prompt "Core disable mode"
374
375config CORE_DISABLE_MODE_OFF
376 bool "Off"
377
378config CORE_DISABLE_MODE_ON
379 bool "On"
380
381endchoice
382
383choice
384 prompt "Boot Memory Space"
385
386config BOOT_MEMORY_SPACE_HIGH
387 bool "High"
388
389config BOOT_MEMORY_SPACE_LOW
390 bool "Low"
391
392endchoice
393
394choice
395 prompt "Boot Sequencer Configuration"
396
397config BOOT_SEQUENCER_DISABLED
398 bool "Disabled"
399
400config BOOT_SEQUENCER_NORMAL_I2C
401 bool "Normal I2C"
402
403config BOOT_SEQUENCER_EXTENDED_I2C
404 bool "Extended I2C"
405
406endchoice
407
408choice
409 prompt "Software Watchdog"
410
411config SOFTWARE_WATCHDOG_DISABLED
412 bool "Disabled"
413
414config SOFTWARE_WATCHDOG_ENABLED
415 bool "Enabled"
416
417endchoice
418
419choice
420 prompt "Boot ROM interface location"
421
422config BOOT_ROM_INTERFACE_DDR_SDRAM
423 bool "DDR_SDRAM"
424
425config BOOT_ROM_INTERFACE_PCI1
426 depends on MPC83XX_PCI_SUPPORT
427 bool "PCI1"
428
429config BOOT_ROM_INTERFACE_PCI2
430 depends on MPC83XX_PCI_SUPPORT && ARCH_MPC8349
431 bool "PCI2"
432
433config BOOT_ROM_INTERFACE_ON_CHIP_BOOT_ROM
434 depends on ARCH_MPC837X
435 bool "PCI2"
436
437config BOOT_ROM_INTERFACE_ESDHC
438 depends on ARCH_MPC8309
439 bool "eSDHC"
440
441config BOOT_ROM_INTERFACE_SPI
442 depends on ARCH_MPC8309
443 bool "SPI"
444
445config BOOT_ROM_INTERFACE_GPCM_8BIT
446 bool "Local bus GPCM - 8-bit ROM"
447
448config BOOT_ROM_INTERFACE_GPCM_16BIT
449 bool "Local bus GPCM - 16-bit ROM"
450
451config BOOT_ROM_INTERFACE_GPCM_32BIT
452 depends on ARCH_MPC8349 || ARCH_MPC8360 || ARCH_MPC837X
453 bool "Local bus GPCM - 32-bit ROM"
454
455config BOOT_ROM_INTERFACE_NAND_FLASH_8BIT_SMALL
456 depends on !ARCH_MPC832X && !ARCH_MPC8349 && !ARCH_MPC8360
457 bool "Local bus NAND Flash- 8-bit small page ROM"
458
459config BOOT_ROM_INTERFACE_NAND_FLASH_8BIT_LARGE
460 depends on !ARCH_MPC832X && !ARCH_MPC8349 && !ARCH_MPC8360
461 bool "Local bus NAND Flash- 8-bit large page ROM"
462
463endchoice
464
465if MPC83XX_TSEC1_SUPPORT
466
467choice
468 prompt "TSEC1 mode"
469
470config TSEC1_MODE_MII
471 depends on !ARCH_MPC8349
472 bool "MII"
473
474config TSEC1_MODE_RMII
475 depends on ARCH_MPC831X && !ARCH_MPC8349
476 bool "RMII"
477
478config TSEC1_MODE_RGMII
479 bool "RGMII"
480
481config TSEC1_MODE_RTBI
482 depends on ARCH_MPC831X || ARCH_MPC837X
483 bool "RTBI"
484
485config TSEC1_MODE_GMII
486 depends on ARCH_MPC8349
487 bool "GMII"
488
489config TSEC1_MODE_TBI
490 depends on ARCH_MPC8349
491 bool "TBI"
492
493config TSEC1_MODE_SGMII
494 depends on ARCH_MPC831X || ARCH_MPC837X
495 bool "SGMII"
496
497endchoice
498
499endif
500
501if MPC83XX_TSEC2_SUPPORT
502
503choice
504 prompt "TSEC2 mode"
505
506config TSEC2_MODE_MII
507 depends on !ARCH_MPC8349
508 bool "MII"
509
510config TSEC2_MODE_RMII
511 depends on ARCH_MPC831X && !ARCH_MPC8349
512 bool "RMII"
513
514config TSEC2_MODE_RGMII
515 bool "RGMII"
516
517config TSEC2_MODE_RTBI
518 depends on ARCH_MPC831X || ARCH_MPC837X
519 bool "RTBI"
520
521config TSEC2_MODE_GMII
522 depends on ARCH_MPC8349
523 bool "GMII"
524
525config TSEC2_MODE_TBI
526 depends on ARCH_MPC8349
527 bool "TBI"
528
529config TSEC2_MODE_SGMII
530 depends on ARCH_MPC831X || ARCH_MPC837X
531 bool "SGMII"
532
533endchoice
534
535endif
536
537choice
538 prompt "True litle-endian mode"
539
540config TRUE_LITTLE_ENDIAN_BIG_ENDIAN
541 bool "Big-endian"
542
543config TRUE_LITTLE_ENDIAN_LITTLE_ENDIAN
544 bool "Little-endian"
545
546endchoice
547
548if ARCH_MPC8360
549
550choice
551 prompt "Secondary DDR IO"
552
553config SECONDARY_DDR_IO_DISABLE
554 bool "Disable"
555
556config SECONDARY_DDR_IO_ENABLE
557 bool "Enable"
558
559endchoice
560
561endif
562
563if ARCH_MPC831X || ARCH_MPC832X || ARCH_MPC8349 || ARCH_MPC8360
564
565choice
566 prompt "LALE timing"
567
568config LALE_TIMING_NORMAL
569 bool "Normal"
570
571config LALE_TIMING_EARLIER
572 bool "Earlier"
573
574endchoice
575
576endif
577
578if MPC83XX_LDP_PIN
579
580choice
581 prompt "LDP pin mux state"
582
583config LDP_PIN_MUX_STATE_1
584 bool "Inital value 1"
585
586config LDP_PIN_MUX_STATE_0
587 bool "Inital value 0"
588
589endchoice
590
591endif
592
593endmenu
594
595config LBMC_CLOCK_MODE
596 int
597 default 0 if LBMC_CLOCK_MODE_1_1
598 default 1 if LBMC_CLOCK_MODE_1_2
599
600config DDR_MC_CLOCK_MODE
601 int
602 default 1 if DDR_MC_CLOCK_MODE_1_2
603 default 0 if DDR_MC_CLOCK_MODE_1_1
604
605config SYSTEM_PLL_VCO_DIV
606 int
607 default 0 if ARCH_MPC8349 || ARCH_MPC832X
608 default 2 if ARCH_MPC8313
609 default 0 if SYSTEM_PLL_VCO_DIV_2 && !ARCH_MPC8360 && !ARCH_MPC837X
610 default 1 if SYSTEM_PLL_VCO_DIV_4 && !ARCH_MPC8360 && !ARCH_MPC837X
611 default 2 if SYSTEM_PLL_VCO_DIV_8 && !ARCH_MPC8360 && !ARCH_MPC837X
612 default 0 if SYSTEM_PLL_VCO_DIV_4 && (ARCH_MPC8360 || ARCH_MPC837X)
613 default 1 if SYSTEM_PLL_VCO_DIV_8 && (ARCH_MPC8360 || ARCH_MPC837X)
614 default 2 if SYSTEM_PLL_VCO_DIV_2 && (ARCH_MPC8360 || ARCH_MPC837X)
615 default 3 if SYSTEM_PLL_VCO_DIV_1
616
617config SYSTEM_PLL_FACTOR
618 int
619 default 2 if SYSTEM_PLL_FACTOR_2_1
620 default 3 if SYSTEM_PLL_FACTOR_3_1
621 default 4 if SYSTEM_PLL_FACTOR_4_1
622 default 5 if SYSTEM_PLL_FACTOR_5_1
623 default 6 if SYSTEM_PLL_FACTOR_6_1
624 default 7 if SYSTEM_PLL_FACTOR_7_1
625 default 8 if SYSTEM_PLL_FACTOR_8_1
626 default 9 if SYSTEM_PLL_FACTOR_9_1
627 default 10 if SYSTEM_PLL_FACTOR_10_1
628 default 11 if SYSTEM_PLL_FACTOR_11_1
629 default 12 if SYSTEM_PLL_FACTOR_12_1
630 default 13 if SYSTEM_PLL_FACTOR_13_1
631 default 14 if SYSTEM_PLL_FACTOR_14_1
632 default 15 if SYSTEM_PLL_FACTOR_15_1
633 default 0 if SYSTEM_PLL_FACTOR_16_1
634
635config CORE_PLL_RATIO
636 hex
637 default 0x0 if CORE_PLL_BYPASS
638 default 0x02 if CORE_PLL_RATIO_1_1 && CORE_PLL_VCO_DIVIDER_2
639 default 0x22 if CORE_PLL_RATIO_1_1 && CORE_PLL_VCO_DIVIDER_4
640 default 0x42 if CORE_PLL_RATIO_1_1 && CORE_PLL_VCO_DIVIDER_8
641 default 0x03 if CORE_PLL_RATIO_15_1 && CORE_PLL_VCO_DIVIDER_2
642 default 0x23 if CORE_PLL_RATIO_15_1 && CORE_PLL_VCO_DIVIDER_4
643 default 0x43 if CORE_PLL_RATIO_15_1 && CORE_PLL_VCO_DIVIDER_8
644 default 0x04 if CORE_PLL_RATIO_2_1 && CORE_PLL_VCO_DIVIDER_2
645 default 0x24 if CORE_PLL_RATIO_2_1 && CORE_PLL_VCO_DIVIDER_4
646 default 0x44 if CORE_PLL_RATIO_2_1 && CORE_PLL_VCO_DIVIDER_8
647 default 0x05 if CORE_PLL_RATIO_25_1 && CORE_PLL_VCO_DIVIDER_2
648 default 0x25 if CORE_PLL_RATIO_25_1 && CORE_PLL_VCO_DIVIDER_4
649 default 0x45 if CORE_PLL_RATIO_25_1 && CORE_PLL_VCO_DIVIDER_8
650 default 0x06 if CORE_PLL_RATIO_3_1 && CORE_PLL_VCO_DIVIDER_2
651 default 0x26 if CORE_PLL_RATIO_3_1 && CORE_PLL_VCO_DIVIDER_4
652 default 0x46 if CORE_PLL_RATIO_3_1 && CORE_PLL_VCO_DIVIDER_8
653
654config CORE_DISABLE_MODE
655 int
656 default 0 if CORE_DISABLE_MODE_OFF
657 default 1 if CORE_DISABLE_MODE_ON
658
659config BOOT_MEMORY_SPACE
660 int
661 default 0 if BOOT_MEMORY_SPACE_LOW
662 default 1 if BOOT_MEMORY_SPACE_HIGH
663
664config BOOT_SEQUENCER
665 int
666 default 0 if BOOT_SEQUENCER_DISABLED
667 default 1 if BOOT_SEQUENCER_NORMAL_I2C
668 default 2 if BOOT_SEQUENCER_EXTENDED_I2C
669
670config SOFTWARE_WATCHDOG
671 int
672 default 0 if SOFTWARE_WATCHDOG_DISABLED
673 default 1 if SOFTWARE_WATCHDOG_ENABLED
674
675config BOOT_ROM_INTERFACE
676 hex
677 default 0x0 if BOOT_ROM_INTERFACE_DDR_SDRAM
678 default 0x4 if BOOT_ROM_INTERFACE_PCI1
679 default 0x8 if BOOT_ROM_INTERFACE_PCI2
680 default 0x8 if BOOT_ROM_INTERFACE_ESDHC
681 default 0xc if BOOT_ROM_INTERFACE_SPI
682 default 0xc if BOOT_ROM_INTERFACE_ON_CHIP_BOOT_ROM
683 default 0x14 if BOOT_ROM_INTERFACE_GPCM_8BIT
684 default 0x18 if BOOT_ROM_INTERFACE_GPCM_16BIT
685 default 0x1c if BOOT_ROM_INTERFACE_GPCM_32BIT
686 default 0x5 if BOOT_ROM_INTERFACE_NAND_FLASH_8BIT_SMALL
687 default 0x15 if BOOT_ROM_INTERFACE_NAND_FLASH_8BIT_LARGE
688
689config TSEC1_MODE
690 hex
691 default 0x0 if !MPC83XX_TSEC1_SUPPORT
692 default 0x0 if TSEC1_MODE_MII
693 default 0x1 if TSEC1_MODE_RMII
694 default 0x3 if TSEC1_MODE_RGMII && !ARCH_MPC8349
695 default 0x5 if TSEC1_MODE_RTBI && !ARCH_MPC8349
696 default 0x6 if TSEC1_MODE_SGMII
697 default 0x0 if TSEC1_MODE_RGMII && ARCH_MPC8349
698 default 0x1 if TSEC1_MODE_RTBI && ARCH_MPC8349
699 default 0x2 if TSEC1_MODE_GMII
700 default 0x3 if TSEC1_MODE_TBI
701
702config TSEC2_MODE
703 hex
704 default 0x0 if !MPC83XX_TSEC2_SUPPORT
705 default 0x0 if TSEC2_MODE_MII
706 default 0x1 if TSEC2_MODE_RMII
707 default 0x3 if TSEC2_MODE_RGMII && !ARCH_MPC8349
708 default 0x5 if TSEC2_MODE_RTBI && !ARCH_MPC8349
709 default 0x6 if TSEC2_MODE_SGMII
710 default 0x0 if TSEC2_MODE_RGMII && ARCH_MPC8349
711 default 0x1 if TSEC2_MODE_RTBI && ARCH_MPC8349
712 default 0x2 if TSEC2_MODE_GMII
713 default 0x3 if TSEC2_MODE_TBI
714
715config SECONDARY_DDR_IO
716 int
717 default 0 if !ARCH_MPC8360
718 default 0 if SECONDARY_DDR_IO_DISABLE
719 default 1 if SECONDARY_DDR_IO_ENABLE
720
721config TRUE_LITTLE_ENDIAN
722 int
723 default 0 if TRUE_LITTLE_ENDIAN_BIG_ENDIAN
724 default 1 if TRUE_LITTLE_ENDIAN_LITTLE_ENDIAN
725
726config LALE_TIMING
727 int
728 default 0 if ARCH_MPC830X || ARCH_MPC837X
729 default 0 if LALE_TIMING_NORMAL
730 default 1 if LALE_TIMING_EARLIER
731
732config LDP_PIN_MUX_STATE
733 int
734 default 0 if !MPC83XX_LDP_PIN
735 default 0 if LDP_PIN_MUX_STATE_1
736 default 1 if LDP_PIN_MUX_STATE_0
737
738config QUICC_VCO_DIVIDER
739 int
740 default 0 if !MPC83XX_QUICC_ENGINE
741 default 0 if QUICC_VCO_DIVIDER_2 && ARCH_MPC8309
742 default 1 if QUICC_VCO_DIVIDER_4 && ARCH_MPC8309
743 default 2 if QUICC_VCO_DIVIDER_8 && ARCH_MPC8309
744 default 2 if QUICC_VCO_DIVIDER_2 && (ARCH_MPC832X || ARCH_MPC8360)
745 default 0 if QUICC_VCO_DIVIDER_4 && (ARCH_MPC832X || ARCH_MPC8360)
746 default 1 if QUICC_VCO_DIVIDER_8 && ARCH_MPC8360
747
748config QUICC_DIV_FACTOR
749 int
750 default 0 if !MPC83XX_QUICC_ENGINE
751 default 0 if QUICC_DIV_FACTOR_1
752 default 1 if QUICC_DIV_FACTOR_2
753
754config QUICC_MULT_FACTOR
755 int
756 default 0 if !MPC83XX_QUICC_ENGINE
757 default 2 if QUICC_MULT_FACTOR_2
758 default 3 if QUICC_MULT_FACTOR_3
759 default 4 if QUICC_MULT_FACTOR_4
760 default 5 if QUICC_MULT_FACTOR_5
761 default 6 if QUICC_MULT_FACTOR_6
762 default 7 if QUICC_MULT_FACTOR_7
763 default 8 if QUICC_MULT_FACTOR_8
764 default 9 if QUICC_MULT_FACTOR_9
765 default 10 if QUICC_MULT_FACTOR_10
766 default 11 if QUICC_MULT_FACTOR_11
767 default 12 if QUICC_MULT_FACTOR_12
768 default 13 if QUICC_MULT_FACTOR_13
769 default 14 if QUICC_MULT_FACTOR_14
770 default 15 if QUICC_MULT_FACTOR_15
771 default 16 if QUICC_MULT_FACTOR_16
772 default 17 if QUICC_MULT_FACTOR_17
773 default 18 if QUICC_MULT_FACTOR_18
774 default 19 if QUICC_MULT_FACTOR_19
775 default 20 if QUICC_MULT_FACTOR_20
776 default 21 if QUICC_MULT_FACTOR_21
777 default 22 if QUICC_MULT_FACTOR_22
778 default 23 if QUICC_MULT_FACTOR_23
779 default 24 if QUICC_MULT_FACTOR_24
780 default 25 if QUICC_MULT_FACTOR_25
781 default 26 if QUICC_MULT_FACTOR_26
782 default 27 if QUICC_MULT_FACTOR_27
783 default 28 if QUICC_MULT_FACTOR_28
784 default 29 if QUICC_MULT_FACTOR_29
785 default 30 if QUICC_MULT_FACTOR_30
786 default 31 if QUICC_MULT_FACTOR_31
787
788config PCI_HOST_MODE
789 int
790 default 0 if !MPC83XX_PCI_SUPPORT && !ARCH_MPC8308
791 default 0 if PCI_HOST_MODE_DISABLE
792 default 1 if PCI_HOST_MODE_ENABLE || ARCH_MPC8308 # MPC8308 needs this bit set regardless
793
794config PCI_64BIT_MODE
795 int
796 default 0 if !ARCH_MPC8349
797 default 0 if PCI_64BIT_MODE_DISABLE
798 default 1 if PCI_64BIT_MODE_ENABLE
799
800config PCI_INT_ARBITER1
801 int
802 default 0 if !MPC83XX_PCI_SUPPORT && !ARCH_MPC8308
803 default 0 if PCI_INT_ARBITER1_DISABLE
804 default 1 if PCI_INT_ARBITER1_ENABLE || ARCH_MPC8308 # MPC8308 needs this bit set regardless
805
806config PCI_INT_ARBITER2
807 int
808 default 0 if !ARCH_MPC8349
809 default 0 if PCI_INT_ARBITER2_DISABLE
810 default 1 if PCI_INT_ARBITER2_ENABLE
811
812config PCI_CLOCK_OUTPUT_DRIVE
813 int
814 default 0 if !ARCH_MPC8360
815 default 0 if PCI_CLOCK_OUTPUT_DRIVE_DISABLE
816 default 1 if PCI_CLOCK_OUTPUT_DRIVE_ENABLE