wdenk | 591dda5 | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 1 | /* |
Bin Meng | 8c5acf4 | 2014-12-12 21:05:22 +0800 | [diff] [blame] | 2 | * U-Boot - x86 Startup Code |
wdenk | 591dda5 | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 3 | * |
Graeme Russ | 45fc1d8 | 2011-04-13 19:43:26 +1000 | [diff] [blame] | 4 | * (C) Copyright 2008-2011 |
| 5 | * Graeme Russ, <graeme.russ@gmail.com> |
| 6 | * |
| 7 | * (C) Copyright 2002 |
Albert ARIBAUD | 60fbc8d | 2011-08-04 18:45:45 +0200 | [diff] [blame] | 8 | * Daniel Engström, Omicron Ceti AB, <daniel@omicron.se> |
wdenk | 591dda5 | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 9 | * |
Wolfgang Denk | d79de1d | 2013-07-08 09:37:19 +0200 | [diff] [blame] | 10 | * SPDX-License-Identifier: GPL-2.0+ |
wdenk | 591dda5 | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 11 | */ |
| 12 | |
wdenk | 591dda5 | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 13 | #include <config.h> |
Graeme Russ | 5fb91cc | 2010-10-07 20:03:29 +1100 | [diff] [blame] | 14 | #include <asm/global_data.h> |
Simon Glass | 245561d | 2014-11-12 22:42:09 -0700 | [diff] [blame] | 15 | #include <asm/post.h> |
Graeme Russ | 391bb95 | 2011-12-31 10:24:36 +1100 | [diff] [blame] | 16 | #include <asm/processor.h> |
Graeme Russ | 93efcb2 | 2011-02-12 15:11:32 +1100 | [diff] [blame] | 17 | #include <asm/processor-flags.h> |
Graeme Russ | 3536896 | 2011-12-31 22:58:15 +1100 | [diff] [blame] | 18 | #include <generated/generic-asm-offsets.h> |
Bin Meng | 8c5acf4 | 2014-12-12 21:05:22 +0800 | [diff] [blame] | 19 | #include <generated/asm-offsets.h> |
wdenk | 591dda5 | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 20 | |
wdenk | 591dda5 | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 21 | .section .text |
| 22 | .code32 |
| 23 | .globl _start |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 24 | .type _start, @function |
Graeme Russ | cbfce1d | 2011-04-13 19:43:28 +1000 | [diff] [blame] | 25 | .globl _x86boot_start |
| 26 | _x86boot_start: |
Graeme Russ | 8accbb9 | 2010-04-24 00:05:42 +1000 | [diff] [blame] | 27 | /* |
| 28 | * This is the fail safe 32-bit bootstrap entry point. The |
| 29 | * following code is not executed from a cold-reset (actually, a |
| 30 | * lot of it is, but from real-mode after cold reset. It is |
| 31 | * repeated here to put the board into a state as close to cold |
| 32 | * reset as necessary) |
| 33 | */ |
| 34 | cli |
| 35 | cld |
| 36 | |
Graeme Russ | c379b5d | 2011-11-08 02:33:23 +0000 | [diff] [blame] | 37 | /* Turn off cache (this might require a 486-class CPU) */ |
Graeme Russ | 8accbb9 | 2010-04-24 00:05:42 +1000 | [diff] [blame] | 38 | movl %cr0, %eax |
Graeme Russ | 93efcb2 | 2011-02-12 15:11:32 +1100 | [diff] [blame] | 39 | orl $(X86_CR0_NW | X86_CR0_CD), %eax |
Graeme Russ | 8accbb9 | 2010-04-24 00:05:42 +1000 | [diff] [blame] | 40 | movl %eax, %cr0 |
| 41 | wbinvd |
| 42 | |
Gabe Black | ef89932 | 2012-11-03 11:41:28 +0000 | [diff] [blame] | 43 | /* Tell 32-bit code it is being entered from an in-RAM copy */ |
| 44 | movw $GD_FLG_WARM_BOOT, %bx |
| 45 | jmp 1f |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 46 | _start: |
Gabe Black | ef89932 | 2012-11-03 11:41:28 +0000 | [diff] [blame] | 47 | /* |
| 48 | * This is the 32-bit cold-reset entry point. Initialize %bx to 0 |
| 49 | * in case we're preceeded by some sort of boot stub. |
| 50 | */ |
| 51 | movw $GD_FLG_COLD_BOOT, %bx |
| 52 | 1: |
Simon Glass | 1f4476c | 2014-11-06 13:20:10 -0700 | [diff] [blame] | 53 | /* Save BIST */ |
| 54 | movl %eax, %ebp |
Graeme Russ | 8accbb9 | 2010-04-24 00:05:42 +1000 | [diff] [blame] | 55 | |
Graeme Russ | 45fc1d8 | 2011-04-13 19:43:26 +1000 | [diff] [blame] | 56 | /* Load the segement registes to match the gdt loaded in start16.S */ |
Graeme Russ | 391bb95 | 2011-12-31 10:24:36 +1100 | [diff] [blame] | 57 | movl $(X86_GDT_ENTRY_32BIT_DS * X86_GDT_ENTRY_SIZE), %eax |
Graeme Russ | 3e6ec38 | 2010-10-07 20:03:21 +1100 | [diff] [blame] | 58 | movw %ax, %fs |
| 59 | movw %ax, %ds |
| 60 | movw %ax, %gs |
| 61 | movw %ax, %es |
| 62 | movw %ax, %ss |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 63 | |
Mike Williams | bf895ad | 2011-07-22 04:01:30 +0000 | [diff] [blame] | 64 | /* Clear the interrupt vectors */ |
Graeme Russ | 8accbb9 | 2010-04-24 00:05:42 +1000 | [diff] [blame] | 65 | lidt blank_idt_ptr |
| 66 | |
wdenk | 591dda5 | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 67 | /* Early platform init (setup gpio, etc ) */ |
wdenk | 591dda5 | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 68 | jmp early_board_init |
Graeme Russ | 157b0e9 | 2010-10-07 20:03:27 +1100 | [diff] [blame] | 69 | .globl early_board_init_ret |
wdenk | 591dda5 | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 70 | early_board_init_ret: |
Simon Glass | 245561d | 2014-11-12 22:42:09 -0700 | [diff] [blame] | 71 | post_code(POST_START) |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 72 | |
Graeme Russ | bc76193 | 2011-02-12 15:11:52 +1100 | [diff] [blame] | 73 | /* Initialise Cache-As-RAM */ |
| 74 | jmp car_init |
| 75 | .globl car_init_ret |
| 76 | car_init_ret: |
Bin Meng | 005f0af | 2014-12-12 21:05:31 +0800 | [diff] [blame] | 77 | #ifndef CONFIG_HAVE_FSP |
Graeme Russ | bc76193 | 2011-02-12 15:11:52 +1100 | [diff] [blame] | 78 | /* |
| 79 | * We now have CONFIG_SYS_CAR_SIZE bytes of Cache-As-RAM (or SRAM, |
| 80 | * or fully initialised SDRAM - we really don't care which) |
| 81 | * starting at CONFIG_SYS_CAR_ADDR to be used as a temporary stack |
Simon Glass | 268eefd | 2014-11-12 22:42:28 -0700 | [diff] [blame] | 82 | * and early malloc area. The MRC requires some space at the top. |
Simon Glass | a4fd0db | 2014-11-06 13:20:04 -0700 | [diff] [blame] | 83 | * |
| 84 | * Stack grows down from top of CAR. We have: |
| 85 | * |
| 86 | * top-> CONFIG_SYS_CAR_ADDR + CONFIG_SYS_CAR_SIZE |
Simon Glass | 268eefd | 2014-11-12 22:42:28 -0700 | [diff] [blame] | 87 | * MRC area |
Simon Glass | a4fd0db | 2014-11-06 13:20:04 -0700 | [diff] [blame] | 88 | * global_data |
| 89 | * x86 global descriptor table |
| 90 | * early malloc area |
| 91 | * stack |
| 92 | * bottom-> CONFIG_SYS_CAR_ADDR |
Graeme Russ | bc76193 | 2011-02-12 15:11:52 +1100 | [diff] [blame] | 93 | */ |
Simon Glass | 268eefd | 2014-11-12 22:42:28 -0700 | [diff] [blame] | 94 | movl $(CONFIG_SYS_CAR_ADDR + CONFIG_SYS_CAR_SIZE - 4), %esp |
| 95 | #ifdef CONFIG_DCACHE_RAM_MRC_VAR_SIZE |
| 96 | subl $CONFIG_DCACHE_RAM_MRC_VAR_SIZE, %esp |
| 97 | #endif |
Bin Meng | 005f0af | 2014-12-12 21:05:31 +0800 | [diff] [blame] | 98 | #else |
| 99 | /* |
| 100 | * When we get here after car_init, esp points to a temporary stack |
| 101 | * and esi holds the HOB list address returned by the FSP. |
| 102 | */ |
| 103 | #endif |
Graeme Russ | 007818a | 2012-11-27 15:38:36 +0000 | [diff] [blame] | 104 | |
| 105 | /* Reserve space on stack for global data */ |
| 106 | subl $GENERATED_GBL_DATA_SIZE, %esp |
| 107 | |
| 108 | /* Align global data to 16-byte boundary */ |
| 109 | andl $0xfffffff0, %esp |
Simon Glass | 245561d | 2014-11-12 22:42:09 -0700 | [diff] [blame] | 110 | post_code(POST_START_STACK) |
Graeme Russ | 007818a | 2012-11-27 15:38:36 +0000 | [diff] [blame] | 111 | |
Simon Glass | 73e44fb | 2014-10-10 07:49:15 -0600 | [diff] [blame] | 112 | /* Zero the global data since it won't happen later */ |
| 113 | xorl %eax, %eax |
| 114 | movl $GENERATED_GBL_DATA_SIZE, %ecx |
| 115 | movl %esp, %edi |
| 116 | rep stosb |
| 117 | |
Bin Meng | 005f0af | 2014-12-12 21:05:31 +0800 | [diff] [blame] | 118 | #ifdef CONFIG_HAVE_FSP |
Bin Meng | d560c5c | 2015-06-07 11:33:14 +0800 | [diff] [blame] | 119 | test %esi, %esi |
| 120 | jz skip_hob |
| 121 | |
Bin Meng | 005f0af | 2014-12-12 21:05:31 +0800 | [diff] [blame] | 122 | /* Store HOB list */ |
| 123 | movl %esp, %edx |
| 124 | addl $GD_HOB_LIST, %edx |
| 125 | movl %esi, (%edx) |
Bin Meng | 005f0af | 2014-12-12 21:05:31 +0800 | [diff] [blame] | 126 | |
Bin Meng | d560c5c | 2015-06-07 11:33:14 +0800 | [diff] [blame] | 127 | skip_hob: |
| 128 | #endif |
Simon Glass | a4fd0db | 2014-11-06 13:20:04 -0700 | [diff] [blame] | 129 | /* Setup first parameter to setup_gdt, pointer to global_data */ |
Graeme Russ | 007818a | 2012-11-27 15:38:36 +0000 | [diff] [blame] | 130 | movl %esp, %eax |
| 131 | |
| 132 | /* Reserve space for global descriptor table */ |
| 133 | subl $X86_GDT_SIZE, %esp |
| 134 | |
Simon Glass | a4fd0db | 2014-11-06 13:20:04 -0700 | [diff] [blame] | 135 | /* Align temporary global descriptor table to 16-byte boundary */ |
| 136 | andl $0xfffffff0, %esp |
| 137 | movl %esp, %ecx |
| 138 | |
Simon Glass | b24a951 | 2014-10-10 07:49:16 -0600 | [diff] [blame] | 139 | #if defined(CONFIG_SYS_MALLOC_F_LEN) |
| 140 | subl $CONFIG_SYS_MALLOC_F_LEN, %esp |
| 141 | movl %eax, %edx |
| 142 | addl $GD_MALLOC_BASE, %edx |
| 143 | movl %esp, (%edx) |
| 144 | #endif |
Simon Glass | 1f4476c | 2014-11-06 13:20:10 -0700 | [diff] [blame] | 145 | /* Store BIST */ |
| 146 | movl %eax, %edx |
| 147 | addl $GD_BIST, %edx |
| 148 | movl %ebp, (%edx) |
Graeme Russ | 007818a | 2012-11-27 15:38:36 +0000 | [diff] [blame] | 149 | |
| 150 | /* Set second parameter to setup_gdt */ |
Simon Glass | a4fd0db | 2014-11-06 13:20:04 -0700 | [diff] [blame] | 151 | movl %ecx, %edx |
Graeme Russ | 007818a | 2012-11-27 15:38:36 +0000 | [diff] [blame] | 152 | |
Graeme Russ | 007818a | 2012-11-27 15:38:36 +0000 | [diff] [blame] | 153 | /* Setup global descriptor table so gd->xyz works */ |
| 154 | call setup_gdt |
Graeme Russ | 3536896 | 2011-12-31 22:58:15 +1100 | [diff] [blame] | 155 | |
Graeme Russ | 3818393 | 2011-02-12 15:11:54 +1100 | [diff] [blame] | 156 | /* Set parameter to board_init_f() to boot flags */ |
Simon Glass | 245561d | 2014-11-12 22:42:09 -0700 | [diff] [blame] | 157 | post_code(POST_START_DONE) |
Graeme Russ | 45fc1d8 | 2011-04-13 19:43:26 +1000 | [diff] [blame] | 158 | xorl %eax, %eax |
Graeme Russ | 5fb91cc | 2010-10-07 20:03:29 +1100 | [diff] [blame] | 159 | |
Graeme Russ | 45fc1d8 | 2011-04-13 19:43:26 +1000 | [diff] [blame] | 160 | /* Enter, U-boot! */ |
| 161 | call board_init_f |
wdenk | 591dda5 | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 162 | |
| 163 | /* indicate (lack of) progress */ |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 164 | movw $0x85, %ax |
Graeme Russ | 9c44afc | 2011-02-12 15:11:58 +1100 | [diff] [blame] | 165 | jmp die |
| 166 | |
Graeme Russ | d7755b4 | 2012-01-01 15:06:39 +1100 | [diff] [blame] | 167 | .globl board_init_f_r_trampoline |
| 168 | .type board_init_f_r_trampoline, @function |
| 169 | board_init_f_r_trampoline: |
Graeme Russ | 9c44afc | 2011-02-12 15:11:58 +1100 | [diff] [blame] | 170 | /* |
| 171 | * SDRAM has been initialised, U-Boot code has been copied into |
| 172 | * RAM, BSS has been cleared and relocation adjustments have been |
| 173 | * made. It is now time to jump into the in-RAM copy of U-Boot |
| 174 | * |
Graeme Russ | d7755b4 | 2012-01-01 15:06:39 +1100 | [diff] [blame] | 175 | * %eax = Address of top of new stack |
Graeme Russ | 9c44afc | 2011-02-12 15:11:58 +1100 | [diff] [blame] | 176 | */ |
| 177 | |
Graeme Russ | 007818a | 2012-11-27 15:38:36 +0000 | [diff] [blame] | 178 | /* Stack grows down from top of SDRAM */ |
Graeme Russ | 9c44afc | 2011-02-12 15:11:58 +1100 | [diff] [blame] | 179 | movl %eax, %esp |
| 180 | |
Graeme Russ | 007818a | 2012-11-27 15:38:36 +0000 | [diff] [blame] | 181 | /* Reserve space on stack for global data */ |
| 182 | subl $GENERATED_GBL_DATA_SIZE, %esp |
| 183 | |
| 184 | /* Align global data to 16-byte boundary */ |
| 185 | andl $0xfffffff0, %esp |
| 186 | |
| 187 | /* Setup first parameter to memcpy (and setup_gdt) */ |
| 188 | movl %esp, %eax |
| 189 | |
| 190 | /* Setup second parameter to memcpy */ |
| 191 | fs movl 0, %edx |
| 192 | |
| 193 | /* Set third parameter to memcpy */ |
| 194 | movl $GENERATED_GBL_DATA_SIZE, %ecx |
| 195 | |
| 196 | /* Copy global data from CAR to SDRAM stack */ |
| 197 | call memcpy |
| 198 | |
| 199 | /* Reserve space for global descriptor table */ |
| 200 | subl $X86_GDT_SIZE, %esp |
| 201 | |
| 202 | /* Align global descriptor table to 16-byte boundary */ |
| 203 | andl $0xfffffff0, %esp |
| 204 | |
| 205 | /* Set second parameter to setup_gdt */ |
| 206 | movl %esp, %edx |
| 207 | |
Graeme Russ | 007818a | 2012-11-27 15:38:36 +0000 | [diff] [blame] | 208 | /* Setup global descriptor table so gd->xyz works */ |
| 209 | call setup_gdt |
| 210 | |
Simon Glass | 78da72c | 2015-01-01 16:18:13 -0700 | [diff] [blame] | 211 | /* Set if we need to disable CAR */ |
| 212 | .weak car_uninit |
| 213 | movl $car_uninit, %eax |
| 214 | cmpl $0, %eax |
| 215 | jz 1f |
| 216 | |
| 217 | call car_uninit |
| 218 | 1: |
Graeme Russ | d7755b4 | 2012-01-01 15:06:39 +1100 | [diff] [blame] | 219 | /* Re-enter U-Boot by calling board_init_f_r */ |
| 220 | call board_init_f_r |
Graeme Russ | 9c44afc | 2011-02-12 15:11:58 +1100 | [diff] [blame] | 221 | |
Graeme Russ | c379b5d | 2011-11-08 02:33:23 +0000 | [diff] [blame] | 222 | die: |
| 223 | hlt |
wdenk | 591dda5 | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 224 | jmp die |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 225 | hlt |
Graeme Russ | 8accbb9 | 2010-04-24 00:05:42 +1000 | [diff] [blame] | 226 | |
| 227 | blank_idt_ptr: |
| 228 | .word 0 /* limit */ |
| 229 | .long 0 /* base */ |
Graeme Russ | 786c395 | 2011-11-08 02:33:19 +0000 | [diff] [blame] | 230 | |
| 231 | .p2align 2 /* force 4-byte alignment */ |
| 232 | |
| 233 | multiboot_header: |
| 234 | /* magic */ |
| 235 | .long 0x1BADB002 |
| 236 | /* flags */ |
| 237 | .long (1 << 16) |
| 238 | /* checksum */ |
| 239 | .long -0x1BADB002 - (1 << 16) |
| 240 | /* header addr */ |
| 241 | .long multiboot_header - _x86boot_start + CONFIG_SYS_TEXT_BASE |
| 242 | /* load addr */ |
| 243 | .long CONFIG_SYS_TEXT_BASE |
| 244 | /* load end addr */ |
| 245 | .long 0 |
| 246 | /* bss end addr */ |
| 247 | .long 0 |
| 248 | /* entry addr */ |
| 249 | .long CONFIG_SYS_TEXT_BASE |