| Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
| pekon gupta | f56eb01 | 2014-05-08 21:43:45 +0530 | [diff] [blame] | 2 | /* |
| 3 | * (C) Copyright 2006-2008 |
| 4 | * Texas Instruments, <www.ti.com> |
| 5 | * |
| 6 | * Author |
| 7 | * Mansoor Ahamed <mansoor.ahamed@ti.com> |
| 8 | * |
| 9 | * Initial Code from: |
| 10 | * Richard Woodruff <r-woodruff2@ti.com> |
| pekon gupta | f56eb01 | 2014-05-08 21:43:45 +0530 | [diff] [blame] | 11 | */ |
| 12 | |
| 13 | #ifndef _MEM_H_ |
| 14 | #define _MEM_H_ |
| 15 | |
| 16 | /* |
| 17 | * GPMC settings - |
| 18 | * Definitions is as per the following format |
| 19 | * #define <PART>_GPMC_CONFIG<x> <value> |
| 20 | * Where: |
| 21 | * PART is the part name e.g. STNOR - Intel Strata Flash |
| 22 | * x is GPMC config registers from 1 to 6 (there will be 6 macros) |
| 23 | * Value is corresponding value |
| 24 | * |
| 25 | * For every valid PRCM configuration there should be only one definition of |
| 26 | * the same. if values are independent of the board, this definition will be |
| 27 | * present in this file if values are dependent on the board, then this should |
| 28 | * go into corresponding mem-boardName.h file |
| 29 | * |
| 30 | * Currently valid part Names are (PART): |
| 31 | * M_NAND - Micron NAND |
| 32 | * STNOR - STMicrolelctronics M29W128GL |
| 33 | */ |
| 34 | #define GPMC_SIZE_256M 0x0 |
| 35 | #define GPMC_SIZE_128M 0x8 |
| 36 | #define GPMC_SIZE_64M 0xC |
| 37 | #define GPMC_SIZE_32M 0xE |
| 38 | #define GPMC_SIZE_16M 0xF |
| 39 | |
| 40 | #define M_NAND_GPMC_CONFIG1 0x00000800 |
| 41 | #define M_NAND_GPMC_CONFIG2 0x001e1e00 |
| 42 | #define M_NAND_GPMC_CONFIG3 0x001e1e00 |
| 43 | #define M_NAND_GPMC_CONFIG4 0x16051807 |
| 44 | #define M_NAND_GPMC_CONFIG5 0x00151e1e |
| 45 | #define M_NAND_GPMC_CONFIG6 0x16000f80 |
| 46 | #define M_NAND_GPMC_CONFIG7 0x00000008 |
| 47 | |
| 48 | #define STNOR_GPMC_CONFIG1 0x00001200 |
| 49 | #define STNOR_GPMC_CONFIG2 0x00101000 |
| 50 | #define STNOR_GPMC_CONFIG3 0x00030301 |
| 51 | #define STNOR_GPMC_CONFIG4 0x10041004 |
| 52 | #define STNOR_GPMC_CONFIG5 0x000C1010 |
| 53 | #define STNOR_GPMC_CONFIG6 0x08070280 |
| 54 | #define STNOR_GPMC_CONFIG7 0x00000F48 |
| 55 | |
| 56 | /* max number of GPMC Chip Selects */ |
| 57 | #define GPMC_MAX_CS 8 |
| 58 | /* max number of GPMC regs */ |
| 59 | #define GPMC_MAX_REG 7 |
| 60 | |
| 61 | #endif /* endif _MEM_H_ */ |