Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Stefan Agner | 1301175 | 2017-04-11 11:12:14 +0530 | [diff] [blame] | 2 | /* |
| 3 | * Copyright 2017 Toradex AG |
| 4 | * |
| 5 | * FSL DCU platform driver |
Stefan Agner | 1301175 | 2017-04-11 11:12:14 +0530 | [diff] [blame] | 6 | */ |
| 7 | |
| 8 | #include <asm/arch/crm_regs.h> |
| 9 | #include <asm/io.h> |
| 10 | #include <common.h> |
| 11 | #include <fsl_dcu_fb.h> |
| 12 | #include "div64.h" |
| 13 | |
Stefan Agner | 1301175 | 2017-04-11 11:12:14 +0530 | [diff] [blame] | 14 | unsigned int dcu_set_pixel_clock(unsigned int pixclock) |
| 15 | { |
| 16 | struct ccm_reg *ccm = (struct ccm_reg *)CCM_BASE_ADDR; |
| 17 | unsigned long long div; |
| 18 | |
| 19 | clrbits_le32(&ccm->cscmr1, CCM_CSCMR1_DCU0_CLK_SEL); |
| 20 | clrsetbits_le32(&ccm->cscdr3, |
| 21 | CCM_CSCDR3_DCU0_DIV_MASK | CCM_CSCDR3_DCU0_EN, |
| 22 | CCM_CSCDR3_DCU0_DIV(0) | CCM_CSCDR3_DCU0_EN); |
| 23 | div = (unsigned long long)(PLL1_PFD2_FREQ / 1000); |
| 24 | do_div(div, pixclock); |
| 25 | |
| 26 | return div; |
| 27 | } |
| 28 | |
Igor Opaniuk | 9a0270f | 2019-06-10 14:47:49 +0300 | [diff] [blame] | 29 | int platform_dcu_init(struct fb_info *fbinfo, |
| 30 | unsigned int xres, |
| 31 | unsigned int yres, |
Stefan Agner | 1301175 | 2017-04-11 11:12:14 +0530 | [diff] [blame] | 32 | const char *port, |
| 33 | struct fb_videomode *dcu_fb_videomode) |
| 34 | { |
Igor Opaniuk | 9a0270f | 2019-06-10 14:47:49 +0300 | [diff] [blame] | 35 | fsl_dcu_init(fbinfo, xres, yres, 32); |
Stefan Agner | 1301175 | 2017-04-11 11:12:14 +0530 | [diff] [blame] | 36 | |
| 37 | return 0; |
| 38 | } |