Bin Meng | ee3bcd0 | 2020-03-09 19:35:28 -0700 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0-only |
| 2 | /* |
| 3 | * SBI initialilization and all extension implementation. |
| 4 | * |
| 5 | * Copyright (c) 2020 Western Digital Corporation or its affiliates. |
| 6 | * |
| 7 | * Taken from Linux arch/riscv/kernel/sbi.c |
| 8 | */ |
| 9 | |
| 10 | #include <common.h> |
| 11 | #include <asm/encoding.h> |
| 12 | #include <asm/sbi.h> |
| 13 | |
Bin Meng | ee3bcd0 | 2020-03-09 19:35:28 -0700 | [diff] [blame] | 14 | struct sbiret sbi_ecall(int ext, int fid, unsigned long arg0, |
| 15 | unsigned long arg1, unsigned long arg2, |
| 16 | unsigned long arg3, unsigned long arg4, |
| 17 | unsigned long arg5) |
| 18 | { |
| 19 | struct sbiret ret; |
| 20 | |
| 21 | register uintptr_t a0 asm ("a0") = (uintptr_t)(arg0); |
| 22 | register uintptr_t a1 asm ("a1") = (uintptr_t)(arg1); |
| 23 | register uintptr_t a2 asm ("a2") = (uintptr_t)(arg2); |
| 24 | register uintptr_t a3 asm ("a3") = (uintptr_t)(arg3); |
| 25 | register uintptr_t a4 asm ("a4") = (uintptr_t)(arg4); |
| 26 | register uintptr_t a5 asm ("a5") = (uintptr_t)(arg5); |
| 27 | register uintptr_t a6 asm ("a6") = (uintptr_t)(fid); |
| 28 | register uintptr_t a7 asm ("a7") = (uintptr_t)(ext); |
| 29 | asm volatile ("ecall" |
| 30 | : "+r" (a0), "+r" (a1) |
| 31 | : "r" (a2), "r" (a3), "r" (a4), "r" (a5), "r" (a6), "r" (a7) |
| 32 | : "memory"); |
| 33 | ret.error = a0; |
| 34 | ret.value = a1; |
| 35 | |
| 36 | return ret; |
| 37 | } |
| 38 | |
Atish Patra | a7edd07 | 2020-04-21 14:51:57 -0700 | [diff] [blame] | 39 | /** |
| 40 | * sbi_set_timer() - Program the timer for next timer event. |
| 41 | * @stime_value: The value after which next timer event should fire. |
| 42 | * |
| 43 | * Return: None |
| 44 | */ |
| 45 | void sbi_set_timer(uint64_t stime_value) |
| 46 | { |
| 47 | #if __riscv_xlen == 32 |
| 48 | sbi_ecall(SBI_EXT_SET_TIMER, SBI_FID_SET_TIMER, stime_value, |
| 49 | stime_value >> 32, 0, 0, 0, 0); |
| 50 | #else |
| 51 | sbi_ecall(SBI_EXT_SET_TIMER, SBI_FID_SET_TIMER, stime_value, |
| 52 | 0, 0, 0, 0, 0); |
| 53 | #endif |
| 54 | } |
| 55 | |
Bin Meng | e622c74 | 2020-05-27 02:04:53 -0700 | [diff] [blame] | 56 | /** |
| 57 | * sbi_probe_extension() - Check if an SBI extension ID is supported or not. |
| 58 | * @extid: The extension ID to be probed. |
| 59 | * |
| 60 | * Return: Extension specific nonzero value f yes, -ENOTSUPP otherwise. |
| 61 | */ |
| 62 | int sbi_probe_extension(int extid) |
| 63 | { |
| 64 | struct sbiret ret; |
| 65 | |
| 66 | ret = sbi_ecall(SBI_EXT_BASE, SBI_EXT_BASE_PROBE_EXT, extid, |
| 67 | 0, 0, 0, 0, 0); |
| 68 | if (!ret.error) |
| 69 | if (ret.value) |
| 70 | return ret.value; |
| 71 | |
| 72 | return -ENOTSUPP; |
| 73 | } |
| 74 | |
Bin Meng | 887d809 | 2020-03-09 19:35:30 -0700 | [diff] [blame] | 75 | #ifdef CONFIG_SBI_V01 |
| 76 | |
Bin Meng | ee3bcd0 | 2020-03-09 19:35:28 -0700 | [diff] [blame] | 77 | /** |
| 78 | * sbi_console_putchar() - Writes given character to the console device. |
| 79 | * @ch: The data to be written to the console. |
| 80 | * |
| 81 | * Return: None |
| 82 | */ |
| 83 | void sbi_console_putchar(int ch) |
| 84 | { |
| 85 | sbi_ecall(SBI_EXT_0_1_CONSOLE_PUTCHAR, 0, ch, 0, 0, 0, 0, 0); |
| 86 | } |
| 87 | |
| 88 | /** |
| 89 | * sbi_console_getchar() - Reads a byte from console device. |
| 90 | * |
| 91 | * Returns the value read from console. |
| 92 | */ |
| 93 | int sbi_console_getchar(void) |
| 94 | { |
| 95 | struct sbiret ret; |
| 96 | |
| 97 | ret = sbi_ecall(SBI_EXT_0_1_CONSOLE_GETCHAR, 0, 0, 0, 0, 0, 0, 0); |
| 98 | |
| 99 | return ret.error; |
| 100 | } |
| 101 | |
| 102 | /** |
| 103 | * sbi_clear_ipi() - Clear any pending IPIs for the calling hart. |
| 104 | * |
| 105 | * Return: None |
| 106 | */ |
| 107 | void sbi_clear_ipi(void) |
| 108 | { |
| 109 | sbi_ecall(SBI_EXT_0_1_CLEAR_IPI, 0, 0, 0, 0, 0, 0, 0); |
| 110 | } |
| 111 | |
| 112 | /** |
| 113 | * sbi_shutdown() - Remove all the harts from executing supervisor code. |
| 114 | * |
| 115 | * Return: None |
| 116 | */ |
| 117 | void sbi_shutdown(void) |
| 118 | { |
| 119 | sbi_ecall(SBI_EXT_0_1_SHUTDOWN, 0, 0, 0, 0, 0, 0, 0); |
| 120 | } |
| 121 | |
Bin Meng | ee3bcd0 | 2020-03-09 19:35:28 -0700 | [diff] [blame] | 122 | /** |
| 123 | * sbi_send_ipi() - Send an IPI to any hart. |
| 124 | * @hart_mask: A cpu mask containing all the target harts. |
| 125 | * |
| 126 | * Return: None |
| 127 | */ |
| 128 | void sbi_send_ipi(const unsigned long *hart_mask) |
| 129 | { |
Bin Meng | f7e6d33 | 2020-03-09 19:35:31 -0700 | [diff] [blame] | 130 | sbi_ecall(SBI_EXT_SEND_IPI, SBI_FID_SEND_IPI, (unsigned long)hart_mask, |
Bin Meng | ee3bcd0 | 2020-03-09 19:35:28 -0700 | [diff] [blame] | 131 | 0, 0, 0, 0, 0); |
| 132 | } |
| 133 | |
| 134 | /** |
| 135 | * sbi_remote_fence_i() - Execute FENCE.I instruction on given remote harts. |
| 136 | * @hart_mask: A cpu mask containing all the target harts. |
| 137 | * |
| 138 | * Return: None |
| 139 | */ |
| 140 | void sbi_remote_fence_i(const unsigned long *hart_mask) |
| 141 | { |
Bin Meng | f7e6d33 | 2020-03-09 19:35:31 -0700 | [diff] [blame] | 142 | sbi_ecall(SBI_EXT_REMOTE_FENCE_I, SBI_FID_REMOTE_FENCE_I, |
| 143 | (unsigned long)hart_mask, 0, 0, 0, 0, 0); |
Bin Meng | ee3bcd0 | 2020-03-09 19:35:28 -0700 | [diff] [blame] | 144 | } |
| 145 | |
| 146 | /** |
| 147 | * sbi_remote_sfence_vma() - Execute SFENCE.VMA instructions on given remote |
| 148 | * harts for the specified virtual address range. |
| 149 | * @hart_mask: A cpu mask containing all the target harts. |
| 150 | * @start: Start of the virtual address |
| 151 | * @size: Total size of the virtual address range. |
| 152 | * |
| 153 | * Return: None |
| 154 | */ |
| 155 | void sbi_remote_sfence_vma(const unsigned long *hart_mask, |
| 156 | unsigned long start, |
| 157 | unsigned long size) |
| 158 | { |
Bin Meng | f7e6d33 | 2020-03-09 19:35:31 -0700 | [diff] [blame] | 159 | sbi_ecall(SBI_EXT_REMOTE_SFENCE_VMA, SBI_FID_REMOTE_SFENCE_VMA, |
Bin Meng | ee3bcd0 | 2020-03-09 19:35:28 -0700 | [diff] [blame] | 160 | (unsigned long)hart_mask, start, size, 0, 0, 0); |
| 161 | } |
| 162 | |
| 163 | /** |
| 164 | * sbi_remote_sfence_vma_asid() - Execute SFENCE.VMA instructions on given |
| 165 | * remote harts for a virtual address range belonging to a specific ASID. |
| 166 | * |
| 167 | * @hart_mask: A cpu mask containing all the target harts. |
| 168 | * @start: Start of the virtual address |
| 169 | * @size: Total size of the virtual address range. |
| 170 | * @asid: The value of address space identifier (ASID). |
| 171 | * |
| 172 | * Return: None |
| 173 | */ |
| 174 | void sbi_remote_sfence_vma_asid(const unsigned long *hart_mask, |
| 175 | unsigned long start, |
| 176 | unsigned long size, |
| 177 | unsigned long asid) |
| 178 | { |
Bin Meng | f7e6d33 | 2020-03-09 19:35:31 -0700 | [diff] [blame] | 179 | sbi_ecall(SBI_EXT_REMOTE_SFENCE_VMA_ASID, |
| 180 | SBI_FID_REMOTE_SFENCE_VMA_ASID, |
Bin Meng | ee3bcd0 | 2020-03-09 19:35:28 -0700 | [diff] [blame] | 181 | (unsigned long)hart_mask, start, size, asid, 0, 0); |
| 182 | } |
| 183 | |
Atish Patra | a7edd07 | 2020-04-21 14:51:57 -0700 | [diff] [blame] | 184 | #endif /* CONFIG_SBI_V01 */ |