blob: 14a843641a9c0200ea9d1f8468e7658f86d265ff [file] [log] [blame]
Wu, Josh3f338c12013-04-16 23:42:44 +00001/*
2 * (C) Copyright 2013 Atmel Corporation.
3 * Josh Wu <josh.wu@atmel.com>
4 *
5 * Configuation settings for the AT91SAM9N12-EK boards.
6 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +02007 * SPDX-License-Identifier: GPL-2.0+
Wu, Josh3f338c12013-04-16 23:42:44 +00008 */
9
10#ifndef __AT91SAM9N12_CONFIG_H_
11#define __AT91SAM9N12_CONFIG_H_
12
13/*
14 * SoC must be defined first, before hardware.h is included.
15 * In this case SoC is defined in boards.cfg.
16 */
17#include <asm/hardware.h>
18
19#define CONFIG_SYS_TEXT_BASE 0x26f00000
20
Wu, Josh3f338c12013-04-16 23:42:44 +000021/* ARM asynchronous clock */
22#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */
23#define CONFIG_SYS_AT91_MAIN_CLOCK 16000000 /* main clock xtal */
Wu, Josh3f338c12013-04-16 23:42:44 +000024
25/* Misc CPU related */
26#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
27#define CONFIG_SETUP_MEMORY_TAGS
28#define CONFIG_INITRD_TAG
29#define CONFIG_SKIP_LOWLEVEL_INIT
30#define CONFIG_BOARD_EARLY_INIT_F
31#define CONFIG_DISPLAY_CPUINFO
32
Wu, Josh3f338c12013-04-16 23:42:44 +000033/* general purpose I/O */
34#define CONFIG_AT91_GPIO
35
36/* serial console */
37#define CONFIG_ATMEL_USART
38#define CONFIG_USART_BASE ATMEL_BASE_DBGU
39#define CONFIG_USART_ID ATMEL_ID_SYS
40#define CONFIG_BAUDRATE 115200
41
42/* LCD */
43#define CONFIG_LCD
44#define LCD_BPP LCD_COLOR16
45#define LCD_OUTPUT_BPP 24
46#define CONFIG_LCD_LOGO
47#define CONFIG_LCD_INFO
48#define CONFIG_LCD_INFO_BELOW_LOGO
49#define CONFIG_SYS_WHITE_ON_BLACK
50#define CONFIG_ATMEL_HLCD
51#define CONFIG_ATMEL_LCD_RGB565
52#define CONFIG_SYS_CONSOLE_IS_IN_ENV
53
54#define CONFIG_BOOTDELAY 3
55
56/*
57 * BOOTP options
58 */
59#define CONFIG_BOOTP_BOOTFILESIZE
60#define CONFIG_BOOTP_BOOTPATH
61#define CONFIG_BOOTP_GATEWAY
62#define CONFIG_BOOTP_HOSTNAME
63
64/* NOR flash - no real flash on this board */
65#define CONFIG_SYS_NO_FLASH
66
67/*
68 * Command line configuration.
69 */
Wu, Josh3f338c12013-04-16 23:42:44 +000070#define CONFIG_CMD_BOOTZ
71#define CONFIG_CMD_PING
72#define CONFIG_CMD_DHCP
73#define CONFIG_CMD_NAND
74#define CONFIG_CMD_SF
75#define CONFIG_CMD_MMC
76#define CONFIG_CMD_FAT
Bo Shen8ed87832013-10-21 16:13:59 +080077#define CONFIG_CMD_USB
Wu, Josh3f338c12013-04-16 23:42:44 +000078
79#define CONFIG_NR_DRAM_BANKS 1
80#define CONFIG_SYS_SDRAM_BASE 0x20000000
81#define CONFIG_SYS_SDRAM_SIZE 0x08000000
82
83/*
84 * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM,
85 * leaving the correct space for initial global data structure above
86 * that address while providing maximum stack area below.
87 */
88# define CONFIG_SYS_INIT_SP_ADDR \
89 (ATMEL_BASE_SRAM + 0x1000 - GENERATED_GBL_DATA_SIZE)
90
91/* DataFlash */
92#ifdef CONFIG_CMD_SF
93#define CONFIG_ATMEL_SPI
Wu, Josh3f338c12013-04-16 23:42:44 +000094#define CONFIG_SF_DEFAULT_SPEED 30000000
95#define CONFIG_ENV_SPI_MODE SPI_MODE_3
96#define CONFIG_SF_DEFAULT_MODE SPI_MODE_3
97#endif
98
99/* NAND flash */
100#ifdef CONFIG_CMD_NAND
101#define CONFIG_NAND_ATMEL
102#define CONFIG_SYS_MAX_NAND_DEVICE 1
103#define CONFIG_SYS_NAND_BASE 0x40000000
104#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
105#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
Andreas Bießmanna4c24d32013-11-29 12:13:45 +0100106#define CONFIG_SYS_NAND_ENABLE_PIN GPIO_PIN_PD(4)
107#define CONFIG_SYS_NAND_READY_PIN GPIO_PIN_PD(5)
Wu, Josh3f338c12013-04-16 23:42:44 +0000108
109/* PMECC & PMERRLOC */
110#define CONFIG_ATMEL_NAND_HWECC
111#define CONFIG_ATMEL_NAND_HW_PMECC
112#define CONFIG_PMECC_CAP 2
113#define CONFIG_PMECC_SECTOR_SIZE 512
114#define CONFIG_PMECC_INDEX_TABLE_OFFSET 0x8000
Bo Shen591ef582013-06-26 10:48:53 +0800115
116#define CONFIG_CMD_NAND_TRIMFFS
117
Wu, Josh3f338c12013-04-16 23:42:44 +0000118#endif
119
120#define CONFIG_MTD_PARTITIONS
121#define CONFIG_MTD_DEVICE
122#define CONFIG_CMD_MTDPARTS
123#define MTDIDS_DEFAULT "nand0=atmel_nand"
124#define MTDPARTS_DEFAULT \
125 "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \
126 "256k(env),256k(env_redundant),256k(spare)," \
127 "512k(dtb),6M(kernel)ro,-(rootfs)"
128
129#define CONFIG_EXTRA_ENV_SETTINGS \
130 "console=console=ttyS0,115200\0" \
131 "mtdparts="MTDPARTS_DEFAULT"\0" \
132 "bootargs_nand=rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs rw\0"\
133 "bootargs_mmc=root=/dev/mmcblk0p2 rw rootfstype=ext4 rootwait\0"
134
135/* MMC */
136#ifdef CONFIG_CMD_MMC
137#define CONFIG_MMC
138#define CONFIG_GENERIC_MMC
139#define CONFIG_GENERIC_ATMEL_MCI
140#endif
141
142/* FAT */
143#ifdef CONFIG_CMD_FAT
144#define CONFIG_DOS_PARTITION
145#endif
146
Bo Shend2c26122013-04-24 10:46:18 +0800147/* Ethernet */
148#define CONFIG_KS8851_MLL
149#define CONFIG_KS8851_MLL_BASEADDR 0x30000000 /* use NCS2 */
150
Wu, Josh3f338c12013-04-16 23:42:44 +0000151#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
152
153#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
154#define CONFIG_SYS_MEMTEST_END 0x26e00000
155
Bo Shen8ed87832013-10-21 16:13:59 +0800156/* USB host */
157#ifdef CONFIG_CMD_USB
158#define CONFIG_USB_ATMEL
Bo Shen4a985df2013-10-21 16:14:00 +0800159#define CONFIG_USB_ATMEL_CLK_SEL_PLLB
Bo Shen8ed87832013-10-21 16:13:59 +0800160#define CONFIG_USB_OHCI_NEW
161#define CONFIG_SYS_USB_OHCI_CPU_INIT
162#define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_BASE_OHCI
163#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9n12"
164#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1
165#define CONFIG_USB_STORAGE
166#endif
167
Wu, Josh3f338c12013-04-16 23:42:44 +0000168#ifdef CONFIG_SYS_USE_SPIFLASH
169
170/* bootstrap + u-boot + env + linux in dataflash on CS0 */
171#define CONFIG_ENV_IS_IN_SPI_FLASH
172#define CONFIG_ENV_OFFSET 0x5000
173#define CONFIG_ENV_SIZE 0x3000
174#define CONFIG_ENV_SECT_SIZE 0x1000
175#define CONFIG_BOOTCOMMAND \
176 "setenv bootargs ${console} ${mtdparts} ${bootargs_nand};" \
177 "sf probe 0; sf read 0x22000000 0x100000 0x300000; " \
178 "bootm 0x22000000"
179
180#elif defined(CONFIG_SYS_USE_NANDFLASH)
181
182/* bootstrap + u-boot + env + linux in nandflash */
183#define CONFIG_ENV_IS_IN_NAND
184#define CONFIG_ENV_OFFSET 0xc0000
185#define CONFIG_ENV_OFFSET_REDUND 0x100000
186#define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */
187#define CONFIG_BOOTCOMMAND \
188 "setenv bootargs ${console} ${mtdparts} ${bootargs_nand};" \
189 "nand read 0x21000000 0x180000 0x080000;" \
190 "nand read 0x22000000 0x200000 0x400000;" \
191 "bootm 0x22000000 - 0x21000000"
192
193#else /* CONFIG_SYS_USE_MMC */
194
195/* bootstrap + u-boot + env + linux in mmc */
Wu, Josh32abdfe2015-03-24 17:07:22 +0800196
197#ifdef CONFIG_ENV_IS_IN_MMC
198/* Use raw reserved sectors to save environment */
Wu, Josh3f338c12013-04-16 23:42:44 +0000199#define CONFIG_ENV_OFFSET 0x2000
200#define CONFIG_ENV_SIZE 0x1000
201#define CONFIG_SYS_MMC_ENV_DEV 0
Wu, Josh32abdfe2015-03-24 17:07:22 +0800202#else
203/* Use file in FAT file to save environment */
204#define CONFIG_ENV_IS_IN_FAT
205#define CONFIG_FAT_WRITE
206#define FAT_ENV_INTERFACE "mmc"
207#define FAT_ENV_FILE "uboot.env"
208#define FAT_ENV_DEVICE_AND_PART "0"
209#define CONFIG_ENV_SIZE 0x4000
210#endif
211
Wu, Josh3f338c12013-04-16 23:42:44 +0000212#define CONFIG_BOOTCOMMAND \
213 "setenv bootargs ${console} ${mtdparts} ${bootargs_mmc};" \
214 "fatload mmc 0:1 0x21000000 dtb;" \
215 "fatload mmc 0:1 0x22000000 uImage;" \
216 "bootm 0x22000000 - 0x21000000"
217
218#endif
219
Wu, Josh3f338c12013-04-16 23:42:44 +0000220#define CONFIG_SYS_CBSIZE 256
221#define CONFIG_SYS_MAXARGS 16
Wu, Josh3f338c12013-04-16 23:42:44 +0000222#define CONFIG_SYS_LONGHELP
223#define CONFIG_CMDLINE_EDITING
224#define CONFIG_AUTO_COMPLETE
225#define CONFIG_SYS_HUSH_PARSER
226
227/*
228 * Size of malloc() pool
229 */
230#define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024)
Bo Shen9c709392015-03-27 14:23:36 +0800231
232/* SPL */
233#define CONFIG_SPL_FRAMEWORK
234#define CONFIG_SPL_TEXT_BASE 0x300000
235#define CONFIG_SPL_MAX_SIZE 0x6000
236#define CONFIG_SPL_STACK 0x308000
237
238#define CONFIG_SPL_BSS_START_ADDR 0x20000000
239#define CONFIG_SPL_BSS_MAX_SIZE 0x80000
240#define CONFIG_SYS_SPL_MALLOC_START 0x20080000
241#define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000
242
243#define CONFIG_SPL_LIBCOMMON_SUPPORT
244#define CONFIG_SPL_LIBGENERIC_SUPPORT
245#define CONFIG_SPL_GPIO_SUPPORT
246#define CONFIG_SPL_SERIAL_SUPPORT
247
248#define CONFIG_SPL_BOARD_INIT
249#define CONFIG_SYS_MONITOR_LEN (512 << 10)
250
251#define CONFIG_SYS_MASTER_CLOCK 132096000
252#define CONFIG_SYS_AT91_PLLA 0x20953f03
253#define CONFIG_SYS_MCKR 0x1301
254#define CONFIG_SYS_MCKR_CSS 0x1302
255
Bo Shen9c709392015-03-27 14:23:36 +0800256#ifdef CONFIG_SYS_USE_MMC
257#define CONFIG_SPL_LDSCRIPT arch/arm/mach-at91/arm926ejs/u-boot-spl.lds
258#define CONFIG_SPL_MMC_SUPPORT
259#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x400
260#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x200
261#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
262#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
263#define CONFIG_SPL_FAT_SUPPORT
264#define CONFIG_SPL_LIBDISK_SUPPORT
265
266#elif CONFIG_SYS_USE_NANDFLASH
267#define CONFIG_SPL_NAND_SUPPORT
268#define CONFIG_SPL_NAND_DRIVERS
269#define CONFIG_SPL_NAND_BASE
270#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000
271#define CONFIG_SYS_NAND_5_ADDR_CYCLE
272#define CONFIG_SYS_NAND_PAGE_SIZE 0x800
273#define CONFIG_SYS_NAND_PAGE_COUNT 64
274#define CONFIG_SYS_NAND_OOBSIZE 64
275#define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000
276#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0
277#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER
278
279#elif CONFIG_SYS_USE_SPIFLASH
280#define CONFIG_SPL_SPI_SUPPORT
281#define CONFIG_SPL_SPI_FLASH_SUPPORT
282#define CONFIG_SPL_SPI_LOAD
283#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x8400
284
285#endif
Wu, Josh3f338c12013-04-16 23:42:44 +0000286
287#endif