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git01.mediatek.com / filogic / uboot / 93743d241c64bc1f7ecbf3262d1683176551e11f / . / src / arm64 / freescale / imx8mn-rve-gateway.dts
blob: 1b633bd1ebb6695388a0406269d0d2e876383643 [file] [log] [blame]
Tom Rini93743d22024-04-01 09:08:13 -0400[diff] [blame^]1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright 2023 DimOnOff
4 */
5
6/dts-v1/;
7
8#include <dt-bindings/usb/pd.h>
9#include "imx8mn-var-som.dtsi"
10
11/ {
12 model = "RVE gateway";
13 compatible = "rve,rve-gateway", "variscite,var-som-mx8mn", "fsl,imx8mn";
14
15 crystal_duart_24m: crystal-duart-24m {
16 compatible = "fixed-clock";
17 #clock-cells = <0>;
18 clock-frequency = <24000000>;
19 };
20
21 gpio-keys {
22 compatible = "gpio-keys";
23 pinctrl-names = "default";
24 pinctrl-0 = <&pinctrl_gpio_keys>;
25
26 key-enter {
27 label = "enter";
28 gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
29 linux,code = <KEY_ENTER>;
30 };
31
32 key-exit {
33 label = "exit";
34 gpios = <&gpio3 23 GPIO_ACTIVE_LOW>;
35 linux,code = <KEY_ESC>;
36 };
37 };
38
39 lcd {
40 compatible = "hit,hd44780";
41 display-height-chars = <2>;
42 display-width-chars = <20>;
43 pinctrl-names = "default";
44 pinctrl-0 = <&pinctrl_lcd>;
45 data-gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>,
46 <&gpio1 6 GPIO_ACTIVE_HIGH>,
47 <&gpio1 14 GPIO_ACTIVE_HIGH>,
48 <&gpio4 28 GPIO_ACTIVE_HIGH>,
49 <&gpio5 24 GPIO_ACTIVE_HIGH>,
50 <&gpio5 2 GPIO_ACTIVE_HIGH>,
51 <&gpio1 12 GPIO_ACTIVE_HIGH>,
52 <&gpio5 25 GPIO_ACTIVE_HIGH>;
53 enable-gpios = <&gpio5 23 GPIO_ACTIVE_HIGH>;
54 rs-gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
55 rw-gpios = <&gpio4 27 GPIO_ACTIVE_HIGH>;
56 };
57
58 reg_3p3v: regulator-3p3v {
59 compatible = "regulator-fixed";
60 regulator-name = "3P3V";
61 regulator-min-microvolt = <3300000>;
62 regulator-max-microvolt = <3300000>;
63 regulator-always-on;
64 };
65
66 /* Bourns PEC12R rotary encoder, 24 steps. */
67 rotary: rotary-encoder {
68 compatible = "rotary-encoder";
69 pinctrl-names = "default";
70 pinctrl-0 = <&pinctrl_rotary>;
71 gpios = <&gpio1 5 GPIO_ACTIVE_LOW>, /* A */
72 <&gpio3 21 GPIO_ACTIVE_LOW>; /* B */
73 linux,axis = <0>; /* REL_X */
74 rotary-encoder,encoding = "gray";
75 rotary-encoder,relative-axis;
76 };
77};
78
79&ecspi1 {
80 cs-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>;
81
82 duart1: serial@0 {
83 compatible = "nxp,sc16is752";
84 reg = <0>;
85 spi-rx-bus-width = <1>;
86 spi-tx-bus-width = <1>;
87 spi-max-frequency = <4000000>;
88 clocks = <&crystal_duart_24m>;
89 interrupt-parent = <&gpio3>;
90 interrupts = <22 IRQ_TYPE_EDGE_FALLING>;
91 gpio-controller;
92 #gpio-cells = <2>;
93 gpio-line-names = "RADIO0", "RADIO1", "RADIO2", "RADIO3",
94 "RADIO4", "RADIO_RESET", "TP12", "TP11";
95 linux,rs485-enabled-at-boot-time;
96 rs485-rts-active-low;
97 };
98
99 /delete-node/ touchscreen@0;
100};
101
102&ecspi2 {
103 pinctrl-names = "default";
104 pinctrl-0 = <&pinctrl_ecspi2>;
105 cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
106 /delete-property/ dmas;
107 /delete-property/ dma-names;
108 status = "okay";
109
110 duart2: serial@0 {
111 compatible = "nxp,sc16is752";
112 reg = <0>;
113 spi-rx-bus-width = <1>;
114 spi-tx-bus-width = <1>;
115 spi-max-frequency = <4000000>;
116 clocks = <&crystal_duart_24m>;
117 interrupt-parent = <&gpio3>;
118 interrupts = <20 IRQ_TYPE_EDGE_FALLING>;
119 gpio-controller;
120 #gpio-cells = <2>;
121 gpio-line-names = "LED_B_USER", "LED_R_USER", "LED_G_USER",
122 "GPIO_EXT3", "GPIO_EXT2", "GPIO_EXT1",
123 "GPIO_EXT0", "TP13";
124 linux,rs485-enabled-at-boot-time;
125 rs485-rts-active-low;
126 };
127};
128
129/* Configure PWM pins in GPIO mode: */
130&gpio5 {
131 gpio-line-names = "", "", "", "PWM3", "PWM2", "PWM1";
132};
133
134&gpu {
135 status = "disabled";
136};
137
138&i2c2 {
139 clock-frequency = <400000>;
140 pinctrl-names = "default";
141 pinctrl-0 = <&pinctrl_i2c2>;
142 status = "okay";
143
144 /* Carrier board EEPROM */
145 eeprom_cb: eeprom@56 {
146 compatible = "atmel,24c04";
147 reg = <0x56>;
148 pagesize = <16>;
149 vcc-supply = <&reg_3p3v>;
150 };
151
152 lm75: sensor@48 {
153 compatible = "st,stlm75";
154 reg = <0x48>;
155 vs-supply = <&reg_3p3v>;
156 };
157
158 mcp7940: rtc@6f {
159 compatible = "microchip,mcp7940x";
160 reg = <0x6f>;
161 };
162};
163
164&i2c3 {
165 codec@1a {
166 status = "disabled";
167 };
168};
169
170&i2c4 {
171 clock-frequency = <400000>;
172 pinctrl-names = "default";
173 pinctrl-0 = <&pinctrl_i2c4>;
174 status = "okay";
175
176 pcf8574_1: gpio@38 {
177 compatible = "nxp,pcf8574";
178 reg = <0x38>;
179 gpio-controller;
180 #gpio-cells = <2>;
181 gpio-line-names = "LED_B_COMM3", "LED_R_COMM3", "LED_G_COMM3",
182 "TP14", "TP15", "LED_G_COMM4", "LED_R_COMM4",
183 "LED_B_COMM4";
184 };
185
186 pcf8574_2: gpio@39 {
187 compatible = "nxp,pcf8574";
188 reg = <0x39>;
189 gpio-controller;
190 #gpio-cells = <2>;
191 gpio-line-names = "LED_B_COMM2", "LED_G_COMM2", "LED_B_COMM1",
192 "LED_R_COMM2", "LED_R_COMM1", "LED_G_COMM1",
193 "TP16", "TP17";
194 };
195};
196
197/* Bluetooth */
198&uart2 {
199 status = "disabled";
200};
201
202&usbotg1 {
203 dr_mode = "host";
204 disable-over-current;
205 status = "okay";
206};
207
208/* SD interface on expansion connector. */
209&usdhc2 {
210 vmmc-supply = <&reg_3p3v>;
211 cd-gpios = <&gpio1 13 GPIO_ACTIVE_LOW>;
212};
213
214&iomuxc {
215 pinctrl_ecspi1: ecspi1grp {
216 fsl,pins = <
217 MX8MN_IOMUXC_ECSPI1_SCLK_ECSPI1_SCLK 0x13
218 MX8MN_IOMUXC_ECSPI1_MOSI_ECSPI1_MOSI 0x13
219 MX8MN_IOMUXC_ECSPI1_MISO_ECSPI1_MISO 0x13
220 MX8MN_IOMUXC_ECSPI1_SS0_GPIO5_IO9 0x13 /* SS0 */
221 MX8MN_IOMUXC_SAI5_RXD1_GPIO3_IO22 0x13 /* SC16 IRQ */
222 >;
223 };
224
225 pinctrl_ecspi2: ecspi2grp {
226 fsl,pins = <
227 MX8MN_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK 0x13
228 MX8MN_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI 0x13
229 MX8MN_IOMUXC_ECSPI2_MISO_ECSPI2_MISO 0x13
230 MX8MN_IOMUXC_ECSPI2_SS0_GPIO5_IO13 0x13 /* SS0 */
231 MX8MN_IOMUXC_SAI5_RXC_GPIO3_IO20 0x13 /* SC16 IRQ */
232 >;
233 };
234
235 pinctrl_gpio_keys: gpiokeysgrp {
236 fsl,pins = <
237 MX8MN_IOMUXC_GPIO1_IO01_GPIO1_IO1 0xc6 /* Enter */
238 MX8MN_IOMUXC_SAI5_RXD2_GPIO3_IO23 0xc6 /* Exit */
239 >;
240 };
241
242 pinctrl_i2c2: i2c2grp {
243 fsl,pins = <
244 MX8MN_IOMUXC_I2C2_SCL_I2C2_SCL 0x400001c3
245 MX8MN_IOMUXC_I2C2_SDA_I2C2_SDA 0x400001c3
246 >;
247 };
248
249 pinctrl_i2c4: i2c4grp {
250 fsl,pins = <
251 MX8MN_IOMUXC_I2C4_SCL_I2C4_SCL 0x400001c3
252 MX8MN_IOMUXC_I2C4_SDA_I2C4_SDA 0x400001c3
253 >;
254 };
255
256 pinctrl_lcd: lcdgrp {
257 fsl,pins = <
258 MX8MN_IOMUXC_SAI3_TXD_GPIO5_IO1 0x00000156 /* D0 */
259 MX8MN_IOMUXC_GPIO1_IO06_GPIO1_IO6 0x00000156 /* D1 */
260 MX8MN_IOMUXC_GPIO1_IO14_GPIO1_IO14 0x00000156 /* D2 */
261 MX8MN_IOMUXC_SAI3_RXFS_GPIO4_IO28 0x00000156 /* D3 */
262 MX8MN_IOMUXC_UART2_RXD_GPIO5_IO24 0x00000156 /* D4 */
263 MX8MN_IOMUXC_SAI3_MCLK_GPIO5_IO2 0x00000156 /* D5 */
264 MX8MN_IOMUXC_GPIO1_IO12_GPIO1_IO12 0x00000156 /* D6 */
265 MX8MN_IOMUXC_UART2_TXD_GPIO5_IO25 0x00000156 /* D7 */
266 MX8MN_IOMUXC_UART1_TXD_GPIO5_IO23 0x00000156 /* E */
267 MX8MN_IOMUXC_GPIO1_IO07_GPIO1_IO7 0x00000156 /* RS */
268 MX8MN_IOMUXC_SAI2_MCLK_GPIO4_IO27 0x00000156 /* R/W */
269 >;
270 };
271
272 pinctrl_rotary: rotarygrp {
273 fsl,pins = <
274 MX8MN_IOMUXC_GPIO1_IO05_GPIO1_IO5 0x00000156 /* A */
275 MX8MN_IOMUXC_SAI5_RXD0_GPIO3_IO21 0x00000156 /* B */
276 >;
277 };
278
279 /* Override Card Detect function GPIO value (GPIO1_IO10) from SOM: */
280 pinctrl_usdhc2_gpio: usdhc2gpiogrp {
281 fsl,pins = <
282 MX8MN_IOMUXC_GPIO1_IO13_GPIO1_IO13 0x41
283 >;
284 };
285};