Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
| 2 | /* |
| 3 | * Qualcomm interconnect IDs |
| 4 | * |
| 5 | * Copyright (c) 2019, Linaro Ltd. |
| 6 | * Author: Georgi Djakov <georgi.djakov@linaro.org> |
| 7 | */ |
| 8 | |
| 9 | #ifndef __DT_BINDINGS_INTERCONNECT_QCOM_QCS404_H |
| 10 | #define __DT_BINDINGS_INTERCONNECT_QCOM_QCS404_H |
| 11 | |
| 12 | #define MASTER_AMPSS_M0 0 |
| 13 | #define MASTER_OXILI 1 |
| 14 | #define MASTER_MDP_PORT0 2 |
| 15 | #define MASTER_SNOC_BIMC_1 3 |
| 16 | #define MASTER_TCU_0 4 |
| 17 | #define SLAVE_EBI_CH0 5 |
| 18 | #define SLAVE_BIMC_SNOC 6 |
| 19 | |
| 20 | #define MASTER_SPDM 0 |
| 21 | #define MASTER_BLSP_1 1 |
| 22 | #define MASTER_BLSP_2 2 |
| 23 | #define MASTER_XI_USB_HS1 3 |
| 24 | #define MASTER_CRYPT0 4 |
| 25 | #define MASTER_SDCC_1 5 |
| 26 | #define MASTER_SDCC_2 6 |
| 27 | #define MASTER_SNOC_PCNOC 7 |
| 28 | #define MASTER_QPIC 8 |
| 29 | #define PCNOC_INT_0 9 |
| 30 | #define PCNOC_INT_2 10 |
| 31 | #define PCNOC_INT_3 11 |
| 32 | #define PCNOC_S_0 12 |
| 33 | #define PCNOC_S_1 13 |
| 34 | #define PCNOC_S_2 14 |
| 35 | #define PCNOC_S_3 15 |
| 36 | #define PCNOC_S_4 16 |
| 37 | #define PCNOC_S_6 17 |
| 38 | #define PCNOC_S_7 18 |
| 39 | #define PCNOC_S_8 19 |
| 40 | #define PCNOC_S_9 20 |
| 41 | #define PCNOC_S_10 21 |
| 42 | #define PCNOC_S_11 22 |
| 43 | #define SLAVE_SPDM 23 |
| 44 | #define SLAVE_PDM 24 |
| 45 | #define SLAVE_PRNG 25 |
| 46 | #define SLAVE_TCSR 26 |
| 47 | #define SLAVE_SNOC_CFG 27 |
| 48 | #define SLAVE_MESSAGE_RAM 28 |
| 49 | #define SLAVE_DISP_SS_CFG 29 |
| 50 | #define SLAVE_GPU_CFG 30 |
| 51 | #define SLAVE_BLSP_1 31 |
| 52 | #define SLAVE_BLSP_2 32 |
| 53 | #define SLAVE_TLMM_NORTH 33 |
| 54 | #define SLAVE_PCIE 34 |
| 55 | #define SLAVE_ETHERNET 35 |
| 56 | #define SLAVE_TLMM_EAST 36 |
| 57 | #define SLAVE_TCU 37 |
| 58 | #define SLAVE_PMIC_ARB 38 |
| 59 | #define SLAVE_SDCC_1 39 |
| 60 | #define SLAVE_SDCC_2 40 |
| 61 | #define SLAVE_TLMM_SOUTH 41 |
| 62 | #define SLAVE_USB_HS 42 |
| 63 | #define SLAVE_USB3 43 |
| 64 | #define SLAVE_CRYPTO_0_CFG 44 |
| 65 | #define SLAVE_PCNOC_SNOC 45 |
| 66 | |
| 67 | #define MASTER_QDSS_BAM 0 |
| 68 | #define MASTER_BIMC_SNOC 1 |
| 69 | #define MASTER_PCNOC_SNOC 2 |
| 70 | #define MASTER_QDSS_ETR 3 |
| 71 | #define MASTER_EMAC 4 |
| 72 | #define MASTER_PCIE 5 |
| 73 | #define MASTER_USB3 6 |
| 74 | #define QDSS_INT 7 |
| 75 | #define SNOC_INT_0 8 |
| 76 | #define SNOC_INT_1 9 |
| 77 | #define SNOC_INT_2 10 |
| 78 | #define SLAVE_KPSS_AHB 11 |
| 79 | #define SLAVE_WCSS 12 |
| 80 | #define SLAVE_SNOC_BIMC_1 13 |
| 81 | #define SLAVE_IMEM 14 |
| 82 | #define SLAVE_SNOC_PCNOC 15 |
| 83 | #define SLAVE_QDSS_STM 16 |
| 84 | #define SLAVE_CATS_0 17 |
| 85 | #define SLAVE_CATS_1 18 |
| 86 | #define SLAVE_LPASS 19 |
| 87 | |
| 88 | #endif |