| Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1 | /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ |
| 2 | /* |
| 3 | * Copyright (c) 2021, The Linux Foundation. All rights reserved. |
| 4 | * Copyright (c) 2021, Konrad Dybcio <konrad.dybcio@somainline.org> |
| 5 | */ |
| 6 | |
| 7 | #ifndef _DT_BINDINGS_CLK_QCOM_DISP_CC_SM6350_H |
| 8 | #define _DT_BINDINGS_CLK_QCOM_DISP_CC_SM6350_H |
| 9 | |
| 10 | /* DISP_CC clocks */ |
| 11 | #define DISP_CC_PLL0 0 |
| 12 | #define DISP_CC_MDSS_AHB_CLK 1 |
| 13 | #define DISP_CC_MDSS_AHB_CLK_SRC 2 |
| 14 | #define DISP_CC_MDSS_BYTE0_CLK 3 |
| 15 | #define DISP_CC_MDSS_BYTE0_CLK_SRC 4 |
| 16 | #define DISP_CC_MDSS_BYTE0_DIV_CLK_SRC 5 |
| 17 | #define DISP_CC_MDSS_BYTE0_INTF_CLK 6 |
| 18 | #define DISP_CC_MDSS_DP_AUX_CLK 7 |
| 19 | #define DISP_CC_MDSS_DP_AUX_CLK_SRC 8 |
| 20 | #define DISP_CC_MDSS_DP_CRYPTO_CLK 9 |
| 21 | #define DISP_CC_MDSS_DP_CRYPTO_CLK_SRC 10 |
| 22 | #define DISP_CC_MDSS_DP_LINK_CLK 11 |
| 23 | #define DISP_CC_MDSS_DP_LINK_CLK_SRC 12 |
| 24 | #define DISP_CC_MDSS_DP_LINK_DIV_CLK_SRC 13 |
| 25 | #define DISP_CC_MDSS_DP_LINK_INTF_CLK 14 |
| 26 | #define DISP_CC_MDSS_DP_PIXEL_CLK 15 |
| 27 | #define DISP_CC_MDSS_DP_PIXEL_CLK_SRC 16 |
| 28 | #define DISP_CC_MDSS_ESC0_CLK 17 |
| 29 | #define DISP_CC_MDSS_ESC0_CLK_SRC 18 |
| 30 | #define DISP_CC_MDSS_MDP_CLK 19 |
| 31 | #define DISP_CC_MDSS_MDP_CLK_SRC 20 |
| 32 | #define DISP_CC_MDSS_MDP_LUT_CLK 21 |
| 33 | #define DISP_CC_MDSS_NON_GDSC_AHB_CLK 22 |
| 34 | #define DISP_CC_MDSS_PCLK0_CLK 23 |
| 35 | #define DISP_CC_MDSS_PCLK0_CLK_SRC 24 |
| 36 | #define DISP_CC_MDSS_ROT_CLK 25 |
| 37 | #define DISP_CC_MDSS_ROT_CLK_SRC 26 |
| 38 | #define DISP_CC_MDSS_RSCC_AHB_CLK 27 |
| 39 | #define DISP_CC_MDSS_RSCC_VSYNC_CLK 28 |
| 40 | #define DISP_CC_MDSS_VSYNC_CLK 29 |
| 41 | #define DISP_CC_MDSS_VSYNC_CLK_SRC 30 |
| 42 | #define DISP_CC_SLEEP_CLK 31 |
| 43 | #define DISP_CC_XO_CLK 32 |
| 44 | |
| 45 | /* GDSCs */ |
| 46 | #define MDSS_GDSC 0 |
| 47 | |
| 48 | #endif |