blob: cb687949be41fd204e351683cebc41d9e3980ea0 [file] [log] [blame]
Tom Rini53633a82024-02-29 12:33:36 -05001/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
2/*
3 * Copyright (c) 2019, The Linux Foundation. All rights reserved.
4 */
5
6#ifndef _DT_BINDINGS_CLK_QCOM_DISP_CC_QCM2290_H
7#define _DT_BINDINGS_CLK_QCOM_DISP_CC_QCM2290_H
8
9/* DISP_CC clocks */
10#define DISP_CC_PLL0 0
11#define DISP_CC_MDSS_AHB_CLK 1
12#define DISP_CC_MDSS_AHB_CLK_SRC 2
13#define DISP_CC_MDSS_BYTE0_CLK 3
14#define DISP_CC_MDSS_BYTE0_CLK_SRC 4
15#define DISP_CC_MDSS_BYTE0_DIV_CLK_SRC 5
16#define DISP_CC_MDSS_BYTE0_INTF_CLK 6
17#define DISP_CC_MDSS_ESC0_CLK 7
18#define DISP_CC_MDSS_ESC0_CLK_SRC 8
19#define DISP_CC_MDSS_MDP_CLK 9
20#define DISP_CC_MDSS_MDP_CLK_SRC 10
21#define DISP_CC_MDSS_MDP_LUT_CLK 11
22#define DISP_CC_MDSS_NON_GDSC_AHB_CLK 12
23#define DISP_CC_MDSS_PCLK0_CLK 13
24#define DISP_CC_MDSS_PCLK0_CLK_SRC 14
25#define DISP_CC_MDSS_VSYNC_CLK 15
26#define DISP_CC_MDSS_VSYNC_CLK_SRC 16
27#define DISP_CC_SLEEP_CLK 17
28#define DISP_CC_SLEEP_CLK_SRC 18
29#define DISP_CC_XO_CLK 19
30#define DISP_CC_XO_CLK_SRC 20
31
32/* GDSCs */
33#define MDSS_GDSC 0
34
35/* Resets */
36#define DISP_CC_MDSS_CORE_BCR 0
37
38#endif