| Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1 | Texas Instruments High End CAN Controller (HECC) |
| 2 | ================================================ |
| 3 | |
| 4 | This file provides information, what the device node |
| 5 | for the hecc interface contains. |
| 6 | |
| 7 | Required properties: |
| 8 | - compatible: "ti,am3517-hecc" |
| 9 | - reg: addresses and lengths of the register spaces for 'hecc', 'hecc-ram' |
| 10 | and 'mbx' |
| 11 | - reg-names :"hecc", "hecc-ram", "mbx" |
| 12 | - interrupts: interrupt mapping for the hecc interrupts sources |
| 13 | - clocks: clock phandles (see clock bindings for details) |
| 14 | |
| 15 | Optional properties: |
| 16 | - ti,use-hecc1int: if provided configures HECC to produce all interrupts |
| 17 | on HECC1INT interrupt line. By default HECC0INT interrupt |
| 18 | line will be used. |
| 19 | - xceiver-supply: regulator that powers the CAN transceiver |
| 20 | |
| 21 | Example: |
| 22 | |
| 23 | For am3517evm board: |
| 24 | hecc: can@5c050000 { |
| 25 | compatible = "ti,am3517-hecc"; |
| 26 | reg = <0x5c050000 0x80>, |
| 27 | <0x5c053000 0x180>, |
| 28 | <0x5c052000 0x200>; |
| 29 | reg-names = "hecc", "hecc-ram", "mbx"; |
| 30 | interrupts = <24>; |
| 31 | clocks = <&hecc_ck>; |
| 32 | }; |