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Tom Rini53633a82024-02-29 12:33:36 -05001# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/misc/nvidia,tegra186-misc.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: NVIDIA Tegra186 (and later) MISC register block
8
9maintainers:
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
12
13description: The MISC register block found on Tegra186 and later SoCs contains
14 registers that can be used to identify a given chip and various strapping
15 options.
16
17properties:
18 compatible:
19 enum:
20 - nvidia,tegra186-misc
21 - nvidia,tegra194-misc
22 - nvidia,tegra234-misc
23
24 reg:
25 items:
26 - description: physical address and length of the registers which
27 contain revision and debug features
28 - description: physical address and length of the registers which
29 indicate strapping options
30
31additionalProperties: false
32
33required:
34 - compatible
35 - reg
36
37examples:
38 - |
39 misc@100000 {
40 compatible = "nvidia,tegra186-misc";
41 reg = <0x00100000 0xf000>,
42 <0x0010f000 0x1000>;
43 };