Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1 | * Device tree bindings for Atmel EBI |
| 2 | |
| 3 | The External Bus Interface (EBI) controller is a bus where you can connect |
| 4 | asynchronous (NAND, NOR, SRAM, ....) and synchronous memories (SDR/DDR SDRAMs). |
| 5 | The EBI provides a glue-less interface to asynchronous memories through the SMC |
| 6 | (Static Memory Controller). |
| 7 | |
| 8 | Required properties: |
| 9 | |
| 10 | - compatible: "atmel,at91sam9260-ebi" |
| 11 | "atmel,at91sam9261-ebi" |
| 12 | "atmel,at91sam9263-ebi0" |
| 13 | "atmel,at91sam9263-ebi1" |
| 14 | "atmel,at91sam9rl-ebi" |
| 15 | "atmel,at91sam9g45-ebi" |
| 16 | "atmel,at91sam9x5-ebi" |
| 17 | "atmel,sama5d3-ebi" |
| 18 | "microchip,sam9x60-ebi" |
| 19 | |
| 20 | - reg: Contains offset/length value for EBI memory mapping. |
| 21 | This property might contain several entries if the EBI |
| 22 | memory range is not contiguous |
| 23 | |
| 24 | - #address-cells: Must be 2. |
| 25 | The first cell encodes the CS. |
| 26 | The second cell encode the offset into the CS memory |
| 27 | range. |
| 28 | |
| 29 | - #size-cells: Must be set to 1. |
| 30 | |
| 31 | - ranges: Encodes CS to memory region association. |
| 32 | |
| 33 | - clocks: Clock feeding the EBI controller. |
| 34 | See clock-bindings.txt |
| 35 | |
| 36 | Children device nodes are representing device connected to the EBI bus. |
| 37 | |
| 38 | Required device node properties: |
| 39 | |
| 40 | - reg: Contains the chip-select id, the offset and the length |
| 41 | of the memory region requested by the device. |
| 42 | |
| 43 | EBI bus configuration will be defined directly in the device subnode. |
| 44 | |
| 45 | Optional EBI/SMC properties: |
| 46 | |
| 47 | - atmel,smc-bus-width: width of the asynchronous device's data bus |
| 48 | 8, 16 or 32. |
| 49 | Default to 8 when undefined. |
| 50 | |
| 51 | - atmel,smc-byte-access-type "write" or "select" (see Atmel datasheet). |
| 52 | Default to "select" when undefined. |
| 53 | |
| 54 | - atmel,smc-read-mode "nrd" or "ncs". |
| 55 | Default to "ncs" when undefined. |
| 56 | |
| 57 | - atmel,smc-write-mode "nwe" or "ncs". |
| 58 | Default to "ncs" when undefined. |
| 59 | |
| 60 | - atmel,smc-exnw-mode "disabled", "frozen" or "ready". |
| 61 | Default to "disabled" when undefined. |
| 62 | |
| 63 | - atmel,smc-page-mode enable page mode if present. The provided value |
| 64 | defines the page size (supported values: 4, 8, |
| 65 | 16 and 32). |
| 66 | |
| 67 | - atmel,smc-tdf-mode: "normal" or "optimized". When set to |
| 68 | "optimized" the data float time is optimized |
| 69 | depending on the next device being accessed |
| 70 | (next device setup time is subtracted to the |
| 71 | current device data float time). |
| 72 | Default to "normal" when undefined. |
| 73 | |
| 74 | If at least one atmel,smc- property is defined the following SMC timing |
| 75 | properties become mandatory. In the other hand, if none of the atmel,smc- |
| 76 | properties are specified, we assume that the EBI bus configuration will be |
| 77 | handled by the sub-device driver, and none of those properties should be |
| 78 | defined. |
| 79 | |
| 80 | All the timings are expressed in nanoseconds (see Atmel datasheet for a full |
| 81 | description). |
| 82 | |
| 83 | - atmel,smc-ncs-rd-setup-ns |
| 84 | - atmel,smc-nrd-setup-ns |
| 85 | - atmel,smc-ncs-wr-setup-ns |
| 86 | - atmel,smc-nwe-setup-ns |
| 87 | - atmel,smc-ncs-rd-pulse-ns |
| 88 | - atmel,smc-nrd-pulse-ns |
| 89 | - atmel,smc-ncs-wr-pulse-ns |
| 90 | - atmel,smc-nwe-pulse-ns |
| 91 | - atmel,smc-nwe-cycle-ns |
| 92 | - atmel,smc-nrd-cycle-ns |
| 93 | - atmel,smc-tdf-ns |
| 94 | |
| 95 | Example: |
| 96 | |
| 97 | ebi: ebi@10000000 { |
| 98 | compatible = "atmel,sama5d3-ebi"; |
| 99 | #address-cells = <2>; |
| 100 | #size-cells = <1>; |
| 101 | atmel,smc = <&hsmc>; |
| 102 | atmel,matrix = <&matrix>; |
| 103 | reg = <0x10000000 0x10000000 |
| 104 | 0x40000000 0x30000000>; |
| 105 | ranges = <0x0 0x0 0x10000000 0x10000000 |
| 106 | 0x1 0x0 0x40000000 0x10000000 |
| 107 | 0x2 0x0 0x50000000 0x10000000 |
| 108 | 0x3 0x0 0x60000000 0x10000000>; |
| 109 | clocks = <&mck>; |
| 110 | |
| 111 | pinctrl-names = "default"; |
| 112 | pinctrl-0 = <&pinctrl_ebi_addr>; |
| 113 | |
| 114 | nor: flash@0,0 { |
| 115 | compatible = "cfi-flash"; |
| 116 | #address-cells = <1>; |
| 117 | #size-cells = <1>; |
| 118 | reg = <0x0 0x0 0x1000000>; |
| 119 | bank-width = <2>; |
| 120 | |
| 121 | atmel,smc-read-mode = "nrd"; |
| 122 | atmel,smc-write-mode = "nwe"; |
| 123 | atmel,smc-bus-width = <16>; |
| 124 | atmel,smc-ncs-rd-setup-ns = <0>; |
| 125 | atmel,smc-ncs-wr-setup-ns = <0>; |
| 126 | atmel,smc-nwe-setup-ns = <8>; |
| 127 | atmel,smc-nrd-setup-ns = <16>; |
| 128 | atmel,smc-ncs-rd-pulse-ns = <84>; |
| 129 | atmel,smc-ncs-wr-pulse-ns = <84>; |
| 130 | atmel,smc-nrd-pulse-ns = <76>; |
| 131 | atmel,smc-nwe-pulse-ns = <76>; |
| 132 | atmel,smc-nrd-cycle-ns = <107>; |
| 133 | atmel,smc-nwe-cycle-ns = <84>; |
| 134 | atmel,smc-tdf-ns = <16>; |
| 135 | }; |
| 136 | }; |
| 137 | |