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Tom Rini53633a82024-02-29 12:33:36 -05001# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/i2c/i2c-exynos5.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Samsung's High Speed I2C controller
8
9maintainers:
10 - Krzysztof Kozlowski <krzk@kernel.org>
11
12description: |
13 The Samsung's High Speed I2C controller is used to interface with I2C devices
14 at various speeds ranging from 100kHz to 3.4MHz.
15
16 In case the HSI2C controller is encapsulated within USI block (it's the case
17 e.g. for Exynos850 and Exynos Auto V9 SoCs), it might be also necessary to
18 define USI node in device tree file, choosing "i2c" configuration. Please see
19 Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml for details.
20
21properties:
22 compatible:
23 oneOf:
24 - enum:
25 - samsung,exynos5250-hsi2c # Exynos5250 and Exynos5420
26 - samsung,exynos5260-hsi2c # Exynos5260
27 - samsung,exynos7-hsi2c # Exynos7
Tom Rini93743d22024-04-01 09:08:13 -040028 - samsung,exynosautov9-hsi2c
29 - items:
30 - enum:
31 - samsung,exynos5433-hsi2c
32 - tesla,fsd-hsi2c
33 - const: samsung,exynos7-hsi2c
34 - items:
35 - enum:
36 - samsung,exynos850-hsi2c
37 - const: samsung,exynosautov9-hsi2c
Tom Rini53633a82024-02-29 12:33:36 -050038 - const: samsung,exynos5-hsi2c # Exynos5250 and Exynos5420
39 deprecated: true
40
41 reg:
42 maxItems: 1
43
44 interrupts:
45 maxItems: 1
46
47 clock-frequency:
48 default: 100000
49 description:
50 Desired operating frequency in Hz of the bus.
51
52 If not specified, the bus operates in fast-speed mode at 100kHz.
53
54 If specified, the bus operates in high-speed mode only if the
55 clock-frequency is >= 1MHz.
56
57 clocks:
58 minItems: 1
59 items:
60 - description: I2C operating clock
61 - description: Bus clock (APB)
62
63 clock-names:
64 minItems: 1
65 items:
66 - const: hsi2c
67 - const: hsi2c_pclk
68
69required:
70 - compatible
71 - reg
72 - interrupts
73 - clocks
74
75allOf:
76 - $ref: /schemas/i2c/i2c-controller.yaml#
77 - if:
78 properties:
79 compatible:
80 contains:
81 enum:
82 - samsung,exynosautov9-hsi2c
83
84 then:
85 properties:
86 clocks:
87 minItems: 2
88
89 clock-names:
90 minItems: 2
91
92 required:
93 - clock-names
94
95 else:
96 properties:
97 clocks:
98 maxItems: 1
99
100unevaluatedProperties: false
101
102examples:
103 - |
104 #include <dt-bindings/clock/exynos5420.h>
105 #include <dt-bindings/interrupt-controller/arm-gic.h>
106 #include <dt-bindings/interrupt-controller/irq.h>
107
108 hsi2c_8: i2c@12e00000 {
109 compatible = "samsung,exynos5250-hsi2c";
110 reg = <0x12e00000 0x1000>;
111 interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
112 #address-cells = <1>;
113 #size-cells = <0>;
114 clock-frequency = <100000>;
115 clocks = <&clock CLK_USI4>;
116 clock-names = "hsi2c";
117
118 pmic@66 {
119 /* compatible = "samsung,s2mps11-pmic"; */
120 reg = <0x66>;
121 };
122 };
123
124 - |
125 #include <dt-bindings/clock/exynos850.h>
126 #include <dt-bindings/interrupt-controller/arm-gic.h>
127
128 hsi2c_2: i2c@138c0000 {
129 compatible = "samsung,exynosautov9-hsi2c";
130 reg = <0x138c0000 0xc0>;
131 interrupts = <GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH>;
132 #address-cells = <1>;
133 #size-cells = <0>;
134 clocks = <&cmu_peri CLK_GOUT_HSI2C2_IPCLK>,
135 <&cmu_peri CLK_GOUT_HSI2C2_PCLK>;
136 clock-names = "hsi2c", "hsi2c_pclk";
137
138 pmic@66 {
139 /* compatible = "samsung,s2mps11-pmic"; */
140 reg = <0x66>;
141 };
142 };