Bindings/arm/arm,coresight-catu.yaml

# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/arm/arm,coresight-catu.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Arm Coresight Address Translation Unit (CATU)

maintainers:
  - Mathieu Poirier <mathieu.poirier@linaro.org>
  - Mike Leach <mike.leach@linaro.org>
  - Leo Yan <leo.yan@linaro.org>
  - Suzuki K Poulose <suzuki.poulose@arm.com>

description: |
  CoreSight components are compliant with the ARM CoreSight architecture
  specification and can be connected in various topologies to suit a particular
  SoCs tracing needs. These trace components can generally be classified as
  sinks, links and sources. Trace data produced by one or more sources flows
  through the intermediate links connecting the source to the currently selected
  sink.

  The CoreSight Address Translation Unit (CATU) translates addresses between an
  AXI master and system memory. The CATU is normally used along with the TMC to
  implement scattering of virtual trace buffers in physical memory. The CATU
  translates contiguous Virtual Addresses (VAs) from an AXI master into
  non-contiguous Physical Addresses (PAs) that are intended for system memory.

# Need a custom select here or 'arm,primecell' will match on lots of nodes
select:
  properties:
    compatible:
      contains:
        const: arm,coresight-catu
  required:
    - compatible

allOf:
  - $ref: /schemas/arm/primecell.yaml#

properties:
  compatible:
    items:
      - const: arm,coresight-catu
      - const: arm,primecell

  reg:
    maxItems: 1

  clocks:
    minItems: 1
    maxItems: 2

  clock-names:
    minItems: 1
    items:
      - const: apb_pclk
      - const: atclk

  interrupts:
    maxItems: 1
    description: Address translation error interrupt

  power-domains:
    maxItems: 1

  in-ports:
    $ref: /schemas/graph.yaml#/properties/ports
    additionalProperties: false

    properties:
      port:
        description: AXI Slave connected to another Coresight component
        $ref: /schemas/graph.yaml#/properties/port

required:
  - compatible
  - reg
  - clocks
  - clock-names
  - in-ports

unevaluatedProperties: false

examples:
  - |
    #include <dt-bindings/interrupt-controller/arm-gic.h>
    catu@207e0000 {
        compatible = "arm,coresight-catu", "arm,primecell";
        reg = <0x207e0000 0x1000>;

        clocks = <&oscclk6a>;
        clock-names = "apb_pclk";

        interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
        in-ports {
            port {
                catu_in_port: endpoint {
                    remote-endpoint = <&etr_out_port>;
                };
            };
        };
    };
...