Dave Gerlach | 278e7ac | 2021-04-23 11:27:46 -0500 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0 |
| 2 | /* |
Roger Quadros | af6e2a7 | 2023-08-05 11:14:40 +0300 | [diff] [blame] | 3 | * Copyright (C) 2020-2023 Texas Instruments Incorporated - https://www.ti.com/ |
Dave Gerlach | 278e7ac | 2021-04-23 11:27:46 -0500 | [diff] [blame] | 4 | */ |
| 5 | |
Roger Quadros | af6e2a7 | 2023-08-05 11:14:40 +0300 | [diff] [blame] | 6 | #include "k3-am642-evm.dts" |
Dave Gerlach | 3daecde | 2021-05-04 18:00:52 -0500 | [diff] [blame] | 7 | #include "k3-am64-evm-ddr4-1600MTs.dtsi" |
| 8 | #include "k3-am64-ddr.dtsi" |
Dave Gerlach | 278e7ac | 2021-04-23 11:27:46 -0500 | [diff] [blame] | 9 | |
Roger Quadros | af6e2a7 | 2023-08-05 11:14:40 +0300 | [diff] [blame] | 10 | #include "k3-am642-evm-u-boot.dtsi" |
Dave Gerlach | 278e7ac | 2021-04-23 11:27:46 -0500 | [diff] [blame] | 11 | |
Roger Quadros | af6e2a7 | 2023-08-05 11:14:40 +0300 | [diff] [blame] | 12 | / { |
Dave Gerlach | 278e7ac | 2021-04-23 11:27:46 -0500 | [diff] [blame] | 13 | aliases { |
| 14 | remoteproc0 = &sysctrler; |
| 15 | remoteproc1 = &a53_0; |
| 16 | }; |
| 17 | |
Dave Gerlach | 278e7ac | 2021-04-23 11:27:46 -0500 | [diff] [blame] | 18 | a53_0: a53@0 { |
| 19 | compatible = "ti,am654-rproc"; |
| 20 | reg = <0x00 0x00a90000 0x00 0x10>; |
| 21 | power-domains = <&k3_pds 61 TI_SCI_PD_EXCLUSIVE>, |
Manorit Chawdhry | 99aceb8 | 2023-04-14 09:47:57 +0530 | [diff] [blame] | 22 | <&k3_pds 135 TI_SCI_PD_EXCLUSIVE>, |
| 23 | <&k3_pds 137 TI_SCI_PD_EXCLUSIVE>; |
Dave Gerlach | 278e7ac | 2021-04-23 11:27:46 -0500 | [diff] [blame] | 24 | resets = <&k3_reset 135 0>; |
| 25 | clocks = <&k3_clks 61 0>; |
| 26 | assigned-clocks = <&k3_clks 61 0>, <&k3_clks 135 0>; |
| 27 | assigned-clock-parents = <&k3_clks 61 2>; |
| 28 | assigned-clock-rates = <200000000>, <1000000000>; |
| 29 | ti,sci = <&dmsc>; |
| 30 | ti,sci-proc-id = <32>; |
| 31 | ti,sci-host-id = <10>; |
Simon Glass | d3a98cb | 2023-02-13 08:56:33 -0700 | [diff] [blame] | 32 | bootph-pre-ram; |
Dave Gerlach | 278e7ac | 2021-04-23 11:27:46 -0500 | [diff] [blame] | 33 | }; |
| 34 | |
Dave Gerlach | 278e7ac | 2021-04-23 11:27:46 -0500 | [diff] [blame] | 35 | clk_200mhz: dummy-clock-200mhz { |
| 36 | compatible = "fixed-clock"; |
| 37 | #clock-cells = <0>; |
| 38 | clock-frequency = <200000000>; |
Simon Glass | d3a98cb | 2023-02-13 08:56:33 -0700 | [diff] [blame] | 39 | bootph-pre-ram; |
Dave Gerlach | 278e7ac | 2021-04-23 11:27:46 -0500 | [diff] [blame] | 40 | }; |
| 41 | }; |
| 42 | |
| 43 | &cbass_main { |
| 44 | sysctrler: sysctrler { |
| 45 | compatible = "ti,am654-system-controller"; |
| 46 | mboxes= <&secure_proxy_main 1>, <&secure_proxy_main 0>; |
| 47 | mbox-names = "tx", "rx"; |
Simon Glass | d3a98cb | 2023-02-13 08:56:33 -0700 | [diff] [blame] | 48 | bootph-pre-ram; |
Dave Gerlach | 278e7ac | 2021-04-23 11:27:46 -0500 | [diff] [blame] | 49 | }; |
| 50 | }; |
| 51 | |
Roger Quadros | af6e2a7 | 2023-08-05 11:14:40 +0300 | [diff] [blame] | 52 | &main_esm { |
Simon Glass | d3a98cb | 2023-02-13 08:56:33 -0700 | [diff] [blame] | 53 | bootph-pre-ram; |
Hari Nagalla | 789225e | 2022-03-09 14:42:29 -0600 | [diff] [blame] | 54 | }; |
| 55 | |
Roger Quadros | af6e2a7 | 2023-08-05 11:14:40 +0300 | [diff] [blame] | 56 | &mcu_esm { |
Simon Glass | d3a98cb | 2023-02-13 08:56:33 -0700 | [diff] [blame] | 57 | bootph-pre-ram; |
Dave Gerlach | 278e7ac | 2021-04-23 11:27:46 -0500 | [diff] [blame] | 58 | }; |
| 59 | |
| 60 | &dmsc { |
| 61 | mboxes= <&secure_proxy_main 0>, |
| 62 | <&secure_proxy_main 1>, |
| 63 | <&secure_proxy_main 0>; |
| 64 | mbox-names = "rx", "tx", "notify"; |
| 65 | ti,host-id = <35>; |
| 66 | ti,secure-host; |
| 67 | }; |
| 68 | |
Dave Gerlach | 278e7ac | 2021-04-23 11:27:46 -0500 | [diff] [blame] | 69 | &sdhci0 { |
Dave Gerlach | 278e7ac | 2021-04-23 11:27:46 -0500 | [diff] [blame] | 70 | clocks = <&clk_200mhz>; |
| 71 | clock-names = "clk_xin"; |
Dave Gerlach | 278e7ac | 2021-04-23 11:27:46 -0500 | [diff] [blame] | 72 | }; |
| 73 | |
| 74 | &sdhci1 { |
Dave Gerlach | 278e7ac | 2021-04-23 11:27:46 -0500 | [diff] [blame] | 75 | clocks = <&clk_200mhz>; |
| 76 | clock-names = "clk_xin"; |
Dave Gerlach | 278e7ac | 2021-04-23 11:27:46 -0500 | [diff] [blame] | 77 | }; |
| 78 | |
Nishanth Menon | d6a453c | 2021-05-04 18:00:55 -0500 | [diff] [blame] | 79 | &main_gpio0 { |
Simon Glass | d3a98cb | 2023-02-13 08:56:33 -0700 | [diff] [blame] | 80 | bootph-pre-ram; |
Nishanth Menon | d6a453c | 2021-05-04 18:00:55 -0500 | [diff] [blame] | 81 | }; |
| 82 | |
Roger Quadros | af6e2a7 | 2023-08-05 11:14:40 +0300 | [diff] [blame] | 83 | /* UART is initialized before SYSFW is started |
| 84 | * so we can't do any power-domain/clock operations. |
| 85 | * Delete clock/power-domain properties to avoid |
| 86 | * UART init failure |
| 87 | */ |
| 88 | &main_uart0 { |
Lokesh Vutla | e1c5a5d | 2021-05-06 16:44:57 +0530 | [diff] [blame] | 89 | /delete-property/ power-domains; |
Roger Quadros | af6e2a7 | 2023-08-05 11:14:40 +0300 | [diff] [blame] | 90 | /delete-property/ clocks; |
| 91 | /delete-property/ clock-names; |
Aswath Govindraju | 0b2481e | 2021-06-04 22:00:36 +0530 | [diff] [blame] | 92 | }; |
| 93 | |
Roger Quadros | af6e2a7 | 2023-08-05 11:14:40 +0300 | [diff] [blame] | 94 | /* timer init is called as part of rproc_start() while |
| 95 | * starting System Firmware, so any clock/power-domain |
| 96 | * operations will fail as SYSFW is not yet up and running. |
| 97 | * Delete all clock/power-domain properties to avoid |
| 98 | * timer init failure. |
| 99 | * This is an always on timer at 20MHz. |
| 100 | */ |
| 101 | &main_timer0 { |
| 102 | /delete-property/ clocks; |
| 103 | /delete-property/ assigned-clocks; |
| 104 | /delete-property/ assigned-clock-parents; |
| 105 | /delete-property/ power-domains; |
Aswath Govindraju | 0b2481e | 2021-06-04 22:00:36 +0530 | [diff] [blame] | 106 | }; |