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Nobuhiro Iwamatsu980fbb72010-10-25 03:12:24 +09001/*
Nobuhiro Iwamatsu10b2b402011-01-06 12:38:01 +09002 * Configuation settings for shmin (T-SH7706LAN, T-SH7706LSR)
Nobuhiro Iwamatsu980fbb72010-10-25 03:12:24 +09003 *
Nobuhiro Iwamatsu10b2b402011-01-06 12:38:01 +09004 * Copyright (C) 2010, 2011 Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Nobuhiro Iwamatsu980fbb72010-10-25 03:12:24 +09005 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +02006 * SPDX-License-Identifier: GPL-2.0+
Nobuhiro Iwamatsu980fbb72010-10-25 03:12:24 +09007 */
8
9#ifndef __SHMIN_H
10#define __SHMIN_H
11
Nobuhiro Iwamatsu980fbb72010-10-25 03:12:24 +090012#define CONFIG_CPU_SH7706 1
Nobuhiro Iwamatsu10b2b402011-01-06 12:38:01 +090013/* T-SH7706LAN */
Nobuhiro Iwamatsu980fbb72010-10-25 03:12:24 +090014#define CONFIG_SHMIN 1
Nobuhiro Iwamatsu10b2b402011-01-06 12:38:01 +090015/* T-SH7706LSR*/
16/* #define CONFIG_T_SH7706LSR 1 */
Nobuhiro Iwamatsu980fbb72010-10-25 03:12:24 +090017
Wolfgang Denka4de8352011-02-02 22:36:10 +010018/*
Nobuhiro Iwamatsu980fbb72010-10-25 03:12:24 +090019 * This board has original boot loader. If you write u-boot to 0x0,
20 * you should set undef.
21 */
Nobuhiro Iwamatsu980fbb72010-10-25 03:12:24 +090022#undef CONFIG_SHOW_BOOT_PROGRESS
Vladimir Zapolskiy5e72b842016-11-28 00:15:30 +020023#define CONFIG_DISPLAY_BOARDINFO
Nobuhiro Iwamatsu980fbb72010-10-25 03:12:24 +090024
25/* system */
26#define SHMIN_SDRAM_BASE (0x8C000000)
27#define SHMIN_FLASH_BASE_1 (0xA0000000)
28
Nobuhiro Iwamatsu0f27b042011-01-17 21:17:22 +090029#define CONFIG_SYS_TEXT_BASE 0x8DFB0000
Nobuhiro Iwamatsu980fbb72010-10-25 03:12:24 +090030#define CONFIG_SYS_LONGHELP /* undef to save memory */
Nobuhiro Iwamatsu980fbb72010-10-25 03:12:24 +090031#define CONFIG_SYS_PBSIZE 256 /* Buffer size for Console output */
Nobuhiro Iwamatsu980fbb72010-10-25 03:12:24 +090032/* List of legal baudrate settings for this board */
Nobuhiro Iwamatsu10b2b402011-01-06 12:38:01 +090033#define CONFIG_SYS_BAUDRATE_TABLE { 9600,14400,19200,38400,57600,115200 }
Nobuhiro Iwamatsu980fbb72010-10-25 03:12:24 +090034
35/* SCIF */
Nobuhiro Iwamatsu980fbb72010-10-25 03:12:24 +090036#define CONFIG_CONS_SCIF0 1
37
38/* memory */
39#define CONFIG_SYS_SDRAM_BASE SHMIN_SDRAM_BASE
40#define CONFIG_SYS_SDRAM_SIZE (32 * 1024 * 1024)
41#define CONFIG_SYS_MEMTEST_START SHMIN_SDRAM_BASE
42#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + CONFIG_SYS_SDRAM_SIZE - (256 * 1024))
43
44#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 1 * 1024 * 1024)
45#define CONFIG_SYS_MONITOR_BASE (SHMIN_FLASH_BASE_1 + CONFIG_ENV_SECT_SIZE)
46#define CONFIG_SYS_MONITOR_LEN (128 * 1024)
47#define CONFIG_SYS_MALLOC_LEN (256 * 1024)
Nobuhiro Iwamatsu980fbb72010-10-25 03:12:24 +090048#define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024)
49
50/* FLASH */
51#define CONFIG_SYS_FLASH_CFI
52#define CONFIG_FLASH_CFI_DRIVER
53#undef CONFIG_SYS_FLASH_QUIET_TEST
54#define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */
55#define CONFIG_SYS_FLASH_BASE SHMIN_FLASH_BASE_1
56#define CONFIG_SYS_MAX_FLASH_SECT 11
57#define CONFIG_SYS_MAX_FLASH_BANKS 1
58
59#define CONFIG_FLASH_CFI_LEGACY
60#define CONFIG_SYS_ATMEL_BASE CONFIG_SYS_FLASH_BASE
61#define CONFIG_SYS_ATMEL_TOTALSECT CONFIG_SYS_MAX_FLASH_SECT
62#define CONFIG_SYS_ATMEL_REGION 4
63#define CONFIG_SYS_ATMEL_SECT {1, 2, 1, 7}
64#define CONFIG_SYS_ATMEL_SECTSZ {0x4000, 0x2000, 0x8000, 0x10000}
65
Nobuhiro Iwamatsu980fbb72010-10-25 03:12:24 +090066#define CONFIG_ENV_SECT_SIZE (64 * 1024)
67#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
Nobuhiro Iwamatsu10b2b402011-01-06 12:38:01 +090068
69#ifdef CONFIG_T_SH7706LSR
70#define CONFIG_ENV_ADDR (SHMIN_FLASH_BASE_1 + 70000)
71#else
Nobuhiro Iwamatsu980fbb72010-10-25 03:12:24 +090072#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN)
Nobuhiro Iwamatsu10b2b402011-01-06 12:38:01 +090073#endif
74
Nobuhiro Iwamatsu980fbb72010-10-25 03:12:24 +090075#define CONFIG_SYS_FLASH_ERASE_TOUT 120000
76#define CONFIG_SYS_FLASH_WRITE_TOUT 500
77
78/* Board Clock */
Nobuhiro Iwamatsu10b2b402011-01-06 12:38:01 +090079#ifdef CONFIG_T_SH7706LSR
80#define CONFIG_SYS_CLK_FREQ 40000000
81#else
Nobuhiro Iwamatsu980fbb72010-10-25 03:12:24 +090082#define CONFIG_SYS_CLK_FREQ 33333333
Nobuhiro Iwamatsu10b2b402011-01-06 12:38:01 +090083#endif /* CONFIG_T_SH7706LSR */
Nobuhiro Iwamatsue6984492013-08-21 16:11:21 +090084#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
85#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
Nobuhiro Iwamatsu980fbb72010-10-25 03:12:24 +090086#define CONFIG_SYS_TMU_CLK_DIV 4
Nobuhiro Iwamatsu980fbb72010-10-25 03:12:24 +090087
88/* Network device */
89#define CONFIG_DRIVER_NE2000
90#define CONFIG_DRIVER_NE2000_BASE (0xb0000300)
91
92#endif /* __SHMIN_H */