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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0
Marek Vasutf9d73212018-01-10 11:47:03 +01002/*
3 * Device Tree Source extras for U-Boot for the ULCB board
4 *
5 * Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
Marek Vasutf9d73212018-01-10 11:47:03 +01006 */
7
Marek Vasutadaa0162020-04-04 16:12:48 +02008#include "r8a77960-u-boot.dtsi"
Marek Vasut3e6cb072018-12-03 20:48:16 +01009
10/ {
11 cpld {
12 compatible = "renesas,ulcb-cpld";
13 status = "okay";
14 gpio-sck = <&gpio6 8 0>;
15 gpio-mosi = <&gpio6 7 0>;
16 gpio-miso = <&gpio6 10 0>;
17 gpio-sstbz = <&gpio2 3 0>;
18 };
Marek Vasutc1728452021-07-03 18:16:14 +020019
20 sysinfo {
21 compatible = "renesas,rcar-sysinfo";
22 i2c-eeprom = <&sysinfo_eeprom>;
Simon Glassd3a98cb2023-02-13 08:56:33 -070023 bootph-all;
Marek Vasutc1728452021-07-03 18:16:14 +020024 };
25};
26
27&i2c_dvfs {
Simon Glassd3a98cb2023-02-13 08:56:33 -070028 bootph-all;
Marek Vasutc1728452021-07-03 18:16:14 +020029
30 sysinfo_eeprom: eeprom@50 {
31 compatible = "rohm,br24t01", "atmel,24c01";
32 reg = <0x50>;
33 pagesize = <8>;
Simon Glassd3a98cb2023-02-13 08:56:33 -070034 bootph-all;
Marek Vasutc1728452021-07-03 18:16:14 +020035 status = "okay";
36 };
Marek Vasut3e6cb072018-12-03 20:48:16 +010037};
Marek Vasutd34dfe12018-12-03 20:55:01 +010038
Marek Vasutb4690062017-07-29 21:28:50 +020039&rpc {
40 reg = <0 0xee200000 0 0x100>, <0 0x08000000 0 0x04000000>;
Marek Vasutf83c8342021-07-10 18:56:29 +020041 status = "disabled";
Marek Vasutb4690062017-07-29 21:28:50 +020042};
43
Marek Vasutd34dfe12018-12-03 20:55:01 +010044&sdhi0 {
45 sd-uhs-sdr12;
46 sd-uhs-sdr25;
47 sd-uhs-sdr104;
48 max-frequency = <208000000>;
49};
50
51&sdhi2 {
Marek Vasuta6c719f2020-03-08 18:25:09 +010052 mmc-ddr-1_8v;
53 mmc-hs200-1_8v;
Marek Vasutd34dfe12018-12-03 20:55:01 +010054 mmc-hs400-1_8v;
55 max-frequency = <200000000>;
56};
Marek Vasuta07df962019-03-18 03:20:31 +010057
58&vcc_sdhi0 {
59 u-boot,off-on-delay-us = <20000>;
60};