| Rajesh Bhagat | 9af0a0b | 2018-11-05 18:02:40 +0000 | [diff] [blame] | 1 | CONFIG_ARM=y |
| 2 | CONFIG_TARGET_LS1046AQDS=y |
| 3 | CONFIG_SYS_TEXT_BASE=0x82000000 |
| Rajesh Bhagat | 9af0a0b | 2018-11-05 18:02:40 +0000 | [diff] [blame] | 4 | CONFIG_SECURE_BOOT=y |
| Tom Rini | 929ea65 | 2019-01-07 17:46:19 -0500 | [diff] [blame^] | 5 | CONFIG_TFABOOT=y |
| 6 | CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y |
| 7 | CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y |
| 8 | CONFIG_AHCI=y |
| Rajesh Bhagat | 9af0a0b | 2018-11-05 18:02:40 +0000 | [diff] [blame] | 9 | CONFIG_DISTRO_DEFAULTS=y |
| 10 | CONFIG_NR_DRAM_BANKS=2 |
| Rajesh Bhagat | 9af0a0b | 2018-11-05 18:02:40 +0000 | [diff] [blame] | 11 | CONFIG_FIT_VERBOSE=y |
| 12 | CONFIG_OF_BOARD_SETUP=y |
| Rajesh Bhagat | 9af0a0b | 2018-11-05 18:02:40 +0000 | [diff] [blame] | 13 | CONFIG_BOOTDELAY=10 |
| 14 | CONFIG_USE_BOOTARGS=y |
| 15 | CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:4m(nand_uboot),36m(nand_kernel),472m(nand_free);spi0.0:2m(uboot),14m(free)" |
| 16 | # CONFIG_USE_BOOTCOMMAND is not set |
| 17 | CONFIG_MISC_INIT_R=y |
| 18 | CONFIG_CMD_BOOTZ=y |
| 19 | CONFIG_CMD_IMLS=y |
| 20 | CONFIG_CMD_GREPENV=y |
| 21 | CONFIG_CMD_MEMINFO=y |
| 22 | CONFIG_CMD_MEMTEST=y |
| 23 | CONFIG_CMD_GPT=y |
| 24 | CONFIG_CMD_I2C=y |
| 25 | CONFIG_CMD_MMC=y |
| 26 | CONFIG_CMD_NAND=y |
| 27 | CONFIG_CMD_PCI=y |
| 28 | CONFIG_CMD_SF=y |
| 29 | CONFIG_CMD_USB=y |
| 30 | CONFIG_CMD_CACHE=y |
| 31 | CONFIG_MP=y |
| 32 | CONFIG_MTDPARTS_DEFAULT="mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:4m(nand_uboot),36m(nand_kernel),472m(nand_free);spi0.0:2m(uboot),14m(free)" |
| 33 | CONFIG_OF_CONTROL=y |
| 34 | CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart" |
| Rajesh Bhagat | 9af0a0b | 2018-11-05 18:02:40 +0000 | [diff] [blame] | 35 | CONFIG_DM=y |
| Tom Rini | 929ea65 | 2019-01-07 17:46:19 -0500 | [diff] [blame^] | 36 | CONFIG_SATA_CEVA=y |
| Rajesh Bhagat | 9af0a0b | 2018-11-05 18:02:40 +0000 | [diff] [blame] | 37 | CONFIG_DM_MMC=y |
| 38 | CONFIG_FSL_ESDHC=y |
| 39 | CONFIG_MTD_NOR_FLASH=y |
| 40 | CONFIG_FLASH_CFI_DRIVER=y |
| 41 | CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y |
| 42 | CONFIG_SYS_FLASH_CFI=y |
| 43 | CONFIG_SPI_FLASH=y |
| 44 | CONFIG_PHYLIB=y |
| 45 | CONFIG_E1000=y |
| 46 | CONFIG_PCI=y |
| 47 | CONFIG_DM_PCI=y |
| 48 | CONFIG_DM_PCI_COMPAT=y |
| 49 | CONFIG_PCIE_LAYERSCAPE=y |
| Tom Rini | 929ea65 | 2019-01-07 17:46:19 -0500 | [diff] [blame^] | 50 | CONFIG_DM_SCSI=y |
| Rajesh Bhagat | 9af0a0b | 2018-11-05 18:02:40 +0000 | [diff] [blame] | 51 | CONFIG_SYS_NS16550=y |
| 52 | CONFIG_SPI=y |
| 53 | CONFIG_DM_SPI=y |
| 54 | CONFIG_FSL_DSPI=y |
| 55 | CONFIG_USB=y |
| 56 | CONFIG_DM_USB=y |
| 57 | CONFIG_USB_XHCI_HCD=y |
| 58 | CONFIG_USB_XHCI_DWC3=y |
| Rajesh Bhagat | 9af0a0b | 2018-11-05 18:02:40 +0000 | [diff] [blame] | 59 | CONFIG_RSA=y |