blob: ab199b1e5befd08a247861e3766df9ffd780b819 [file] [log] [blame]
wdenke65527f2004-02-12 00:47:09 +00001/*
2 * Copyright (C) 2003 Josef Baumgartner <josef.baumgartner@telex.de>
3 * Based on code from Bernhard Kuhn <bkuhn@metrowerks.com>
4 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +02005 * SPDX-License-Identifier: GPL-2.0+
wdenke65527f2004-02-12 00:47:09 +00006 */
7
Wolfgang Denk0191e472010-10-26 14:34:52 +02008#include <asm-offsets.h>
wdenke65527f2004-02-12 00:47:09 +00009#include <config.h>
10#include "version.h"
TsiChung Liew0ee47d42010-03-11 22:12:53 -060011#include <asm/cache.h>
wdenke65527f2004-02-12 00:47:09 +000012
wdenke65527f2004-02-12 00:47:09 +000013#define _START _start
14#define _FAULT _fault
15
16
17#define SAVE_ALL \
18 move.w #0x2700,%sr; /* disable intrs */ \
19 subl #60,%sp; /* space for 15 regs */ \
20 moveml %d0-%d7/%a0-%a6,%sp@; \
21
22#define RESTORE_ALL \
23 moveml %sp@,%d0-%d7/%a0-%a6; \
24 addl #60,%sp; /* space for 15 regs */ \
25 rte
26
27/* If we come from a pre-loader we don't need an initial exception
28 * table.
29 */
30#if !defined(CONFIG_MONITOR_IS_IN_RAM)
31
32.text
Angelo Dureghello65d59912016-05-22 00:14:29 +020033
wdenke65527f2004-02-12 00:47:09 +000034/*
Angelo Dureghello65d59912016-05-22 00:14:29 +020035 * Vector table. This is used for initial platform startup.
36 * These vectors are to catch any un-intended traps.
wdenke65527f2004-02-12 00:47:09 +000037 */
38_vectors:
Wolfgang Denkb4b1c462006-06-10 19:27:47 +020039.long 0x00000000 /* Flash offset is 0 until we setup CS0 */
Wolfgang Denk0708bc62010-10-07 21:51:12 +020040#if defined(CONFIG_M5282) && (CONFIG_SYS_TEXT_BASE == CONFIG_SYS_INT_FLASH_BASE)
41.long _start - CONFIG_SYS_TEXT_BASE
Zachary P. Landau0bba8622006-01-26 17:35:56 -050042#else
Wolfgang Denkb4b1c462006-06-10 19:27:47 +020043.long _START
Zachary P. Landau0bba8622006-01-26 17:35:56 -050044#endif
Wolfgang Denkb4b1c462006-06-10 19:27:47 +020045
wdenke65527f2004-02-12 00:47:09 +000046.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
47.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
48.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
49.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
50.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
51.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
52.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
53.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
54
55.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
56.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
57.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
58.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
59.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
60.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
61.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
62.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
63
64.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
65.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
66.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
67.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
68.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
69.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
70.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
71.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
72
73.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
74.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
75.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
76.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
77.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
78.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
79.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
80.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
81
82#endif
83
Angelo Dureghello65d59912016-05-22 00:14:29 +020084.text
Heiko Schocherac1956e2006-04-20 08:42:42 +020085
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020086#if defined(CONFIG_SYS_INT_FLASH_BASE) && \
Heiko Schocherac1956e2006-04-20 08:42:42 +020087 (defined(CONFIG_M5282) || defined(CONFIG_M5281))
Angelo Dureghello65d59912016-05-22 00:14:29 +020088#if (CONFIG_SYS_TEXT_BASE == CONFIG_SYS_INT_FLASH_BASE)
89.long 0x55AA55AA,0xAA55AA55 /* CFM Backdoorkey */
90.long 0xFFFFFFFF /* all sectors protected */
91.long 0x00000000 /* supervisor/User restriction */
92.long 0x00000000 /* programm/data space restriction */
93.long 0x00000000 /* Flash security */
94#endif
Heiko Schocherac1956e2006-04-20 08:42:42 +020095#endif
Angelo Dureghello65d59912016-05-22 00:14:29 +020096
97.globl _start
wdenke65527f2004-02-12 00:47:09 +000098_start:
99 nop
100 nop
Angelo Dureghello65d59912016-05-22 00:14:29 +0200101 move.w #0x2700,%sr
wdenke65527f2004-02-12 00:47:09 +0000102
TsiChung Liewb354aef2009-06-12 11:29:00 +0000103#if defined(CONFIG_M5208)
104 /* Initialize RAMBAR: locate SRAM and validate it */
105 move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_CTRL), %d0
106 movec %d0, %RAMBAR1
107#endif
108
TsiChungLiew34674692007-08-16 13:20:50 -0500109#if defined(CONFIG_M5272) || defined(CONFIG_M5249) || defined(CONFIG_M5253)
Angelo Dureghello65d59912016-05-22 00:14:29 +0200110 /* set MBAR address + valid flag */
111 move.l #(CONFIG_SYS_MBAR + 1), %d0
wdenke65527f2004-02-12 00:47:09 +0000112 move.c %d0, %MBAR
113
stroese53395a22004-12-16 18:09:49 +0000114 /*** The 5249 has MBAR2 as well ***/
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200115#ifdef CONFIG_SYS_MBAR2
Angelo Dureghello65d59912016-05-22 00:14:29 +0200116 /* Get MBAR2 address */
117 move.l #(CONFIG_SYS_MBAR2 + 1), %d0
118 /* Set MBAR2 */
119 movec %d0, #0xc0e
stroese53395a22004-12-16 18:09:49 +0000120#endif
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200121 move.l #(CONFIG_SYS_INIT_RAM_ADDR + 1), %d0
wdenke65527f2004-02-12 00:47:09 +0000122 movec %d0, %RAMBAR0
TsiChungLiew34674692007-08-16 13:20:50 -0500123#endif /* CONFIG_M5272 || CONFIG_M5249 || CONFIG_M5253 */
wdenke65527f2004-02-12 00:47:09 +0000124
Wolfgang Denkb4b1c462006-06-10 19:27:47 +0200125#if defined(CONFIG_M5282) || defined(CONFIG_M5271)
Angelo Dureghello65d59912016-05-22 00:14:29 +0200126 /* set MBAR address + valid flag */
127 move.l #(CONFIG_SYS_MBAR + 1), %d0
wdenke65527f2004-02-12 00:47:09 +0000128 move.l %d0, 0x40000000
129
Heiko Schocherac1956e2006-04-20 08:42:42 +0200130 /* Initialize RAMBAR1: locate SRAM and validate it */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200131 move.l #(CONFIG_SYS_INIT_RAM_ADDR + 0x21), %d0
Heiko Schocherac1956e2006-04-20 08:42:42 +0200132 movec %d0, %RAMBAR1
133
Bartlomiej Sieka8ff81c62006-12-20 00:27:32 +0100134#if defined(CONFIG_M5282)
Wolfgang Denk0708bc62010-10-07 21:51:12 +0200135#if (CONFIG_SYS_TEXT_BASE == CONFIG_SYS_INT_FLASH_BASE)
Angelo Dureghello65d59912016-05-22 00:14:29 +0200136 /*
137 * Setup code in SRAM to initialize FLASHBAR,
138 * if start from internal Flash
139 */
140 move.l #(_flashbar_setup-CONFIG_SYS_INT_FLASH_BASE), %a0
141 move.l #(_flashbar_setup_end-CONFIG_SYS_INT_FLASH_BASE), %a1
142 move.l #(CONFIG_SYS_INIT_RAM_ADDR), %a2
Heiko Schocherac1956e2006-04-20 08:42:42 +0200143_copy_flash:
Angelo Dureghello65d59912016-05-22 00:14:29 +0200144 move.l (%a0)+, (%a2)+
145 cmp.l %a0, %a1
146 bgt.s _copy_flash
147 jmp CONFIG_SYS_INIT_RAM_ADDR
Heiko Schocherac1956e2006-04-20 08:42:42 +0200148
149_flashbar_setup:
wdenke65527f2004-02-12 00:47:09 +0000150 /* Initialize FLASHBAR: locate internal Flash and validate it */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200151 move.l #(CONFIG_SYS_INT_FLASH_BASE + CONFIG_SYS_INT_FLASH_ENABLE), %d0
TsiChung Liew7e5ae272008-03-13 14:26:32 -0500152 movec %d0, %FLASHBAR
Angelo Dureghello65d59912016-05-22 00:14:29 +0200153 jmp _after_flashbar_copy.L /* Force jump to absolute address */
Heiko Schocherac1956e2006-04-20 08:42:42 +0200154_flashbar_setup_end:
155 nop
156_after_flashbar_copy:
157#else
158 /* Setup code to initialize FLASHBAR, if start from external Memory */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200159 move.l #(CONFIG_SYS_INT_FLASH_BASE + CONFIG_SYS_INT_FLASH_ENABLE), %d0
TsiChung Liewfcd4aac2008-08-11 15:54:25 +0000160 movec %d0, %FLASHBAR
Wolfgang Denk0708bc62010-10-07 21:51:12 +0200161#endif /* (CONFIG_SYS_TEXT_BASE == CONFIG_SYS_INT_FLASH_BASE) */
wdenke65527f2004-02-12 00:47:09 +0000162
Heiko Schocherac1956e2006-04-20 08:42:42 +0200163#endif
Wolfgang Denk5b1657d2006-09-04 01:03:57 +0200164#endif
Angelo Dureghello65d59912016-05-22 00:14:29 +0200165 /*
166 * if we come from a pre-loader we have no exception table and
Heiko Schocherac1956e2006-04-20 08:42:42 +0200167 * therefore no VBR to set
168 */
169#if !defined(CONFIG_MONITOR_IS_IN_RAM)
Wolfgang Denk0708bc62010-10-07 21:51:12 +0200170#if defined(CONFIG_M5282) && (CONFIG_SYS_TEXT_BASE == CONFIG_SYS_INT_FLASH_BASE)
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200171 move.l #CONFIG_SYS_INT_FLASH_BASE, %d0
TsiChungLiew5bffcad2007-10-25 17:09:17 -0500172#else
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200173 move.l #CONFIG_SYS_FLASH_BASE, %d0
TsiChungLiew5bffcad2007-10-25 17:09:17 -0500174#endif
Heiko Schocherac1956e2006-04-20 08:42:42 +0200175 movec %d0, %VBR
Marian Balakowiczc20d87d2006-05-09 11:51:51 +0200176#endif
177
Matthew Fettke761e2e92008-02-04 15:38:20 -0600178#ifdef CONFIG_M5275
Angelo Dureghello65d59912016-05-22 00:14:29 +0200179 /* set MBAR address + valid flag */
180 move.l #(CONFIG_SYS_MBAR + 1), %d0
Matthew Fettke761e2e92008-02-04 15:38:20 -0600181 move.l %d0, 0x40000000
182/* movec %d0, %MBAR */
183
184 /* Initialize RAMBAR: locate SRAM and validate it */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200185 move.l #(CONFIG_SYS_INIT_RAM_ADDR + 0x21), %d0
Matthew Fettke761e2e92008-02-04 15:38:20 -0600186 movec %d0, %RAMBAR1
187#endif
188
TsiChung Liew0ee47d42010-03-11 22:12:53 -0600189 /* initialize general use internal ram */
Angelo Dureghello65d59912016-05-22 00:14:29 +0200190 move.l #0, %d0
191 move.l #(ICACHE_STATUS), %a1 /* icache */
192 move.l #(DCACHE_STATUS), %a2 /* icache */
193 move.l %d0, (%a1)
194 move.l %d0, (%a2)
TsiChung Liew0ee47d42010-03-11 22:12:53 -0600195
angelo@sysam.itef9707c2016-04-27 21:50:44 +0200196 /* put relocation table address to a5 */
Angelo Dureghello65d59912016-05-22 00:14:29 +0200197 move.l #__got_start, %a5
wdenke65527f2004-02-12 00:47:09 +0000198
angelo@sysam.itef9707c2016-04-27 21:50:44 +0200199 /* setup stack initially on top of internal static ram */
Angelo Dureghello65d59912016-05-22 00:14:29 +0200200 move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_SIZE), %sp
angelo@sysam.itef9707c2016-04-27 21:50:44 +0200201
202 /*
203 * if configured, malloc_f arena will be reserved first,
204 * then (and always) gd struct space will be reserved
205 */
206 move.l %sp, -(%sp)
207 move.l #board_init_f_alloc_reserve, %a1
Angelo Dureghello65d59912016-05-22 00:14:29 +0200208 jsr (%a1)
angelo@sysam.itef9707c2016-04-27 21:50:44 +0200209
210 /* update stack and frame-pointers */
Angelo Dureghello65d59912016-05-22 00:14:29 +0200211 move.l %d0, %sp
212 move.l %sp, %fp
angelo@sysam.itef9707c2016-04-27 21:50:44 +0200213
214 /* initialize reserved area */
Angelo Dureghello65d59912016-05-22 00:14:29 +0200215 move.l %d0, -(%sp)
angelo@sysam.itef9707c2016-04-27 21:50:44 +0200216 move.l #board_init_f_init_reserve, %a1
Angelo Dureghello65d59912016-05-22 00:14:29 +0200217 jsr (%a1)
wdenke65527f2004-02-12 00:47:09 +0000218
angelo@sysam.itb8cd1322016-04-12 00:30:59 +0200219 /* run low-level CPU init code (from flash) */
Angelo Dureghello65d59912016-05-22 00:14:29 +0200220 move.l #cpu_init_f, %a1
221 jsr (%a1)
222
angelo@sysam.itb8cd1322016-04-12 00:30:59 +0200223 /* run low-level board init code (from flash) */
Angelo Dureghello65d59912016-05-22 00:14:29 +0200224 clr.l %sp@-
225 move.l #board_init_f, %a1
226 jsr (%a1)
wdenke65527f2004-02-12 00:47:09 +0000227
Marian Balakowiczc20d87d2006-05-09 11:51:51 +0200228 /* board_init_f() does not return */
wdenke65527f2004-02-12 00:47:09 +0000229
Angelo Dureghello65d59912016-05-22 00:14:29 +0200230/******************************************************************************/
wdenke65527f2004-02-12 00:47:09 +0000231
232/*
233 * void relocate_code (addr_sp, gd, addr_moni)
234 *
235 * This "function" does not return, instead it continues in RAM
236 * after relocating the monitor code.
237 *
238 * r3 = dest
239 * r4 = src
240 * r5 = length in bytes
241 * r6 = cachelinesize
242 */
Angelo Dureghello65d59912016-05-22 00:14:29 +0200243.globl relocate_code
wdenke65527f2004-02-12 00:47:09 +0000244relocate_code:
Angelo Dureghello65d59912016-05-22 00:14:29 +0200245 link.w %a6,#0
246 move.l 8(%a6), %sp /* set new stack pointer */
wdenke65527f2004-02-12 00:47:09 +0000247
Angelo Dureghello65d59912016-05-22 00:14:29 +0200248 move.l 12(%a6), %d0 /* Save copy of Global Data pointer */
249 move.l 16(%a6), %a0 /* Save copy of Destination Address */
wdenke65527f2004-02-12 00:47:09 +0000250
Angelo Dureghello65d59912016-05-22 00:14:29 +0200251 move.l #CONFIG_SYS_MONITOR_BASE, %a1
252 move.l #__init_end, %a2
253 move.l %a0, %a3
wdenke65527f2004-02-12 00:47:09 +0000254 /* copy the code to RAM */
2551:
Angelo Dureghello65d59912016-05-22 00:14:29 +0200256 move.l (%a1)+, (%a3)+
257 cmp.l %a1,%a2
258 bgt.s 1b
wdenke65527f2004-02-12 00:47:09 +0000259
260/*
261 * We are done. Do not return, instead branch to second part of board
262 * initialization, now running from RAM.
263 */
Wolfgang Denka1be4762008-05-20 16:00:29 +0200264 move.l %a0, %a1
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200265 add.l #(in_ram - CONFIG_SYS_MONITOR_BASE), %a1
wdenke65527f2004-02-12 00:47:09 +0000266 jmp (%a1)
267
268in_ram:
269
270clear_bss:
Wolfgang Denka1be4762008-05-20 16:00:29 +0200271 /*
wdenke65527f2004-02-12 00:47:09 +0000272 * Now clear BSS segment
273 */
274 move.l %a0, %a1
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200275 add.l #(_sbss - CONFIG_SYS_MONITOR_BASE),%a1
wdenke65527f2004-02-12 00:47:09 +0000276 move.l %a0, %d1
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200277 add.l #(_ebss - CONFIG_SYS_MONITOR_BASE),%d1
wdenke65527f2004-02-12 00:47:09 +00002786:
279 clr.l (%a1)+
280 cmp.l %a1,%d1
281 bgt.s 6b
282
283 /*
284 * fix got table in RAM
285 */
286 move.l %a0, %a1
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200287 add.l #(__got_start - CONFIG_SYS_MONITOR_BASE),%a1
Angelo Dureghello65d59912016-05-22 00:14:29 +0200288 move.l %a1,%a5 /* fix got pointer register a5 */
wdenke65527f2004-02-12 00:47:09 +0000289
290 move.l %a0, %a2
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200291 add.l #(__got_end - CONFIG_SYS_MONITOR_BASE),%a2
wdenke65527f2004-02-12 00:47:09 +0000292
2937:
294 move.l (%a1),%d1
295 sub.l #_start,%d1
296 add.l %a0,%d1
297 move.l %d1,(%a1)+
298 cmp.l %a2, %a1
299 bne 7b
300
301 /* calculate relative jump to board_init_r in ram */
Angelo Dureghello65d59912016-05-22 00:14:29 +0200302 move.l %a0, %a1
303 add.l #(board_init_r - CONFIG_SYS_MONITOR_BASE), %a1
wdenke65527f2004-02-12 00:47:09 +0000304
305 /* set parameters for board_init_r */
Angelo Dureghello65d59912016-05-22 00:14:29 +0200306 move.l %a0,-(%sp) /* dest_addr */
307 move.l %d0,-(%sp) /* gd */
Wolfgang Denk0708bc62010-10-07 21:51:12 +0200308#if defined(DEBUG) && (CONFIG_SYS_TEXT_BASE != CONFIG_SYS_INT_FLASH_BASE) && \
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200309 defined(CONFIG_SYS_HALT_BEFOR_RAM_JUMP)
TsiChungLiew8cd73be2007-08-15 19:21:21 -0500310 halt
311#endif
wdenke65527f2004-02-12 00:47:09 +0000312 jsr (%a1)
313
Angelo Dureghello65d59912016-05-22 00:14:29 +0200314/******************************************************************************/
315
wdenke65527f2004-02-12 00:47:09 +0000316/* exception code */
Angelo Dureghello65d59912016-05-22 00:14:29 +0200317.globl _fault
wdenke65527f2004-02-12 00:47:09 +0000318_fault:
Angelo Dureghello65d59912016-05-22 00:14:29 +0200319 bra _fault
wdenke65527f2004-02-12 00:47:09 +0000320
Angelo Dureghello65d59912016-05-22 00:14:29 +0200321.globl _exc_handler
wdenke65527f2004-02-12 00:47:09 +0000322_exc_handler:
323 SAVE_ALL
324 movel %sp,%sp@-
Angelo Dureghello65d59912016-05-22 00:14:29 +0200325 bsr exc_handler
wdenke65527f2004-02-12 00:47:09 +0000326 addql #4,%sp
327 RESTORE_ALL
328
Angelo Dureghello65d59912016-05-22 00:14:29 +0200329.globl _int_handler
wdenke65527f2004-02-12 00:47:09 +0000330_int_handler:
331 SAVE_ALL
332 movel %sp,%sp@-
Angelo Dureghello65d59912016-05-22 00:14:29 +0200333 bsr int_handler
wdenke65527f2004-02-12 00:47:09 +0000334 addql #4,%sp
335 RESTORE_ALL
336
Angelo Dureghello65d59912016-05-22 00:14:29 +0200337/******************************************************************************/
wdenke65527f2004-02-12 00:47:09 +0000338
Angelo Dureghello65d59912016-05-22 00:14:29 +0200339.globl version_string
wdenke65527f2004-02-12 00:47:09 +0000340version_string:
Angelo Dureghello65d59912016-05-22 00:14:29 +0200341.ascii U_BOOT_VERSION_STRING, "\0"
342.align 4