blob: 26e5017737a354721b1f700250ff573902cdbeff [file] [log] [blame]
Tom Rini53633a82024-02-29 12:33:36 -05001# SPDX-License-Identifier: GPL-2.0-only
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/display/samsung/samsung,exynos5433-mic.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Samsung Exynos5433 SoC Mobile Image Compressor (MIC)
8
9maintainers:
10 - Inki Dae <inki.dae@samsung.com>
11 - Seung-Woo Kim <sw0312.kim@samsung.com>
12 - Kyungmin Park <kyungmin.park@samsung.com>
13 - Krzysztof Kozlowski <krzk@kernel.org>
14
15description: |
16 MIC (Mobile Image Compressor) resides between DECON and MIPI DSI. MIPI DSI is
17 not capable of transferring high resoltuion frame data as DECON can send. MIC
18 solves this problem by compressing the frame data by 1/2 before it is
19 transferred through MIPI DSI. The compressed frame data must be uncompressed
20 in the panel PCB.
21
22properties:
23 compatible:
24 const: samsung,exynos5433-mic
25
26 clocks:
27 maxItems: 2
28
29 clock-names:
30 items:
31 - const: pclk_mic0
32 - const: sclk_rgb_vclk_to_mic0
33
34 ports:
35 $ref: /schemas/graph.yaml#/properties/ports
36 description:
37 Contains a port which is connected to mic node.
38
39 power-domains:
40 maxItems: 1
41
42 reg:
43 maxItems: 1
44
45 samsung,disp-syscon:
46 $ref: /schemas/types.yaml#/definitions/phandle
47 description:
48 Phandle to DISP system controller interface.
49
50required:
51 - compatible
52 - clocks
53 - clock-names
54 - ports
55 - reg
56 - samsung,disp-syscon
57
58additionalProperties: false
59
60examples:
61 - |
62 #include <dt-bindings/clock/exynos5433.h>
63 #include <dt-bindings/interrupt-controller/arm-gic.h>
64
65 image-processor@13930000 {
66 compatible = "samsung,exynos5433-mic";
67 reg = <0x13930000 0x48>;
68 clocks = <&cmu_disp CLK_PCLK_MIC0>,
69 <&cmu_disp CLK_SCLK_RGB_VCLK_TO_MIC0>;
70 clock-names = "pclk_mic0",
71 "sclk_rgb_vclk_to_mic0";
72 power-domains = <&pd_disp>;
73 samsung,disp-syscon = <&syscon_disp>;
74
75 ports {
76 #address-cells = <1>;
77 #size-cells = <0>;
78
79 port@0 {
80 reg = <0>;
81 mic_to_decon: endpoint {
82 remote-endpoint = <&decon_to_mic>;
83 };
84 };
85
86 port@1 {
87 reg = <1>;
88 mic_to_dsi: endpoint {
89 remote-endpoint = <&dsi_to_mic>;
90 };
91 };
92 };
93 };