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git01.mediatek.com / filogic / uboot / 92033594a521a48435089cd344dd319d06fb012c / . / include / phy_interface.h
blob: ce3b5004ec22923c3c89e21bef4575329e53da74 [file] [log] [blame]
Joe Hershbergerf5581fb2018-07-17 15:02:30 -0500[diff] [blame]1/* SPDX-License-Identifier: GPL-2.0+ */
2/*
3 * Copyright 2011 Freescale Semiconductor, Inc.
Florinel Iordachea618a5a2020-03-16 15:35:59 +0200[diff] [blame]4 * Copyright 2020 NXP
Joe Hershbergerf5581fb2018-07-17 15:02:30 -0500[diff] [blame]5 * Andy Fleming <afleming@gmail.com>
6 *
7 * This file pretty much stolen from Linux's mii.h/ethtool.h/phy.h
8 */
9
10#ifndef _PHY_INTERFACE_H
11#define _PHY_INTERFACE_H
12
Simon Glass992b6032020-07-19 10:15:39 -0600[diff] [blame]13#include <string.h>
14
Joe Hershbergerf5581fb2018-07-17 15:02:30 -0500[diff] [blame]15typedef enum {
Marek Behún87584532022-04-07 00:33:04 +0200[diff] [blame]16 PHY_INTERFACE_MODE_NA, /* don't touch */
Joe Hershbergerf5581fb2018-07-17 15:02:30 -0500[diff] [blame]17 PHY_INTERFACE_MODE_MII,
18 PHY_INTERFACE_MODE_GMII,
19 PHY_INTERFACE_MODE_SGMII,
20 PHY_INTERFACE_MODE_SGMII_2500,
21 PHY_INTERFACE_MODE_QSGMII,
22 PHY_INTERFACE_MODE_TBI,
23 PHY_INTERFACE_MODE_RMII,
24 PHY_INTERFACE_MODE_RGMII,
25 PHY_INTERFACE_MODE_RGMII_ID,
26 PHY_INTERFACE_MODE_RGMII_RXID,
27 PHY_INTERFACE_MODE_RGMII_TXID,
28 PHY_INTERFACE_MODE_RTBI,
Stefan Chulski6a0218d2021-05-03 08:08:44 +0200[diff] [blame]29 PHY_INTERFACE_MODE_1000BASEX,
30 PHY_INTERFACE_MODE_2500BASEX,
Joe Hershbergerf5581fb2018-07-17 15:02:30 -0500[diff] [blame]31 PHY_INTERFACE_MODE_XGMII,
32 PHY_INTERFACE_MODE_XAUI,
33 PHY_INTERFACE_MODE_RXAUI,
34 PHY_INTERFACE_MODE_SFI,
35 PHY_INTERFACE_MODE_INTERNAL,
Priyanka Jainafaa0cb2018-08-27 15:15:19 +0530[diff] [blame]36 PHY_INTERFACE_MODE_25G_AUI,
37 PHY_INTERFACE_MODE_XLAUI,
38 PHY_INTERFACE_MODE_CAUI2,
39 PHY_INTERFACE_MODE_CAUI4,
Samuel Mendoza-Jonasb069c4a2019-06-18 11:37:18 +1000[diff] [blame]40 PHY_INTERFACE_MODE_NCSI,
Vladimir Oltean6a6e4022021-09-18 15:32:34 +0300[diff] [blame]41 PHY_INTERFACE_MODE_10GBASER,
Alex Marginean5219f682019-11-14 18:28:28 +0200[diff] [blame]42 PHY_INTERFACE_MODE_USXGMII,
Marek Behún21a18362022-04-07 00:33:02 +0200[diff] [blame]43 PHY_INTERFACE_MODE_MAX,
Joe Hershbergerf5581fb2018-07-17 15:02:30 -0500[diff] [blame]44} phy_interface_t;
45
46static const char * const phy_interface_strings[] = {
Marek Behún87584532022-04-07 00:33:04 +0200[diff] [blame]47 [PHY_INTERFACE_MODE_NA] = "",
Joe Hershbergerf5581fb2018-07-17 15:02:30 -0500[diff] [blame]48 [PHY_INTERFACE_MODE_MII] = "mii",
49 [PHY_INTERFACE_MODE_GMII] = "gmii",
50 [PHY_INTERFACE_MODE_SGMII] = "sgmii",
51 [PHY_INTERFACE_MODE_SGMII_2500] = "sgmii-2500",
52 [PHY_INTERFACE_MODE_QSGMII] = "qsgmii",
53 [PHY_INTERFACE_MODE_TBI] = "tbi",
54 [PHY_INTERFACE_MODE_RMII] = "rmii",
55 [PHY_INTERFACE_MODE_RGMII] = "rgmii",
56 [PHY_INTERFACE_MODE_RGMII_ID] = "rgmii-id",
57 [PHY_INTERFACE_MODE_RGMII_RXID] = "rgmii-rxid",
58 [PHY_INTERFACE_MODE_RGMII_TXID] = "rgmii-txid",
59 [PHY_INTERFACE_MODE_RTBI] = "rtbi",
Stefan Chulski6a0218d2021-05-03 08:08:44 +0200[diff] [blame]60 [PHY_INTERFACE_MODE_1000BASEX] = "1000base-x",
61 [PHY_INTERFACE_MODE_2500BASEX] = "2500base-x",
Joe Hershbergerf5581fb2018-07-17 15:02:30 -0500[diff] [blame]62 [PHY_INTERFACE_MODE_XGMII] = "xgmii",
63 [PHY_INTERFACE_MODE_XAUI] = "xaui",
64 [PHY_INTERFACE_MODE_RXAUI] = "rxaui",
65 [PHY_INTERFACE_MODE_SFI] = "sfi",
66 [PHY_INTERFACE_MODE_INTERNAL] = "internal",
Priyanka Jainafaa0cb2018-08-27 15:15:19 +0530[diff] [blame]67 [PHY_INTERFACE_MODE_25G_AUI] = "25g-aui",
68 [PHY_INTERFACE_MODE_XLAUI] = "xlaui4",
69 [PHY_INTERFACE_MODE_CAUI2] = "caui2",
70 [PHY_INTERFACE_MODE_CAUI4] = "caui4",
Samuel Mendoza-Jonasb069c4a2019-06-18 11:37:18 +1000[diff] [blame]71 [PHY_INTERFACE_MODE_NCSI] = "NC-SI",
Vladimir Oltean6a6e4022021-09-18 15:32:34 +0300[diff] [blame]72 [PHY_INTERFACE_MODE_10GBASER] = "10gbase-r",
Alex Marginean5219f682019-11-14 18:28:28 +0200[diff] [blame]73 [PHY_INTERFACE_MODE_USXGMII] = "usxgmii",
Joe Hershbergerf5581fb2018-07-17 15:02:30 -0500[diff] [blame]74};
75
Florinel Iordachea618a5a2020-03-16 15:35:59 +0200[diff] [blame]76/* Backplane modes:
77 * are considered a sub-type of phy_interface_t: XGMII
78 * and are specified in "phy-connection-type" with one of the following strings
79 */
80static const char * const backplane_mode_strings[] = {
81 "10gbase-kr",
82 "40gbase-kr4",
83};
84
Joe Hershbergerf5581fb2018-07-17 15:02:30 -0500[diff] [blame]85static inline const char *phy_string_for_interface(phy_interface_t i)
86{
87 /* Default to unknown */
Marek Behún48631e42022-04-07 00:33:03 +0200[diff] [blame]88 if (i > PHY_INTERFACE_MODE_NA)
89 i = PHY_INTERFACE_MODE_NA;
Joe Hershbergerf5581fb2018-07-17 15:02:30 -0500[diff] [blame]90
91 return phy_interface_strings[i];
92}
93
Florinel Iordachea618a5a2020-03-16 15:35:59 +0200[diff] [blame]94static inline bool is_backplane_mode(const char *phyconn)
95{
96 int i;
97
98 if (!phyconn)
99 return false;
100 for (i = 0; i < ARRAY_SIZE(backplane_mode_strings); i++) {
101 if (!strcmp(phyconn, backplane_mode_strings[i]))
102 return true;
103 }
104 return false;
105}
106
Joe Hershbergerf5581fb2018-07-17 15:02:30 -0500[diff] [blame]107#endif /* _PHY_INTERFACE_H */