wdenk | e085e5b | 2005-04-05 23:32:21 +0000 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2005 2N TELEKOMUNIKACE, Ladislav Michl |
| 3 | * |
| 4 | * Configuation settings for the TI OMAP VoiceBlue board. |
| 5 | * |
| 6 | * See file CREDITS for list of people who contributed to this |
| 7 | * project. |
| 8 | * |
| 9 | * This program is free software; you can redistribute it and/or |
| 10 | * modify it under the terms of the GNU General Public License |
| 11 | * version 2 as published by the Free Software Foundation. |
| 12 | * |
| 13 | * This program is distributed in the hope that it will be useful, |
| 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | * GNU General Public License for more details. |
| 17 | * |
| 18 | * You should have received a copy of the GNU General Public License |
| 19 | * along with this program; if not, write to the Free Software |
| 20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 21 | * MA 02111-1307 USA |
| 22 | */ |
| 23 | |
| 24 | #ifndef __CONFIG_H |
| 25 | #define __CONFIG_H |
| 26 | |
| 27 | #include <configs/omap1510.h> |
| 28 | |
wdenk | e085e5b | 2005-04-05 23:32:21 +0000 | [diff] [blame] | 29 | #define CONFIG_ARM925T 1 /* This is an arm925t CPU */ |
| 30 | #define CONFIG_OMAP 1 /* in a TI OMAP core */ |
| 31 | #define CONFIG_OMAP1510 1 /* which is in a 5910 */ |
| 32 | |
| 33 | /* Input clock of PLL */ |
| 34 | #define CONFIG_SYS_CLK_FREQ 150000000 /* 150MHz input clock */ |
| 35 | #define CONFIG_XTAL_FREQ 12000000 |
| 36 | |
| 37 | #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ |
| 38 | |
| 39 | #define CONFIG_MISC_INIT_R /* There is nothing to really init */ |
| 40 | #define BOARD_LATE_INIT /* but we flash the LEDs here */ |
| 41 | |
| 42 | #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ |
| 43 | #define CONFIG_SETUP_MEMORY_TAGS 1 |
| 44 | #define CONFIG_INITRD_TAG 1 |
| 45 | |
Heiko Schocher | 8651ec6 | 2006-05-03 08:34:03 +0200 | [diff] [blame] | 46 | #define CONFIG_VERSION_VARIABLE 1 /* include version env variable */ |
| 47 | |
wdenk | e085e5b | 2005-04-05 23:32:21 +0000 | [diff] [blame] | 48 | /* |
| 49 | * Physical Memory Map |
| 50 | */ |
| 51 | #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ |
| 52 | #define PHYS_SDRAM_1 0x10000000 /* SDRAM Bank #1 */ |
Ladislav Michl | bf94821 | 2007-12-07 00:42:32 +0100 | [diff] [blame] | 53 | #define PHYS_SDRAM_1_SIZE (64 * 1024 * 1024) |
wdenk | e085e5b | 2005-04-05 23:32:21 +0000 | [diff] [blame] | 54 | |
| 55 | #define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */ |
wdenk | e085e5b | 2005-04-05 23:32:21 +0000 | [diff] [blame] | 56 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 57 | #define CONFIG_SYS_LOAD_ADDR PHYS_SDRAM_1 + 0x400000 /* default load address */ |
wdenk | e085e5b | 2005-04-05 23:32:21 +0000 | [diff] [blame] | 58 | |
| 59 | /* |
| 60 | * FLASH organization |
| 61 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 62 | #define CONFIG_SYS_FLASH_CFI /* Flash is CFI conformant */ |
Jean-Christophe PLAGNIOL-VILLARD | 8d94c23 | 2008-08-13 01:40:42 +0200 | [diff] [blame] | 63 | #define CONFIG_FLASH_CFI_DRIVER /* Use the common driver */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 64 | #define CONFIG_SYS_MAX_FLASH_BANKS 1 |
| 65 | #define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 |
wdenk | e085e5b | 2005-04-05 23:32:21 +0000 | [diff] [blame] | 66 | |
| 67 | /* FIXME: Does not work on AMD flash */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 68 | /* #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 */ /* use buffered writes (20x faster) */ |
| 69 | #define CONFIG_SYS_MAX_FLASH_SECT 512 /* max # of sectors on one chip */ |
wdenk | e085e5b | 2005-04-05 23:32:21 +0000 | [diff] [blame] | 70 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 71 | #define CONFIG_SYS_MONITOR_BASE PHYS_FLASH_1 |
| 72 | #define CONFIG_SYS_MONITOR_LEN (256 * 1024) |
wdenk | e085e5b | 2005-04-05 23:32:21 +0000 | [diff] [blame] | 73 | |
| 74 | /* |
| 75 | * Environment settings |
| 76 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 53db4cd | 2008-09-10 22:48:04 +0200 | [diff] [blame] | 77 | #define CONFIG_ENV_IS_IN_FLASH |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 78 | #define CONFIG_ENV_ADDR (PHYS_FLASH_1 + CONFIG_SYS_MONITOR_LEN) |
Jean-Christophe PLAGNIOL-VILLARD | 7e1cda6 | 2008-09-10 22:48:06 +0200 | [diff] [blame] | 79 | #define CONFIG_ENV_SIZE (8 * 1024) |
| 80 | #define CONFIG_ENV_SECT_SIZE (64 * 1024) |
| 81 | #define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE) |
| 82 | #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE |
wdenk | e085e5b | 2005-04-05 23:32:21 +0000 | [diff] [blame] | 83 | |
| 84 | #define CONFIG_ENV_OVERWRITE |
| 85 | |
wdenk | e085e5b | 2005-04-05 23:32:21 +0000 | [diff] [blame] | 86 | /* |
wdenk | 10164c6 | 2005-04-07 22:36:40 +0000 | [diff] [blame] | 87 | * Size of malloc() pool and stack |
wdenk | e085e5b | 2005-04-05 23:32:21 +0000 | [diff] [blame] | 88 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 89 | #define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */ |
| 90 | #define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024) |
Ladislav Michl | bf94821 | 2007-12-07 00:42:32 +0100 | [diff] [blame] | 91 | #define CONFIG_STACKSIZE (1 * 1024 * 1024) |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 92 | #define PHYS_SDRAM_1_RESERVED (CONFIG_SYS_MONITOR_LEN + CONFIG_SYS_MALLOC_LEN + CONFIG_STACKSIZE) |
wdenk | e085e5b | 2005-04-05 23:32:21 +0000 | [diff] [blame] | 93 | |
| 94 | /* |
wdenk | e085e5b | 2005-04-05 23:32:21 +0000 | [diff] [blame] | 95 | * Hardware drivers |
| 96 | */ |
Ben Warren | 0fd6aae | 2009-10-04 22:37:03 -0700 | [diff] [blame] | 97 | #define CONFIG_NET_MULTI |
| 98 | #define CONFIG_SMC91111 |
wdenk | e085e5b | 2005-04-05 23:32:21 +0000 | [diff] [blame] | 99 | #define CONFIG_SMC91111_BASE 0x08000300 |
| 100 | |
Ladislav Michl | bf94821 | 2007-12-07 00:42:32 +0100 | [diff] [blame] | 101 | #define CONFIG_HARD_I2C |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 102 | #define CONFIG_SYS_I2C_SPEED 100000 |
| 103 | #define CONFIG_SYS_I2C_SLAVE 1 |
Ladislav Michl | bf94821 | 2007-12-07 00:42:32 +0100 | [diff] [blame] | 104 | #define CONFIG_DRIVER_OMAP1510_I2C |
| 105 | |
| 106 | #define CONFIG_RTC_DS1307 |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 107 | #define CONFIG_SYS_I2C_RTC_ADDR 0x68 |
Ladislav Michl | bf94821 | 2007-12-07 00:42:32 +0100 | [diff] [blame] | 108 | |
wdenk | e085e5b | 2005-04-05 23:32:21 +0000 | [diff] [blame] | 109 | /* |
| 110 | * NS16550 Configuration |
| 111 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 112 | #define CONFIG_SYS_NS16550 |
| 113 | #define CONFIG_SYS_NS16550_SERIAL |
| 114 | #define CONFIG_SYS_NS16550_REG_SIZE (-4) |
| 115 | #define CONFIG_SYS_NS16550_CLK (CONFIG_XTAL_FREQ) /* can be 12M/32Khz or 48Mhz */ |
| 116 | #define CONFIG_SYS_NS16550_COM1 OMAP1510_UART1_BASE /* uart1 */ |
wdenk | e085e5b | 2005-04-05 23:32:21 +0000 | [diff] [blame] | 117 | |
| 118 | #define CONFIG_CONS_INDEX 1 |
| 119 | #define CONFIG_BAUDRATE 115200 |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 120 | #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } |
wdenk | e085e5b | 2005-04-05 23:32:21 +0000 | [diff] [blame] | 121 | |
Jon Loeliger | 03bfcb9 | 2007-07-04 22:33:46 -0500 | [diff] [blame] | 122 | |
| 123 | /* |
| 124 | * Command line configuration. |
| 125 | */ |
| 126 | #include <config_cmd_default.h> |
| 127 | |
| 128 | #define CONFIG_CMD_BDI |
Ladislav Michl | bf94821 | 2007-12-07 00:42:32 +0100 | [diff] [blame] | 129 | #define CONFIG_CMD_BOOTD |
| 130 | #define CONFIG_CMD_DHCP |
Mike Frysinger | 78dcaf4 | 2009-01-28 19:08:14 -0500 | [diff] [blame] | 131 | #define CONFIG_CMD_SAVEENV |
Jon Loeliger | 03bfcb9 | 2007-07-04 22:33:46 -0500 | [diff] [blame] | 132 | #define CONFIG_CMD_FLASH |
Ladislav Michl | bf94821 | 2007-12-07 00:42:32 +0100 | [diff] [blame] | 133 | #define CONFIG_CMD_IMI |
| 134 | #define CONFIG_CMD_JFFS2 |
| 135 | #define CONFIG_CMD_LOADB |
Jon Loeliger | 03bfcb9 | 2007-07-04 22:33:46 -0500 | [diff] [blame] | 136 | #define CONFIG_CMD_MEMORY |
| 137 | #define CONFIG_CMD_NET |
Jon Loeliger | 03bfcb9 | 2007-07-04 22:33:46 -0500 | [diff] [blame] | 138 | #define CONFIG_CMD_PING |
| 139 | #define CONFIG_CMD_RUN |
| 140 | |
Jon Loeliger | 03bfcb9 | 2007-07-04 22:33:46 -0500 | [diff] [blame] | 141 | |
Jon Loeliger | c6d535a | 2007-07-09 21:57:31 -0500 | [diff] [blame] | 142 | /* |
| 143 | * BOOTP options |
| 144 | */ |
| 145 | #define CONFIG_BOOTP_SUBNETMASK |
| 146 | #define CONFIG_BOOTP_GATEWAY |
| 147 | #define CONFIG_BOOTP_HOSTNAME |
| 148 | #define CONFIG_BOOTP_BOOTPATH |
| 149 | |
| 150 | |
wdenk | e085e5b | 2005-04-05 23:32:21 +0000 | [diff] [blame] | 151 | #define CONFIG_LOOPW |
| 152 | |
wdenk | e085e5b | 2005-04-05 23:32:21 +0000 | [diff] [blame] | 153 | #define CONFIG_BOOTDELAY 3 |
Ladislav Michl | bf94821 | 2007-12-07 00:42:32 +0100 | [diff] [blame] | 154 | #define CONFIG_ZERO_BOOTDELAY_CHECK /* allow to break in always */ |
| 155 | #undef CONFIG_BOOTARGS /* the boot command will set bootargs*/ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 156 | #define CONFIG_SYS_AUTOLOAD "n" /* No autoload */ |
wdenk | e085e5b | 2005-04-05 23:32:21 +0000 | [diff] [blame] | 157 | #define CONFIG_BOOTCOMMAND "run nboot" |
| 158 | #define CONFIG_PREBOOT "run setup" |
| 159 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
Heiko Schocher | 8651ec6 | 2006-05-03 08:34:03 +0200 | [diff] [blame] | 160 | "silent=1\0" \ |
wdenk | e085e5b | 2005-04-05 23:32:21 +0000 | [diff] [blame] | 161 | "ospart=0\0" \ |
Ladislav Michl | bf94821 | 2007-12-07 00:42:32 +0100 | [diff] [blame] | 162 | "bootfile=/boot/uImage\0" \ |
wdenk | e085e5b | 2005-04-05 23:32:21 +0000 | [diff] [blame] | 163 | "setpart=" \ |
Ladislav Michl | bf94821 | 2007-12-07 00:42:32 +0100 | [diff] [blame] | 164 | "if test -n $swapos; then " \ |
| 165 | "setenv swapos; saveenv; " \ |
| 166 | "if test $ospart -eq 0; then setenv ospart 1; else setenv ospart 0; fi; "\ |
wdenk | e085e5b | 2005-04-05 23:32:21 +0000 | [diff] [blame] | 167 | "fi\0" \ |
| 168 | "setup=setenv bootargs console=ttyS0,$baudrate " \ |
| 169 | "mtdparts=$mtdparts\0" \ |
Heiko Schocher | 8651ec6 | 2006-05-03 08:34:03 +0200 | [diff] [blame] | 170 | "nfsargs=setenv bootargs $bootargs " \ |
| 171 | "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname::off " \ |
| 172 | "nfsroot=$rootpath root=/dev/nfs\0" \ |
wdenk | 10164c6 | 2005-04-07 22:36:40 +0000 | [diff] [blame] | 173 | "flashargs=run setpart; setenv bootargs $bootargs " \ |
Ladislav Michl | bf94821 | 2007-12-07 00:42:32 +0100 | [diff] [blame] | 174 | "root=mtd:data$ospart ro " \ |
wdenk | 10164c6 | 2005-04-07 22:36:40 +0000 | [diff] [blame] | 175 | "rootfstype=jffs2\0" \ |
Heiko Schocher | 8651ec6 | 2006-05-03 08:34:03 +0200 | [diff] [blame] | 176 | "initrdargs=setenv bootargs $bootargs " \ |
| 177 | "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname::off\0" \ |
Ladislav Michl | bf94821 | 2007-12-07 00:42:32 +0100 | [diff] [blame] | 178 | "fboot=run flashargs; chpart data$ospart; fsload; bootm\0" \ |
| 179 | "mboot=bootp; run initrdargs; tftp; bootm\0" \ |
Heiko Schocher | 8651ec6 | 2006-05-03 08:34:03 +0200 | [diff] [blame] | 180 | "nboot=bootp; run nfsargs; tftp; bootm\0" |
wdenk | e085e5b | 2005-04-05 23:32:21 +0000 | [diff] [blame] | 181 | |
Heiko Schocher | 8651ec6 | 2006-05-03 08:34:03 +0200 | [diff] [blame] | 182 | #define CONFIG_SILENT_CONSOLE 1 /* enable silent startup */ |
| 183 | |
| 184 | #if 1 /* feel free to disable for development */ |
| 185 | #define CONFIG_AUTOBOOT_KEYED /* Enable password protection */ |
| 186 | #define CONFIG_AUTOBOOT_PROMPT "\nVoiceBlue Enterprise - booting...\n" |
| 187 | #define CONFIG_AUTOBOOT_DELAY_STR "." /* 1st "password" */ |
| 188 | #endif |
| 189 | |
| 190 | /* |
| 191 | * JFFS2 partitions (mtdparts command line support) |
| 192 | */ |
Stefan Roese | b1423dd | 2009-03-19 13:30:36 +0100 | [diff] [blame] | 193 | #define CONFIG_CMD_MTDPARTS |
Stefan Roese | 5dc958f | 2009-05-12 14:32:58 +0200 | [diff] [blame] | 194 | #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ |
| 195 | #define CONFIG_FLASH_CFI_MTD |
Heiko Schocher | 8651ec6 | 2006-05-03 08:34:03 +0200 | [diff] [blame] | 196 | #define MTDIDS_DEFAULT "nor0=omapflash.0" |
Ladislav Michl | bf94821 | 2007-12-07 00:42:32 +0100 | [diff] [blame] | 197 | #define MTDPARTS_DEFAULT "mtdparts=omapflash.0:256k(u-boot),64k(env),64k(r_env),16192k(data0),-(data1)" |
Heiko Schocher | 8651ec6 | 2006-05-03 08:34:03 +0200 | [diff] [blame] | 198 | |
wdenk | e085e5b | 2005-04-05 23:32:21 +0000 | [diff] [blame] | 199 | |
| 200 | /* |
| 201 | * Miscellaneous configurable options |
| 202 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 203 | #define CONFIG_SYS_HUSH_PARSER |
| 204 | #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " |
wdenk | e085e5b | 2005-04-05 23:32:21 +0000 | [diff] [blame] | 205 | #define CONFIG_AUTO_COMPLETE |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 206 | #define CONFIG_SYS_LONGHELP /* undef to save memory */ |
| 207 | #define CONFIG_SYS_PROMPT "# " /* Monitor Command Prompt */ |
| 208 | #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ |
| 209 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ |
| 210 | #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ |
| 211 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ |
wdenk | e085e5b | 2005-04-05 23:32:21 +0000 | [diff] [blame] | 212 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 213 | #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM_1 |
| 214 | #define CONFIG_SYS_MEMTEST_END PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE - PHYS_SDRAM_1_RESERVED |
wdenk | e085e5b | 2005-04-05 23:32:21 +0000 | [diff] [blame] | 215 | |
Ladislav Michl | a16482e | 2009-04-22 01:12:04 +0200 | [diff] [blame] | 216 | /* The 1510 has 3 timers, they can be driven by the RefClk (12MHz) or by DPLL1. |
wdenk | e085e5b | 2005-04-05 23:32:21 +0000 | [diff] [blame] | 217 | * This time is further subdivided by a local divisor. |
| 218 | */ |
Ladislav Michl | 993e57d | 2009-03-30 18:58:41 +0200 | [diff] [blame] | 219 | #define CONFIG_SYS_TIMERBASE OMAP1510_TIMER1_BASE |
| 220 | #define CONFIG_SYS_PTV 7 /* 2^(PTV+1), divide by 256 */ |
Ladislav Michl | a16482e | 2009-04-22 01:12:04 +0200 | [diff] [blame] | 221 | #define CONFIG_SYS_HZ 1000 |
wdenk | e085e5b | 2005-04-05 23:32:21 +0000 | [diff] [blame] | 222 | |
| 223 | #define OMAP5910_DPLL_DIV 1 |
| 224 | #define OMAP5910_DPLL_MUL ((CONFIG_SYS_CLK_FREQ * \ |
| 225 | (1 << OMAP5910_DPLL_DIV)) / CONFIG_XTAL_FREQ) |
| 226 | |
| 227 | #define OMAP5910_ARM_PER_DIV 2 /* CKL/4 */ |
| 228 | #define OMAP5910_LCD_DIV 2 /* CKL/4 */ |
| 229 | #define OMAP5910_ARM_DIV 0 /* CKL/1 */ |
| 230 | #define OMAP5910_DSP_DIV 0 /* CKL/1 */ |
| 231 | #define OMAP5910_TC_DIV 1 /* CKL/2 */ |
| 232 | #define OMAP5910_DSP_MMU_DIV 1 /* CKL/2 */ |
| 233 | #define OMAP5910_ARM_TIM_SEL 1 /* CKL used for MPU timers */ |
| 234 | |
| 235 | #define OMAP5910_ARM_EN_CLK 0x03d6 /* 0000 0011 1101 0110b Clock Enable */ |
| 236 | #define OMAP5910_ARM_CKCTL ((OMAP5910_ARM_PER_DIV) | \ |
| 237 | (OMAP5910_LCD_DIV << 2) | \ |
| 238 | (OMAP5910_ARM_DIV << 4) | \ |
| 239 | (OMAP5910_DSP_DIV << 6) | \ |
| 240 | (OMAP5910_TC_DIV << 8) | \ |
| 241 | (OMAP5910_DSP_MMU_DIV << 10) | \ |
| 242 | (OMAP5910_ARM_TIM_SEL << 12)) |
| 243 | |
| 244 | #define VOICEBLUE_LED_REG 0x04030000 |
| 245 | |
wdenk | e085e5b | 2005-04-05 23:32:21 +0000 | [diff] [blame] | 246 | #endif /* __CONFIG_H */ |