Sascha Hauer | a5864c0 | 2008-03-26 20:41:17 +0100 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2004 |
| 3 | * Texas Instruments. |
| 4 | * Richard Woodruff <r-woodruff2@ti.com> |
| 5 | * Kshitij Gupta <kshitij@ti.com> |
| 6 | * |
Magnus Lilja | 69e8458 | 2008-04-15 19:09:10 +0200 | [diff] [blame] | 7 | * Configuration settings for the phyCORE-i.MX31 board. |
Sascha Hauer | a5864c0 | 2008-03-26 20:41:17 +0100 | [diff] [blame] | 8 | * |
| 9 | * See file CREDITS for list of people who contributed to this |
| 10 | * project. |
| 11 | * |
| 12 | * This program is free software; you can redistribute it and/or |
| 13 | * modify it under the terms of the GNU General Public License as |
| 14 | * published by the Free Software Foundation; either version 2 of |
| 15 | * the License, or (at your option) any later version. |
| 16 | * |
| 17 | * This program is distributed in the hope that it will be useful, |
| 18 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 19 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 20 | * GNU General Public License for more details. |
| 21 | * |
| 22 | * You should have received a copy of the GNU General Public License |
| 23 | * along with this program; if not, write to the Free Software |
| 24 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 25 | * MA 02111-1307 USA |
| 26 | */ |
| 27 | |
| 28 | #ifndef __CONFIG_H |
| 29 | #define __CONFIG_H |
| 30 | |
| 31 | /* High Level Configuration Options */ |
| 32 | #define CONFIG_ARM1136 1 /* This is an arm1136 CPU core */ |
| 33 | #define CONFIG_MX31 1 /* in a mx31 */ |
| 34 | #define CONFIG_MX31_HCLK_FREQ 26000000 |
| 35 | #define CONFIG_MX31_CLK32 32000 |
| 36 | |
| 37 | #define CONFIG_DISPLAY_CPUINFO |
| 38 | #define CONFIG_DISPLAY_BOARDINFO |
| 39 | |
| 40 | /* Temporarily disabled */ |
| 41 | #if 0 |
| 42 | #define CONFIG_OF_LIBFDT 1 |
| 43 | #define CONFIG_FIT 1 |
| 44 | #define CONFIG_FIT_VERBOSE 1 |
| 45 | #endif |
| 46 | |
| 47 | #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ |
| 48 | #define CONFIG_SETUP_MEMORY_TAGS 1 |
| 49 | #define CONFIG_INITRD_TAG 1 |
| 50 | |
| 51 | /* |
| 52 | * Size of malloc() pool |
| 53 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 54 | #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128 * 1024) |
| 55 | #define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */ |
Sascha Hauer | a5864c0 | 2008-03-26 20:41:17 +0100 | [diff] [blame] | 56 | |
| 57 | /* |
| 58 | * Hardware drivers |
| 59 | */ |
| 60 | |
| 61 | #define CONFIG_HARD_I2C 1 |
| 62 | #define CONFIG_I2C_MXC 1 |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 63 | #define CONFIG_SYS_I2C_MX31_PORT2 1 |
| 64 | #define CONFIG_SYS_I2C_SPEED 100000 |
| 65 | #define CONFIG_SYS_I2C_SLAVE 0xfe |
Sascha Hauer | a5864c0 | 2008-03-26 20:41:17 +0100 | [diff] [blame] | 66 | |
Ilya Yanok | 7bfca97 | 2009-06-08 04:12:46 +0400 | [diff] [blame] | 67 | #define CONFIG_MXC_UART 1 |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 68 | #define CONFIG_SYS_MX31_UART1 1 |
Sascha Hauer | a5864c0 | 2008-03-26 20:41:17 +0100 | [diff] [blame] | 69 | |
| 70 | /* allow to overwrite serial and ethaddr */ |
| 71 | #define CONFIG_ENV_OVERWRITE |
| 72 | #define CONFIG_CONS_INDEX 1 |
| 73 | #define CONFIG_BAUDRATE 115200 |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 74 | #define CONFIG_SYS_BAUDRATE_TABLE {9600, 19200, 38400, 57600, 115200} |
Sascha Hauer | a5864c0 | 2008-03-26 20:41:17 +0100 | [diff] [blame] | 75 | |
| 76 | /*********************************************************** |
| 77 | * Command definition |
| 78 | ***********************************************************/ |
| 79 | |
| 80 | #include <config_cmd_default.h> |
| 81 | |
| 82 | #define CONFIG_CMD_PING |
| 83 | #define CONFIG_CMD_EEPROM |
| 84 | #define CONFIG_CMD_I2C |
| 85 | |
| 86 | #define CONFIG_BOOTDELAY 3 |
| 87 | |
| 88 | #define MTDPARTS_DEFAULT "mtdparts=physmap-flash.0:128k(uboot)ro,1536k(kernel),-(root)" |
| 89 | |
| 90 | #define CONFIG_NETMASK 255.255.255.0 |
| 91 | #define CONFIG_IPADDR 192.168.23.168 |
| 92 | #define CONFIG_SERVERIP 192.168.23.2 |
| 93 | |
| 94 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
| 95 | "bootargs_base=setenv bootargs console=ttySMX0,115200\0" \ |
| 96 | "bootargs_nfs=setenv bootargs $(bootargs) root=/dev/nfs ip=dhcp nfsroot=$(serverip):$(nfsrootfs),v3,tcp\0" \ |
| 97 | "bootargs_flash=setenv bootargs $(bootargs) root=/dev/mtdblock2 rootfstype=jffs2" \ |
| 98 | "bootargs_mtd=setenv bootargs $(bootargs) $(mtdparts)" \ |
| 99 | "bootcmd=run bootcmd_net\0" \ |
| 100 | "bootcmd_net=run bootargs_base bootargs_mtd bootargs_nfs; tftpboot 0x80000000 $(uimage); bootm\0" \ |
| 101 | "bootcmd_flash=run bootargs_base bootargs_mtd bootargs_flash; bootm 0x80000000\0" \ |
| 102 | "unlock=yes\0" \ |
| 103 | "mtdparts=" MTDPARTS_DEFAULT "\0" \ |
| 104 | "prg_uboot=tftpboot 0x80000000 $(uboot); protect off 0xa0000000 +0x20000; erase 0xa0000000 +0x20000; cp.b 0x80000000 0xa0000000 $(filesize)\0" \ |
| 105 | "prg_kernel=tftpboot 0x80000000 $(uimage); erase 0xa0040000 +0x180000; cp.b 0x80000000 0xa0040000 $(filesize)\0" \ |
| 106 | "prg_jffs2=tftpboot 0x80000000 $(jffs2); erase 0xa01c0000 0xa1ffffff; cp.b 0x80000000 0xa01c0000 $(filesize)\0" |
| 107 | |
| 108 | |
Ben Warren | fbfdd3a | 2009-07-20 22:01:11 -0700 | [diff] [blame] | 109 | #define CONFIG_NET_MULTI |
| 110 | #define CONFIG_SMC911X 1 |
| 111 | #define CONFIG_SMC911X_BASE 0xa8000000 |
| 112 | #define CONFIG_SMC911X_32_BIT 1 |
Sascha Hauer | a5864c0 | 2008-03-26 20:41:17 +0100 | [diff] [blame] | 113 | |
| 114 | /* |
| 115 | * Miscellaneous configurable options |
| 116 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 117 | #define CONFIG_SYS_LONGHELP /* undef to save memory */ |
| 118 | #define CONFIG_SYS_PROMPT "uboot> " |
| 119 | #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ |
Sascha Hauer | a5864c0 | 2008-03-26 20:41:17 +0100 | [diff] [blame] | 120 | /* Print Buffer Size */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 121 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) |
| 122 | #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ |
| 123 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ |
Sascha Hauer | a5864c0 | 2008-03-26 20:41:17 +0100 | [diff] [blame] | 124 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 125 | #define CONFIG_SYS_MEMTEST_START 0 /* memtest works on */ |
| 126 | #define CONFIG_SYS_MEMTEST_END 0x10000 |
Sascha Hauer | a5864c0 | 2008-03-26 20:41:17 +0100 | [diff] [blame] | 127 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 128 | #define CONFIG_SYS_LOAD_ADDR 0 /* default load address */ |
Sascha Hauer | a5864c0 | 2008-03-26 20:41:17 +0100 | [diff] [blame] | 129 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 130 | #define CONFIG_SYS_HZ 1000 |
Sascha Hauer | a5864c0 | 2008-03-26 20:41:17 +0100 | [diff] [blame] | 131 | |
| 132 | #define CONFIG_CMDLINE_EDITING 1 |
| 133 | |
| 134 | /*----------------------------------------------------------------------- |
| 135 | * Stack sizes |
| 136 | * |
| 137 | * The stack sizes are set up in start.S using the settings below |
| 138 | */ |
| 139 | #define CONFIG_STACKSIZE (128 * 1024) /* regular stack */ |
| 140 | |
| 141 | /*----------------------------------------------------------------------- |
| 142 | * Physical Memory Map |
| 143 | */ |
| 144 | #define CONFIG_NR_DRAM_BANKS 1 |
| 145 | #define PHYS_SDRAM_1 0x80000000 |
| 146 | #define PHYS_SDRAM_1_SIZE (128 * 1024 * 1024) |
| 147 | |
| 148 | /*----------------------------------------------------------------------- |
| 149 | * FLASH and environment organization |
| 150 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 151 | #define CONFIG_SYS_FLASH_BASE 0xa0000000 |
| 152 | #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ |
| 153 | #define CONFIG_SYS_MAX_FLASH_SECT 259 /* max number of sectors on one chip */ |
| 154 | #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE /* Monitor at beginning of flash */ |
Sascha Hauer | a5864c0 | 2008-03-26 20:41:17 +0100 | [diff] [blame] | 155 | |
Jean-Christophe PLAGNIOL-VILLARD | e46af64 | 2008-09-05 09:19:30 +0200 | [diff] [blame] | 156 | #define CONFIG_ENV_IS_IN_EEPROM 1 |
Jean-Christophe PLAGNIOL-VILLARD | 7e1cda6 | 2008-09-10 22:48:06 +0200 | [diff] [blame] | 157 | #define CONFIG_ENV_OFFSET 0x00 /* environment starts here */ |
| 158 | #define CONFIG_ENV_SIZE 4096 |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 159 | #define CONFIG_SYS_I2C_EEPROM_ADDR 0x52 |
| 160 | #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 5 /* 5 bits = 32 octets */ |
| 161 | #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 /* between stop and start */ |
| 162 | #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 /* length of byte address */ |
Sascha Hauer | a5864c0 | 2008-03-26 20:41:17 +0100 | [diff] [blame] | 163 | |
| 164 | /*----------------------------------------------------------------------- |
| 165 | * CFI FLASH driver setup |
| 166 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 167 | #define CONFIG_SYS_FLASH_CFI 1 /* Flash memory is CFI compliant */ |
Jean-Christophe PLAGNIOL-VILLARD | 8d94c23 | 2008-08-13 01:40:42 +0200 | [diff] [blame] | 168 | #define CONFIG_FLASH_CFI_DRIVER 1 /* Use drivers/cfi_flash.c */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 169 | #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 /* Use buffered writes (~10x faster) */ |
| 170 | #define CONFIG_SYS_FLASH_PROTECTION 1 /* Use hardware sector protection */ |
Sascha Hauer | a5864c0 | 2008-03-26 20:41:17 +0100 | [diff] [blame] | 171 | |
| 172 | /* timeout values are in ticks */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 173 | #define CONFIG_SYS_FLASH_ERASE_TOUT (100*CONFIG_SYS_HZ) /* Timeout for Flash Erase */ |
| 174 | #define CONFIG_SYS_FLASH_WRITE_TOUT (100*CONFIG_SYS_HZ) /* Timeout for Flash Write */ |
Sascha Hauer | a5864c0 | 2008-03-26 20:41:17 +0100 | [diff] [blame] | 175 | |
| 176 | /* |
| 177 | * JFFS2 partitions |
| 178 | */ |
Stefan Roese | b1423dd | 2009-03-19 13:30:36 +0100 | [diff] [blame] | 179 | #undef CONFIG_CMD_MTDPARTS |
Sascha Hauer | a5864c0 | 2008-03-26 20:41:17 +0100 | [diff] [blame] | 180 | #define CONFIG_JFFS2_DEV "nor0" |
| 181 | |
Guennadi Liakhovetski | e99f10a | 2009-02-24 10:44:02 +0100 | [diff] [blame] | 182 | /* EET platform additions */ |
| 183 | #ifdef CONFIG_IMX31_PHYCORE_EET |
| 184 | #define BOARD_LATE_INIT |
| 185 | |
| 186 | #define CONFIG_MX31_GPIO 1 |
| 187 | |
| 188 | #define CONFIG_HARD_SPI 1 |
| 189 | #define CONFIG_MXC_SPI 1 |
| 190 | #define CONFIG_CMD_SPI |
| 191 | |
| 192 | #define CONFIG_S6E63D6 1 |
| 193 | |
| 194 | #define CONFIG_LCD 1 |
| 195 | #define CONFIG_VIDEO_MX3 1 |
| 196 | #define CONFIG_SYS_WHITE_ON_BLACK 1 |
| 197 | #define LCD_BPP LCD_COLOR8 |
| 198 | #define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE 1 |
| 199 | #define CONFIG_SYS_CONSOLE_IS_IN_ENV 1 |
| 200 | |
| 201 | #define CONFIG_SPLASH_SCREEN 1 |
| 202 | #define CONFIG_CMD_BMP 1 |
| 203 | #endif |
| 204 | |
Sascha Hauer | a5864c0 | 2008-03-26 20:41:17 +0100 | [diff] [blame] | 205 | #endif /* __CONFIG_H */ |