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git01.mediatek.com / filogic / uboot / 91b6ca656aa5787d3d243e535cc0a0359f541e3a / . / board / freescale / t104xrdb / eth.c
blob: 5eca9386f6eb38c41e06713d84dd00341e2c300b [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -0400[diff] [blame]1// SPDX-License-Identifier: GPL-2.0+
Priyanka Jain29b426b2014-01-30 11:30:04 +0530[diff] [blame]2/*
3 * Copyright 2014 Freescale Semiconductor, Inc.
Priyanka Jain29b426b2014-01-30 11:30:04 +0530[diff] [blame]4 */
5
6#include <common.h>
Simon Glass274e0b02020-05-10 11:39:56 -0600[diff] [blame]7#include <net.h>
Priyanka Jain29b426b2014-01-30 11:30:04 +0530[diff] [blame]8#include <netdev.h>
Codrin Ciubotariub29e5e22015-01-21 11:54:12 +0200[diff] [blame]9#include <asm/fsl_serdes.h>
Priyanka Jain29b426b2014-01-30 11:30:04 +0530[diff] [blame]10#include <asm/immap_85xx.h>
11#include <fm_eth.h>
12#include <fsl_mdio.h>
13#include <malloc.h>
Shaohui Xie513eaf22015-10-26 19:47:47 +0800[diff] [blame]14#include <fsl_dtsec.h>
Codrin Ciubotariub29e5e22015-01-21 11:54:12 +0200[diff] [blame]15#include <vsc9953.h>
Priyanka Jain29b426b2014-01-30 11:30:04 +0530[diff] [blame]16
17#include "../common/fman.h"
18
Masahiro Yamadaf7ed78b2020-06-26 15:13:33 +0900[diff] [blame]19int board_eth_init(struct bd_info *bis)
Priyanka Jain29b426b2014-01-30 11:30:04 +0530[diff] [blame]20{
21#ifdef CONFIG_FMAN_ENET
22 struct memac_mdio_info memac_mdio_info;
23 unsigned int i;
24 int phy_addr = 0;
Codrin Ciubotariub29e5e22015-01-21 11:54:12 +0200[diff] [blame]25
Priyanka Jain29b426b2014-01-30 11:30:04 +0530[diff] [blame]26 printf("Initializing Fman\n");
27
28 memac_mdio_info.regs =
Tom Rini364d0022023-01-10 11:19:45 -0500[diff] [blame]29 (struct memac_mdio_controller *)CFG_SYS_FM1_DTSEC_MDIO_ADDR;
Priyanka Jain29b426b2014-01-30 11:30:04 +0530[diff] [blame]30 memac_mdio_info.name = DEFAULT_FM_MDIO_NAME;
31
32 /* Register the real 1G MDIO bus */
33 fm_memac_mdio_init(bis, &memac_mdio_info);
34
35 /*
36 * Program on board RGMII, SGMII PHY addresses.
37 */
Tom Rini0a2bac72022-11-16 13:10:29 -0500[diff] [blame]38 for (i = FM1_DTSEC1; i < FM1_DTSEC1 + CFG_SYS_NUM_FM1_DTSEC; i++) {
Priyanka Jain29b426b2014-01-30 11:30:04 +0530[diff] [blame]39 int idx = i - FM1_DTSEC1;
40
41 switch (fm_info_get_enet_if(i)) {
York Sund08610d2016-11-21 11:04:34 -0800[diff] [blame]42#ifdef CONFIG_TARGET_T1042D4RDB
Priyanka Jaine7597fe2015-06-05 15:29:02 +0530[diff] [blame]43 case PHY_INTERFACE_MODE_SGMII:
44 /* T1042D4RDB supports SGMII on DTSEC1, DTSEC2
45 * & DTSEC3
46 */
47 if (FM1_DTSEC1 == i)
Tom Rini6a5dccc2022-11-16 13:10:41 -0500[diff] [blame]48 phy_addr = CFG_SYS_SGMII1_PHY_ADDR;
Priyanka Jaine7597fe2015-06-05 15:29:02 +0530[diff] [blame]49 if (FM1_DTSEC2 == i)
Tom Rini6a5dccc2022-11-16 13:10:41 -0500[diff] [blame]50 phy_addr = CFG_SYS_SGMII2_PHY_ADDR;
Priyanka Jaine7597fe2015-06-05 15:29:02 +0530[diff] [blame]51 if (FM1_DTSEC3 == i)
Tom Rini6a5dccc2022-11-16 13:10:41 -0500[diff] [blame]52 phy_addr = CFG_SYS_SGMII3_PHY_ADDR;
Priyanka Jaine7597fe2015-06-05 15:29:02 +0530[diff] [blame]53 fm_info_set_phy_address(i, phy_addr);
54 break;
55#endif
Priyanka Jain29b426b2014-01-30 11:30:04 +0530[diff] [blame]56 case PHY_INTERFACE_MODE_RGMII:
Madalin Bucur03b80152020-11-04 15:09:17 +0200[diff] [blame]57 case PHY_INTERFACE_MODE_RGMII_TXID:
58 case PHY_INTERFACE_MODE_RGMII_RXID:
59 case PHY_INTERFACE_MODE_RGMII_ID:
Priyanka Jain29b426b2014-01-30 11:30:04 +0530[diff] [blame]60 if (FM1_DTSEC4 == i)
Tom Rini6a5dccc2022-11-16 13:10:41 -0500[diff] [blame]61 phy_addr = CFG_SYS_RGMII1_PHY_ADDR;
Priyanka Jain29b426b2014-01-30 11:30:04 +0530[diff] [blame]62 if (FM1_DTSEC5 == i)
Tom Rini6a5dccc2022-11-16 13:10:41 -0500[diff] [blame]63 phy_addr = CFG_SYS_RGMII2_PHY_ADDR;
Priyanka Jain29b426b2014-01-30 11:30:04 +0530[diff] [blame]64 fm_info_set_phy_address(i, phy_addr);
65 break;
66 case PHY_INTERFACE_MODE_QSGMII:
67 fm_info_set_phy_address(i, 0);
68 break;
Marek Behún48631e42022-04-07 00:33:03 +0200[diff] [blame]69 case PHY_INTERFACE_MODE_NA:
Priyanka Jain29b426b2014-01-30 11:30:04 +0530[diff] [blame]70 fm_info_set_phy_address(i, 0);
71 break;
72 default:
73 printf("Fman1: DTSEC%u set to unknown interface %i\n",
74 idx + 1, fm_info_get_enet_if(i));
75 fm_info_set_phy_address(i, 0);
76 break;
77 }
Codrin Ciubotariu3df7b7a2015-01-12 14:08:37 +0200[diff] [blame]78 if (fm_info_get_enet_if(i) == PHY_INTERFACE_MODE_QSGMII ||
Marek Behún48631e42022-04-07 00:33:03 +0200[diff] [blame]79 fm_info_get_enet_if(i) == PHY_INTERFACE_MODE_NA)
Codrin Ciubotariu3df7b7a2015-01-12 14:08:37 +0200[diff] [blame]80 fm_info_set_mdio(i, NULL);
81 else
82 fm_info_set_mdio(i,
83 miiphy_get_dev_by_name(
84 DEFAULT_FM_MDIO_NAME));
Priyanka Jain29b426b2014-01-30 11:30:04 +0530[diff] [blame]85 }
86
Codrin Ciubotariub29e5e22015-01-21 11:54:12 +0200[diff] [blame]87
Priyanka Jain29b426b2014-01-30 11:30:04 +0530[diff] [blame]88 cpu_eth_init(bis);
89#endif
90
91 return pci_eth_init(bis);
92}