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Hannes Petermaierfb003662014-02-07 08:07:36 +01001/*
2 * bur_am335x_common.h
3 *
4 * common parts used by B&R AM335x based boards
5 *
6 * Copyright (C) 2013 Hannes Petermaier <oe5hpm@oevsv.at> -
7 * Bernecker & Rainer Industrieelektronik GmbH - http://www.br-automation.com
8 *
9 * SPDX-License-Identifier: GPL-2.0+
10 */
11
12#ifndef __BUR_AM335X_COMMON_H__
13#define __BUR_AM335X_COMMON_H__
14/* ------------------------------------------------------------------------- */
Hannes Petermaier918d97b2015-02-03 13:22:34 +010015#define BUR_COMMON_ENV \
16"defaultip=192.168.60.253\0" \
17"defaultsip=192.168.60.254\0" \
18"netconsole=echo switching to network console ...; " \
19"if dhcp; then " \
20"setenv ncip ${serverip}; else " \
21"setenv ncip 192.168.60.254; " \
22"setenv serverip 192.168.60.254; " \
23"setenv gatewayip 192.168.60.254; " \
24"setenv ipaddr 192.168.60.1; " \
25"fi;" \
26"setenv netdisplay0 '" \
27"setcurs 1 9; puts myip; setcurs 10 9; puts ${ipaddr};" \
28"setcurs 1 10;puts serverip; setcurs 10 10; puts ${serverip}\;'" \
29"run netdisplay0; " \
30"setenv stdout nc;setenv stdin nc;setenv stderr nc\0"
31
Hannes Petermaier27fbcd42014-06-04 10:22:07 +020032#define CONFIG_SYS_GENERIC_BOARD
33
Hannes Petermaierfb003662014-02-07 08:07:36 +010034#define CONFIG_AM33XX
35#define CONFIG_OMAP
36#define CONFIG_OMAP_COMMON
37#define CONFIG_BOARD_LATE_INIT
38#define CONFIG_SYS_CACHELINE_SIZE 64
39#define CONFIG_MAX_RAM_BANK_SIZE (1024 << 20) /* 1GB */
40
41/* Timer information */
42#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
43#define CONFIG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */
Hannes Petermaier8924b942014-03-27 10:37:36 +010044#define CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC /* enable 32kHz OSC at bootime */
Hannes Petermaierfb003662014-02-07 08:07:36 +010045#define CONFIG_SPL_POWER_SUPPORT
46#define CONFIG_POWER_TPS65217
47
48#define CONFIG_SYS_NO_FLASH /* have no NOR-flash */
49
50#include <asm/arch/omap.h>
51
52/* NS16550 Configuration */
53#define CONFIG_SYS_NS16550
54#define CONFIG_SYS_NS16550_SERIAL
55#define CONFIG_SYS_NS16550_REG_SIZE (-4)
56#define CONFIG_SYS_NS16550_CLK 48000000
57#define CONFIG_SYS_NS16550_COM1 0x44e09000 /* UART0 */
58#define CONFIG_BAUDRATE 115200
59
60/* Network defines */
61#define CONFIG_CMD_NET /* 'bootp' and 'tftp' */
62#define CONFIG_CMD_DHCP
63#define CONFIG_BOOTP_DNS /* Configurable parts of CMD_DHCP */
64#define CONFIG_BOOTP_SEND_HOSTNAME
65#define CONFIG_BOOTP_GATEWAY
66#define CONFIG_BOOTP_SUBNETMASK
Hannes Petermaier918d97b2015-02-03 13:22:34 +010067#define CONFIG_NET_RETRY_COUNT 2
Hannes Petermaierfb003662014-02-07 08:07:36 +010068#define CONFIG_CMD_PING
69#define CONFIG_DRIVER_TI_CPSW /* Driver for IP block */
70#define CONFIG_MII /* Required in net/eth.c */
71#define CONFIG_SPL_ETH_SUPPORT
72#define CONFIG_PHYLIB
Hannes Petermaierfb003662014-02-07 08:07:36 +010073#define CONFIG_PHY_NATSEMI
74#define CONFIG_SPL_NET_SUPPORT
75#define CONFIG_SPL_ENV_SUPPORT /* used for a fetching MAC-Address */
76#define CONFIG_SPL_NET_VCI_STRING "AM335x U-Boot SPL"
Hannes Petermaier918d97b2015-02-03 13:22:34 +010077/* Network console */
78#define CONFIG_NETCONSOLE 1
79#define CONFIG_BOOTP_MAY_FAIL /* if we don't have DHCP environment */
Hannes Petermaierfb003662014-02-07 08:07:36 +010080/*
81 * SPL related defines. The Public RAM memory map the ROM defines the
82 * area between 0x402F0400 and 0x4030B800 as a download area and
83 * 0x4030B800 to 0x4030CE00 as a public stack area. The ROM also
84 * supports X-MODEM loading via UART, and we leverage this and then use
85 * Y-MODEM to load u-boot.img, when booted over UART.
86 */
87#define CONFIG_SPL_TEXT_BASE 0x402F0400
88#define CONFIG_SPL_MAX_SIZE (0x4030B800 - CONFIG_SPL_TEXT_BASE)
89
90/*
91 * Since SPL did pll and ddr initialization for us,
92 * we don't need to do it twice.
93 */
94#if !defined(CONFIG_SPL_BUILD) && !defined(CONFIG_NOR_BOOT)
95#define CONFIG_SKIP_LOWLEVEL_INIT
96#endif /* !CONFIG_SPL_BUILD, ... */
97/*
98 * Our DDR memory always starts at 0x80000000 and U-Boot shall have
99 * relocated itself to higher in memory by the time this value is used.
100 */
101#define CONFIG_SYS_LOAD_ADDR 0x80000000
102/*
103 * ----------------------------------------------------------------------------
104 * DDR information. We say (for simplicity) that we have 1 bank,
105 * always, even when we have more. We always start at 0x80000000,
106 * and we place the initial stack pointer in our SRAM.
107 */
108#define CONFIG_NR_DRAM_BANKS 1
109#define CONFIG_SYS_SDRAM_BASE 0x80000000
110#define CONFIG_SYS_INIT_SP_ADDR (NON_SECURE_SRAM_END - \
111 GENERATED_GBL_DATA_SIZE)
112
113/* I2C */
114#define CONFIG_SYS_I2C
115#define CONFIG_SYS_OMAP24_I2C_SPEED 100000
116#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
117#define CONFIG_SYS_I2C_OMAP24XX
Hannes Petermaierdd1c61e2014-06-04 10:28:39 +0200118#define CONFIG_CMD_I2C
Hannes Petermaierfb003662014-02-07 08:07:36 +0100119/* GPIO */
120#define CONFIG_OMAP_GPIO
121#define CONFIG_CMD_GPIO
122/*
123 * ----------------------------------------------------------------------------
124 * The following are general good-enough settings for U-Boot. We set a
125 * large malloc pool as we generally have a lot of DDR, and we opt for
126 * function over binary size in the main portion of U-Boot as this is
127 * generally easily constrained later if needed. We enable the config
128 * options that give us information in the environment about what board
129 * we are on so we do not need to rely on the command prompt. We set a
130 * console baudrate of 115200 and use the default baud rate table.
131 */
132#define CONFIG_SYS_MALLOC_LEN (1024 << 10)
133#define CONFIG_SYS_HUSH_PARSER
134#define CONFIG_SYS_PROMPT "U-Boot (BuR V2.0)# "
135#define CONFIG_SYS_CONSOLE_INFO_QUIET
136#define CONFIG_ENV_OVERWRITE /* Overwrite ethaddr / serial# */
137
138/* As stated above, the following choices are optional. */
139#define CONFIG_SYS_LONGHELP
140#define CONFIG_AUTO_COMPLETE
141#define CONFIG_CMDLINE_EDITING
142#define CONFIG_VERSION_VARIABLE
143
144/* We set the max number of command args high to avoid HUSH bugs. */
145#define CONFIG_SYS_MAXARGS 64
146
147/* Console I/O Buffer Size */
148#define CONFIG_SYS_CBSIZE 512
149/* Print Buffer Size */
150#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE +\
151 sizeof(CONFIG_SYS_PROMPT) + 16)
152/* Boot Argument Buffer Size */
153#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
154/*
155 * For commands to use, we take the default list and add a few other
156 * useful commands. Note that we must have set CONFIG_SYS_NO_FLASH
157 * prior to this include, in order to skip a few commands. When we do
158 * have flash, if we expect these commands they must be enabled in that
159 * config. If desired, a specific list of desired commands can be used
160 * instead.
161 */
162#include <config_cmd_default.h>
163/* undefine commands, which we do not need */
164#undef CONFIG_CMD_EDITENV
165#undef CONFIG_CMD_FPGA
166#undef CONFIG_CMD_IMI
167#undef CONFIG_CMD_ITEST
168#undef CONFIG_CMD_LOADS
169#undef CONFIG_CMD_LOADB
170#undef CONFIG_CMD_NFS
171#undef CONFIG_CMD_SETGETDCR
172#undef CONFIG_CMD_XIMG
Hannes Petermaierfb003662014-02-07 08:07:36 +0100173/* define command we need always */
174#define CONFIG_CMD_ECHO
175#define CONFIG_CMD_SOURCE
176
177/*
178 * Our platforms make use of SPL to initalize the hardware (primarily
179 * memory) enough for full U-Boot to be loaded. We also support Falcon
180 * Mode so that the Linux kernel can be booted directly from SPL
181 * instead, if desired. We make use of the general SPL framework found
182 * under common/spl/. Given our generally common memory map, we set a
183 * number of related defaults and sizes here.
184 */
Hannes Petermaierfb003662014-02-07 08:07:36 +0100185#define CONFIG_SPL_FRAMEWORK
186/*
187 * Place the image at the start of the ROM defined image space.
188 * We limit our size to the ROM-defined downloaded image area, and use the
189 * rest of the space for stack. We load U-Boot itself into memory at
190 * 0x80800000 for legacy reasons (to not conflict with older SPLs). We
191 * have our BSS be placed 1MiB after this, to allow for the default
192 * Linux kernel address of 0x80008000 to work, in the Falcon Mode case.
193 * We have the SPL malloc pool at the end of the BSS area.
194 *
195 * ----------------------------------------------------------------------------
196 */
Hannes Petermaierfb003662014-02-07 08:07:36 +0100197#undef CONFIG_SYS_TEXT_BASE
198#define CONFIG_SYS_TEXT_BASE 0x80800000
199#define CONFIG_SPL_BSS_START_ADDR 0x80A00000
200#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */
201#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \
202 CONFIG_SPL_BSS_MAX_SIZE)
203#define CONFIG_SYS_SPL_MALLOC_SIZE CONFIG_SYS_MALLOC_LEN
204
205/* General parts of the framework, required. */
206#define CONFIG_SPL_I2C_SUPPORT
207#define CONFIG_SPL_LIBCOMMON_SUPPORT
208#define CONFIG_SPL_LIBGENERIC_SUPPORT
209#define CONFIG_SPL_SERIAL_SUPPORT
210#define CONFIG_SPL_BOARD_INIT
211#define CONFIG_SPL_YMODEM_SUPPORT
212#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/am33xx/u-boot-spl.lds"
213
214#endif /* ! __BUR_AM335X_COMMON_H__ */