blob: 28b945669afe982ef2beceb22dc785f756d9efbc [file] [log] [blame]
Wolfgang Denk64702552006-10-24 14:27:35 +02001/*
2 * Copyright (C) 2004-2006 Atmel Corporation
3 *
4 * See file CREDITS for list of people who contributed to this
5 * project.
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; either version 2 of
10 * the License, or (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
20 * MA 02111-1307 USA
21 */
22
23#include <common.h>
24
Olav Morkencbc6ce02009-01-23 12:56:27 +010025#include <asm/arch/cacheflush.h>
Wolfgang Denk64702552006-10-24 14:27:35 +020026
27void dcache_clean_range(volatile void *start, size_t size)
28{
29 unsigned long v, begin, end, linesz;
30
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020031 linesz = CONFIG_SYS_DCACHE_LINESZ;
Wolfgang Denk64702552006-10-24 14:27:35 +020032
33 /* You asked for it, you got it */
34 begin = (unsigned long)start & ~(linesz - 1);
35 end = ((unsigned long)start + size + linesz - 1) & ~(linesz - 1);
36
37 for (v = begin; v < end; v += linesz)
38 dcache_clean_line((void *)v);
39
40 sync_write_buffer();
41}
42
43void dcache_invalidate_range(volatile void *start, size_t size)
44{
45 unsigned long v, begin, end, linesz;
46
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020047 linesz = CONFIG_SYS_DCACHE_LINESZ;
Wolfgang Denk64702552006-10-24 14:27:35 +020048
49 /* You asked for it, you got it */
50 begin = (unsigned long)start & ~(linesz - 1);
51 end = ((unsigned long)start + size + linesz - 1) & ~(linesz - 1);
52
53 for (v = begin; v < end; v += linesz)
54 dcache_invalidate_line((void *)v);
55}
56
57void dcache_flush_range(volatile void *start, size_t size)
58{
59 unsigned long v, begin, end, linesz;
60
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020061 linesz = CONFIG_SYS_DCACHE_LINESZ;
Wolfgang Denk64702552006-10-24 14:27:35 +020062
63 /* You asked for it, you got it */
64 begin = (unsigned long)start & ~(linesz - 1);
65 end = ((unsigned long)start + size + linesz - 1) & ~(linesz - 1);
66
67 for (v = begin; v < end; v += linesz)
68 dcache_flush_line((void *)v);
69
70 sync_write_buffer();
71}
72
73void icache_invalidate_range(volatile void *start, size_t size)
74{
75 unsigned long v, begin, end, linesz;
76
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020077 linesz = CONFIG_SYS_ICACHE_LINESZ;
Wolfgang Denk64702552006-10-24 14:27:35 +020078
79 /* You asked for it, you got it */
80 begin = (unsigned long)start & ~(linesz - 1);
81 end = ((unsigned long)start + size + linesz - 1) & ~(linesz - 1);
82
83 for (v = begin; v < end; v += linesz)
84 icache_invalidate_line((void *)v);
85}
86
87/*
88 * This is called after loading something into memory. We need to
89 * make sure that everything that was loaded is actually written to
90 * RAM, and that the icache will look for it. Cleaning the dcache and
91 * invalidating the icache will do the trick.
92 */
93void flush_cache (unsigned long start_addr, unsigned long size)
94{
95 dcache_clean_range((void *)start_addr, size);
96 icache_invalidate_range((void *)start_addr, size);
97}