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Lokesh Vutlaac736802019-06-13 10:29:55 +05301// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/
4 */
5
6/dts-v1/;
7
8#include "k3-j721e-som-p0.dtsi"
Lokesh Vutla430a0b32019-10-07 19:26:37 +05309#include "k3-j721e-ddr-evm-lp4-3733.dtsi"
10#include "k3-j721e-ddr.dtsi"
Lokesh Vutlaac736802019-06-13 10:29:55 +053011
12/ {
13 aliases {
14 remoteproc0 = &sysctrler;
15 remoteproc1 = &a72_0;
Keerthy71127602020-02-12 13:55:08 +053016 remoteproc2 = &main_r5fss0_core0;
17 remoteproc3 = &main_r5fss0_core1;
Lokesh Vutlaac736802019-06-13 10:29:55 +053018 };
19
20 chosen {
21 stdout-path = "serial2:115200n8";
22 tick-timer = &timer1;
23 };
24
25 a72_0: a72@0 {
26 compatible = "ti,am654-rproc";
27 reg = <0x0 0x00a90000 0x0 0x10>;
28 power-domains = <&k3_pds 61 TI_SCI_PD_EXCLUSIVE>,
29 <&k3_pds 202 TI_SCI_PD_EXCLUSIVE>;
30 resets = <&k3_reset 202 0>;
31 assigned-clocks = <&k3_clks 202 2>, <&k3_clks 61 1>;
32 assigned-clock-rates = <2000000000>, <200000000>;
33 ti,sci = <&dmsc>;
34 ti,sci-proc-id = <32>;
35 ti,sci-host-id = <10>;
36 u-boot,dm-spl;
37 };
38
Faiz Abbas6f08b482020-02-26 13:44:37 +053039 clk_200mhz: dummy_clock_200mhz {
Lokesh Vutlaac736802019-06-13 10:29:55 +053040 compatible = "fixed-clock";
41 #clock-cells = <0>;
42 clock-frequency = <200000000>;
43 u-boot,dm-spl;
44 };
Vignesh Raghavendra4bdd3302020-01-27 17:59:25 +053045
Faiz Abbas6f08b482020-02-26 13:44:37 +053046 clk_19_2mhz: dummy_clock_19_2mhz {
Vignesh Raghavendra4bdd3302020-01-27 17:59:25 +053047 compatible = "fixed-clock";
48 #clock-cells = <0>;
49 clock-frequency = <19200000>;
50 u-boot,dm-spl;
51 };
Lokesh Vutlaac736802019-06-13 10:29:55 +053052};
53
54&cbass_mcu_wakeup {
55 mcu_secproxy: secproxy@28380000 {
56 u-boot,dm-spl;
57 compatible = "ti,am654-secure-proxy";
58 reg = <0x0 0x2a380000 0x0 0x80000>,
59 <0x0 0x2a400000 0x0 0x80000>,
60 <0x0 0x2a480000 0x0 0x80000>;
61 reg-names = "rt", "scfg", "target_data";
62 #mbox-cells = <1>;
63 };
64
65 sysctrler: sysctrler {
66 u-boot,dm-spl;
67 compatible = "ti,am654-system-controller";
68 mboxes= <&mcu_secproxy 4>, <&mcu_secproxy 5>;
69 mbox-names = "tx", "rx";
70 };
Keerthybe86d322019-10-24 15:00:58 +053071
72 wkup_vtm0: wkup_vtm@42040000 {
73 compatible = "ti,am654-vtm", "ti,j721e-avs";
74 reg = <0x0 0x42040000 0x0 0x330>;
75 power-domains = <&k3_pds 154 TI_SCI_PD_EXCLUSIVE>;
76 #thermal-sensor-cells = <1>;
77 };
Lokesh Vutlaac736802019-06-13 10:29:55 +053078};
79
Tero Kristo3cafcd82020-02-14 11:18:17 +020080&cbass_main {
81 main_esm: esm@700000 {
82 compatible = "ti,j721e-esm";
83 reg = <0x0 0x700000 0x0 0x1000>;
84 ti,esm-pins = <344>, <345>;
85 u-boot,dm-spl;
86 };
87};
88
Lokesh Vutlaac736802019-06-13 10:29:55 +053089&dmsc {
90 mboxes= <&mcu_secproxy 8>, <&mcu_secproxy 6>, <&mcu_secproxy 5>;
91 mbox-names = "tx", "rx", "notify";
92 ti,host-id = <4>;
93 ti,secure-host;
94};
95
96&wkup_pmx0 {
97 wkup_uart0_pins_default: wkup_uart0_pins_default {
98 u-boot,dm-spl;
99 pinctrl-single,pins = <
100 J721E_WKUP_IOPAD(0xa0, PIN_INPUT, 0) /* (J29) WKUP_UART0_RXD */
101 J721E_WKUP_IOPAD(0xa4, PIN_OUTPUT, 0) /* (J28) WKUP_UART0_TXD */
102 >;
103 };
104
105 mcu_uart0_pins_default: mcu_uart0_pins_default {
106 u-boot,dm-spl;
107 pinctrl-single,pins = <
108 J721E_WKUP_IOPAD(0xe8, PIN_INPUT, 0) /* (H29) WKUP_GPIO0_14.MCU_UART0_CTSn */
109 J721E_WKUP_IOPAD(0xec, PIN_OUTPUT, 0) /* (J27) WKUP_GPIO0_15.MCU_UART0_RTSn */
110 J721E_WKUP_IOPAD(0xe4, PIN_INPUT, 0) /* (H28) WKUP_GPIO0_13.MCU_UART0_RXD */
111 J721E_WKUP_IOPAD(0xe0, PIN_OUTPUT, 0) /* (G29) WKUP_GPIO0_12.MCU_UART0_TXD */
112 >;
113 };
Keerthyc6f86542019-10-24 15:00:59 +0530114
115 wkup_i2c0_pins_default: wkup-i2c0-pins-default {
116 pinctrl-single,pins = <
117 J721E_WKUP_IOPAD(0xf8, PIN_INPUT_PULLUP, 0) /* (J25) WKUP_I2C0_SCL */
118 J721E_WKUP_IOPAD(0xfc, PIN_INPUT_PULLUP, 0) /* (H24) WKUP_I2C0_SDA */
119 >;
120 };
Vignesh Raghavendrada674372020-02-04 11:09:52 +0530121
122 mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-pins-default {
123 pinctrl-single,pins = <
124 J721E_WKUP_IOPAD(0x0000, PIN_OUTPUT, 0) /* MCU_OSPI0_CLK */
125 J721E_WKUP_IOPAD(0x0008, PIN_INPUT, 0) /* MCU_OSPI0_DQS */
126 J721E_WKUP_IOPAD(0x000c, PIN_INPUT, 0) /* MCU_OSPI0_D0 */
127 J721E_WKUP_IOPAD(0x0010, PIN_INPUT, 0) /* MCU_OSPI0_D1 */
128 J721E_WKUP_IOPAD(0x0014, PIN_INPUT, 0) /* MCU_OSPI0_D2 */
129 J721E_WKUP_IOPAD(0x0018, PIN_INPUT, 0) /* MCU_OSPI0_D3 */
130 J721E_WKUP_IOPAD(0x001c, PIN_INPUT, 0) /* MCU_OSPI0_D4 */
131 J721E_WKUP_IOPAD(0x0020, PIN_INPUT, 0) /* MCU_OSPI0_D5 */
132 J721E_WKUP_IOPAD(0x0024, PIN_INPUT, 0) /* MCU_OSPI0_D6 */
133 J721E_WKUP_IOPAD(0x0028, PIN_INPUT, 0) /* MCU_OSPI0_D7 */
134 J721E_WKUP_IOPAD(0x002c, PIN_OUTPUT, 0) /* MCU_OSPI0_CSn0 */
135 >;
136 };
Keerthy71156c92020-03-04 10:09:59 +0530137
138 mcu_fss0_ospi1_pins_default: mcu-fss0-ospi1-pins-default {
139 u-boot,dm-spl;
140 pinctrl-single,pins = <
141 J721E_WKUP_IOPAD(0x34, PIN_OUTPUT, 0) /* (F22) MCU_OSPI1_CLK */
142 J721E_WKUP_IOPAD(0x50, PIN_OUTPUT, 0) /* (C22) MCU_OSPI1_CSn0 */
143 J721E_WKUP_IOPAD(0x40, PIN_INPUT, 0) /* (D22) MCU_OSPI1_D0 */
144 J721E_WKUP_IOPAD(0x44, PIN_INPUT, 0) /* (G22) MCU_OSPI1_D1 */
145 J721E_WKUP_IOPAD(0x48, PIN_INPUT, 0) /* (D23) MCU_OSPI1_D2 */
146 J721E_WKUP_IOPAD(0x4c, PIN_INPUT, 0) /* (C23) MCU_OSPI1_D3 */
147 J721E_WKUP_IOPAD(0x3c, PIN_INPUT, 0) /* (B23) MCU_OSPI1_DQS */
148 J721E_WKUP_IOPAD(0x38, PIN_INPUT, 0) /* (A23) MCU_OSPI1_LBCLKO */
149 >;
150 };
Lokesh Vutlaac736802019-06-13 10:29:55 +0530151};
152
153&main_pmx0 {
154 main_uart0_pins_default: main_uart0_pins_default {
155 u-boot,dm-spl;
156 pinctrl-single,pins = <
157 J721E_IOPAD(0x1d4, PIN_INPUT, 1) /* (Y3) SPI1_CS0.UART0_CTSn */
158 J721E_IOPAD(0x1c0, PIN_OUTPUT, 1) /* (AA2) SPI0_CS0.UART0_RTSn */
159 J721E_IOPAD(0x1e8, PIN_INPUT, 0) /* (AB2) UART0_RXD */
160 J721E_IOPAD(0x1ec, PIN_OUTPUT, 0) /* (AB3) UART0_TXD */
161 >;
162 };
Vignesh Raghavendra04ed4932019-11-18 19:16:35 +0530163
164 main_usbss0_pins_default: main_usbss0_pins_default {
165 pinctrl-single,pins = <
166 J721E_IOPAD(0x290, PIN_OUTPUT, 0) /* (U6) USB0_DRVVBUS */
167 J721E_IOPAD(0x210, PIN_INPUT, 7) /* (W3) MCAN1_RX.GPIO1_3 */
168 >;
169 };
Faiz Abbasc67d3892020-01-16 19:42:21 +0530170
171 main_mmc1_pins_default: main_mmc1_pins_default {
172 pinctrl-single,pins = <
173 J721E_IOPAD(0x254, PIN_INPUT, 0) /* (R29) MMC1_CMD */
174 J721E_IOPAD(0x250, PIN_INPUT, 0) /* (P25) MMC1_CLK */
175 J721E_IOPAD(0x2ac, PIN_INPUT, 0) /* (P25) MMC1_CLKLB */
176 J721E_IOPAD(0x24c, PIN_INPUT, 0) /* (R24) MMC1_DAT0 */
177 J721E_IOPAD(0x248, PIN_INPUT, 0) /* (P24) MMC1_DAT1 */
178 J721E_IOPAD(0x244, PIN_INPUT, 0) /* (R25) MMC1_DAT2 */
179 J721E_IOPAD(0x240, PIN_INPUT, 0) /* (R26) MMC1_DAT3 */
180 J721E_IOPAD(0x258, PIN_INPUT, 0) /* (P23) MMC1_SDCD */
181 J721E_IOPAD(0x25c, PIN_INPUT, 0) /* (R28) MMC1_SDWP */
182 >;
183 };
Vignesh Raghavendra8a290cc2020-01-27 23:22:15 +0530184
185 main_i2c0_pins_default: main-i2c0-pins-default {
186 pinctrl-single,pins = <
187 J721E_IOPAD(0x220, PIN_INPUT_PULLUP, 0) /* (AC5) I2C0_SCL */
188 J721E_IOPAD(0x224, PIN_INPUT_PULLUP, 0) /* (AA5) I2C0_SDA */
189 >;
190 };
Lokesh Vutlaac736802019-06-13 10:29:55 +0530191};
192
193&wkup_uart0 {
194 u-boot,dm-spl;
195 pinctrl-names = "default";
196 pinctrl-0 = <&wkup_uart0_pins_default>;
197 status = "okay";
198};
199
200&mcu_uart0 {
Lokesh Vutlabad3d412020-02-03 19:16:53 +0530201 /delete-property/ power-domains;
202 /delete-property/ clocks;
203 /delete-property/ clock-names;
Lokesh Vutlaac736802019-06-13 10:29:55 +0530204 pinctrl-names = "default";
205 pinctrl-0 = <&mcu_uart0_pins_default>;
206 status = "okay";
Lokesh Vutlabad3d412020-02-03 19:16:53 +0530207 clock-frequency = <48000000>;
Lokesh Vutlaac736802019-06-13 10:29:55 +0530208};
209
210&main_uart0 {
211 pinctrl-names = "default";
212 pinctrl-0 = <&main_uart0_pins_default>;
213 status = "okay";
214 power-domains = <&k3_pds 146 TI_SCI_PD_SHARED>;
215};
216
217&main_sdhci0 {
218 /delete-property/ power-domains;
219 /delete-property/ assigned-clocks;
220 /delete-property/ assigned-clock-parents;
221 clock-names = "clk_xin";
222 clocks = <&clk_200mhz>;
223 ti,driver-strength-ohm = <50>;
224 non-removable;
225 bus-width = <8>;
226};
227
228&main_sdhci1 {
229 /delete-property/ power-domains;
230 /delete-property/ assigned-clocks;
231 /delete-property/ assigned-clock-parents;
Faiz Abbasc67d3892020-01-16 19:42:21 +0530232 pinctrl-names = "default";
233 pinctrl-0 = <&main_mmc1_pins_default>;
Lokesh Vutlaac736802019-06-13 10:29:55 +0530234 clock-names = "clk_xin";
235 clocks = <&clk_200mhz>;
236 ti,driver-strength-ohm = <50>;
237};
238
Keerthyc6f86542019-10-24 15:00:59 +0530239&wkup_i2c0 {
240 u-boot,dm-spl;
241 tps659413a: tps659413a@48 {
242 reg = <0x48>;
243 compatible = "ti,tps659413";
244 u-boot,dm-spl;
245 pinctrl-names = "default";
246 pinctrl-0 = <&wkup_i2c0_pins_default>;
247 clock-frequency = <400000>;
248
249 regulators: regulators {
250 u-boot,dm-spl;
251 buck12_reg: buck12 {
252 /*VDD_MPU*/
253 regulator-name = "buck12";
254 regulator-min-microvolt = <800000>;
255 regulator-max-microvolt = <1250000>;
256 regulator-always-on;
257 regulator-boot-on;
258 u-boot,dm-spl;
259 };
260 };
261 };
262};
263
Keerthy7c9fa302019-10-24 15:01:00 +0530264&wkup_vtm0 {
265 vdd-supply-2 = <&buck12_reg>;
266 u-boot,dm-spl;
267};
268
Vignesh Raghavendra4bdd3302020-01-27 17:59:25 +0530269&usbss0 {
270 /delete-property/ power-domains;
271 /delete-property/ assigned-clocks;
272 /delete-property/ assigned-clock-parents;
273 clocks = <&clk_19_2mhz>;
274 clock-names = "usb2_refclk";
275 pinctrl-names = "default";
276 pinctrl-0 = <&main_usbss0_pins_default>;
277 ti,vbus-divider;
278};
279
Vignesh Raghavendra8a290cc2020-01-27 23:22:15 +0530280&main_i2c0 {
281 pinctrl-names = "default";
282 pinctrl-0 = <&main_i2c0_pins_default>;
283 clock-frequency = <400000>;
284
285 exp1: gpio@20 {
286 compatible = "ti,tca6416";
287 reg = <0x20>;
288 gpio-controller;
289 #gpio-cells = <2>;
290 };
291
292 exp2: gpio@22 {
293 compatible = "ti,tca6424";
294 reg = <0x22>;
295 gpio-controller;
296 #gpio-cells = <2>;
297 };
298};
299
Vignesh Raghavendrada674372020-02-04 11:09:52 +0530300&ospi0 {
301 pinctrl-names = "default";
302 pinctrl-0 = <&mcu_fss0_ospi0_pins_default>;
303
304 reg = <0x0 0x47040000 0x0 0x100>,
305 <0x0 0x50000000 0x0 0x8000000>;
306
307 flash@0{
308 compatible = "jedec,spi-nor";
309 reg = <0x0>;
310 spi-tx-bus-width = <1>;
311 spi-rx-bus-width = <8>;
Vignesh Raghavendraf9a36d52020-04-02 18:59:13 +0530312 spi-max-frequency = <50000000>;
Vignesh Raghavendrada674372020-02-04 11:09:52 +0530313 cdns,tshsl-ns = <60>;
314 cdns,tsd2d-ns = <60>;
315 cdns,tchsh-ns = <60>;
316 cdns,tslch-ns = <60>;
317 cdns,read-delay = <0>;
318 #address-cells = <1>;
319 #size-cells = <1>;
320 };
321};
322
Keerthy7b0b42d2020-03-04 10:10:01 +0530323&ospi1 {
324 pinctrl-names = "default";
325 pinctrl-0 = <&mcu_fss0_ospi1_pins_default>;
326 u-boot,dm-spl;
327
328 reg = <0x0 0x47050000 0x0 0x100>,
329 <0x0 0x58000000 0x0 0x8000000>;
330
331 flash@0{
332 compatible = "jedec,spi-nor";
333 reg = <0x0>;
334 spi-tx-bus-width = <1>;
335 spi-rx-bus-width = <4>;
336 spi-max-frequency = <40000000>;
337 cdns,tshsl-ns = <60>;
338 cdns,tsd2d-ns = <60>;
339 cdns,tchsh-ns = <60>;
340 cdns,tslch-ns = <60>;
341 cdns,read-delay = <2>;
342 #address-cells = <1>;
343 #size-cells = <1>;
344 u-boot,dm-spl;
345 };
346};
347
Lokesh Vutlaac736802019-06-13 10:29:55 +0530348#include "k3-j721e-common-proc-board-u-boot.dtsi"