| Peter Tyser | 1c2b329 | 2008-12-17 16:36:23 -0600 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2008 Extreme Engineering Solutions, Inc. |
| 3 | * |
| 4 | * See file CREDITS for list of people who contributed to this |
| 5 | * project. |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or |
| 8 | * modify it under the terms of the GNU General Public License as |
| 9 | * published by the Free Software Foundation; either version 2 of |
| 10 | * the License, or (at your option) any later version. |
| 11 | * |
| 12 | * This program is distributed in the hope that it will be useful, |
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 15 | * GNU General Public License for more details. |
| 16 | * |
| 17 | * You should have received a copy of the GNU General Public License |
| 18 | * along with this program; if not, write to the Free Software |
| 19 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 20 | * MA 02111-1307 USA |
| 21 | */ |
| 22 | |
| 23 | #include <common.h> |
| 24 | |
| 25 | /* |
| 26 | * Return SYSCLK input frequency - 50 MHz or 66 MHz depending on POR config |
| 27 | */ |
| 28 | unsigned long get_board_sys_clk(ulong dummy) |
| 29 | { |
| 30 | volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); |
| 31 | u32 gpporcr = gur->gpporcr; |
| 32 | |
| 33 | if (gpporcr & 0x10000) |
| 34 | return 66666666; |
| 35 | else |
| 36 | return 50000000; |
| 37 | } |
| 38 | |
| 39 | /* |
| 40 | * Return DDR input clock - synchronous with SYSCLK or 66 MHz |
| 41 | */ |
| 42 | unsigned long get_board_ddr_clk(ulong dummy) |
| 43 | { |
| 44 | volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); |
| 45 | u32 ddr_ratio = ((gur->porpllsr) & 0x00003e00) >> 9; |
| 46 | |
| 47 | if (ddr_ratio == 0x7) |
| 48 | return get_board_sys_clk(dummy); |
| 49 | |
| 50 | return 66666666; |
| 51 | } |