| Peng Fan | ca09d4c | 2019-04-22 10:41:28 +0000 | [diff] [blame] | 1 | menu "i.MX8M DDR controllers" |
| 2 | depends on ARCH_IMX8M |
| 3 | |
| Peng Fan | 692f943 | 2018-11-20 10:19:57 +0000 | [diff] [blame] | 4 | config IMX8M_DRAM |
| 5 | bool "imx8m dram" |
| 6 | |
| 7 | config IMX8M_LPDDR4 |
| 8 | bool "imx8m lpddr4" |
| 9 | select IMX8M_DRAM |
| 10 | help |
| 11 | Select the i.MX8M LPDDR4 driver support on i.MX8M SOC. |
| 12 | |
| 13 | config IMX8M_DDR4 |
| 14 | bool "imx8m ddr4" |
| 15 | select IMX8M_DRAM |
| 16 | help |
| 17 | Select the i.MX8M DDR4 driver support on i.MX8M SOC. |
| 18 | |
| Jacky Bai | d62ddc1 | 2019-08-08 09:59:08 +0000 | [diff] [blame] | 19 | config IMX8M_DDR3L |
| 20 | bool "imx8m ddr3l" |
| 21 | select IMX8M_DRAM |
| 22 | help |
| 23 | Select the i.MX8M DDR3L driver support on i.MX8M SOC. |
| 24 | |
| Peng Fan | 692f943 | 2018-11-20 10:19:57 +0000 | [diff] [blame] | 25 | config SAVED_DRAM_TIMING_BASE |
| 26 | hex "Define the base address for saved dram timing" |
| 27 | help |
| 28 | after DRAM is trained, need to save the dram related timming |
| 29 | info into memory for low power use. OCRAM_S is used for this |
| 30 | purpose on i.MX8MM. |
| 31 | default 0x180000 |
| Sherry Sun | 7957bd6 | 2020-01-20 11:13:14 +0800 | [diff] [blame] | 32 | |
| 33 | config IMX8M_DRAM_INLINE_ECC |
| 34 | bool "imx8mp inline ECC" |
| 35 | depends on IMX8MP && IMX8M_LPDDR4 |
| 36 | help |
| 37 | Select this config if you want to use inline ecc feature for |
| 38 | imx8mp-evk board. |
| haidong.zheng | 6292783 | 2021-03-19 15:57:02 +0800 | [diff] [blame] | 39 | |
| 40 | config IMX8M_VDD_SOC_850MV |
| 41 | bool "imx8mp change the vdd_soc voltage to 850mv" |
| 42 | depends on IMX8MP |
| 43 | |
| 44 | config IMX8M_LPDDR4_FREQ0_2400MTS |
| 45 | bool "imx8m PDDR4 freq0 change from 4000MTS to 2400MTS" |
| 46 | |
| Peng Fan | ca09d4c | 2019-04-22 10:41:28 +0000 | [diff] [blame] | 47 | endmenu |