Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
Rick Chen | b46a18b | 2017-12-26 13:55:54 +0800 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (C) 2017 Andes Technology Corporation |
| 4 | * Rick Chen, Andes Technology Corporation <rick@andestech.com> |
Rick Chen | b46a18b | 2017-12-26 13:55:54 +0800 | [diff] [blame] | 5 | */ |
| 6 | |
| 7 | #ifndef __CONFIG_H |
| 8 | #define __CONFIG_H |
| 9 | |
Rick Chen | c3027d0 | 2019-11-14 13:52:22 +0800 | [diff] [blame] | 10 | #ifdef CONFIG_SPL |
| 11 | #define CONFIG_SPL_MAX_SIZE 0x00100000 |
| 12 | #define CONFIG_SPL_BSS_START_ADDR 0x04000000 |
| 13 | #define CONFIG_SPL_BSS_MAX_SIZE 0x00100000 |
| 14 | |
Simon Glass | b58bfe0 | 2021-08-08 12:20:09 -0600 | [diff] [blame] | 15 | #ifdef CONFIG_SPL_MMC |
Rick Chen | c3027d0 | 2019-11-14 13:52:22 +0800 | [diff] [blame] | 16 | #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.itb" |
| 17 | #endif |
| 18 | #endif |
| 19 | |
Pragnesh Patel | 02038c3 | 2021-01-17 18:11:25 +0530 | [diff] [blame] | 20 | #define RISCV_MMODE_TIMERBASE 0xe6000000 |
| 21 | #define RISCV_MMODE_TIMER_FREQ 60000000 |
| 22 | |
| 23 | #define RISCV_SMODE_TIMER_FREQ 60000000 |
| 24 | |
Rick Chen | b46a18b | 2017-12-26 13:55:54 +0800 | [diff] [blame] | 25 | /* |
| 26 | * CPU and Board Configuration Options |
| 27 | */ |
Rick Chen | b46a18b | 2017-12-26 13:55:54 +0800 | [diff] [blame] | 28 | |
Rick Chen | b46a18b | 2017-12-26 13:55:54 +0800 | [diff] [blame] | 29 | /* |
| 30 | * Miscellaneous configurable options |
| 31 | */ |
Rick Chen | b46a18b | 2017-12-26 13:55:54 +0800 | [diff] [blame] | 32 | #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ |
| 33 | |
| 34 | /* |
| 35 | * Print Buffer Size |
| 36 | */ |
| 37 | #define CONFIG_SYS_PBSIZE \ |
| 38 | (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) |
| 39 | |
| 40 | /* |
| 41 | * max number of command args |
| 42 | */ |
| 43 | #define CONFIG_SYS_MAXARGS 16 |
| 44 | |
| 45 | /* |
| 46 | * Boot Argument Buffer Size |
| 47 | */ |
| 48 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE |
| 49 | |
Rick Chen | 40a6fe7 | 2018-03-29 10:08:33 +0800 | [diff] [blame] | 50 | /* DT blob (fdt) address */ |
Rick Chen | 9291963 | 2019-04-30 13:49:37 +0800 | [diff] [blame] | 51 | #define CONFIG_SYS_FDT_BASE 0x800f0000 |
Rick Chen | 40a6fe7 | 2018-03-29 10:08:33 +0800 | [diff] [blame] | 52 | |
Rick Chen | b46a18b | 2017-12-26 13:55:54 +0800 | [diff] [blame] | 53 | /* |
| 54 | * Physical Memory Map |
| 55 | */ |
Rick Chen | b46a18b | 2017-12-26 13:55:54 +0800 | [diff] [blame] | 56 | #define PHYS_SDRAM_0 0x00000000 /* SDRAM Bank #1 */ |
| 57 | #define PHYS_SDRAM_1 \ |
| 58 | (PHYS_SDRAM_0 + PHYS_SDRAM_0_SIZE) /* SDRAM Bank #2 */ |
| 59 | #define PHYS_SDRAM_0_SIZE 0x20000000 /* 512 MB */ |
| 60 | #define PHYS_SDRAM_1_SIZE 0x20000000 /* 512 MB */ |
| 61 | #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_0 |
| 62 | |
| 63 | /* |
| 64 | * Serial console configuration |
| 65 | */ |
Rick Chen | b46a18b | 2017-12-26 13:55:54 +0800 | [diff] [blame] | 66 | #define CONFIG_SYS_NS16550_SERIAL |
| 67 | #ifndef CONFIG_DM_SERIAL |
| 68 | #define CONFIG_SYS_NS16550_REG_SIZE -4 |
| 69 | #endif |
| 70 | #define CONFIG_SYS_NS16550_CLK 19660800 |
| 71 | |
Rick Chen | b46a18b | 2017-12-26 13:55:54 +0800 | [diff] [blame] | 72 | /* Init Stack Pointer */ |
| 73 | #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000000 - \ |
| 74 | GENERATED_GBL_DATA_SIZE) |
| 75 | |
Rick Chen | c616414 | 2018-05-29 11:04:23 +0800 | [diff] [blame] | 76 | /* use CFI framework */ |
Rick Chen | c616414 | 2018-05-29 11:04:23 +0800 | [diff] [blame] | 77 | |
| 78 | #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT |
Rick Chen | c616414 | 2018-05-29 11:04:23 +0800 | [diff] [blame] | 79 | #define CONFIG_SYS_CFI_FLASH_STATUS_POLL |
| 80 | |
| 81 | /* support JEDEC */ |
| 82 | #ifdef CONFIG_CFI_FLASH |
| 83 | #define CONFIG_SYS_MAX_FLASH_BANKS_DETECT 1 |
| 84 | #endif/* Do not use CONFIG_FLASH_CFI_LEGACY to detect on board flash */ |
| 85 | #define PHYS_FLASH_1 0x88000000 /* BANK 0 */ |
| 86 | #define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 |
| 87 | #define CONFIG_SYS_FLASH_BANKS_LIST { PHYS_FLASH_1, } |
| 88 | #define CONFIG_SYS_MONITOR_BASE PHYS_FLASH_1 |
| 89 | |
| 90 | #define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* TO for Flash Erase (ms) */ |
| 91 | #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* TO for Flash Write (ms) */ |
| 92 | |
| 93 | /* max number of memory banks */ |
| 94 | /* |
| 95 | * There are 4 banks supported for this Controller, |
| 96 | * but we have only 1 bank connected to flash on board |
| 97 | */ |
| 98 | #ifndef CONFIG_SYS_MAX_FLASH_BANKS_DETECT |
| 99 | #define CONFIG_SYS_MAX_FLASH_BANKS 1 |
| 100 | #endif |
| 101 | #define CONFIG_SYS_FLASH_BANKS_SIZES {0x4000000} |
| 102 | |
| 103 | /* max number of sectors on one chip */ |
| 104 | #define CONFIG_FLASH_SECTOR_SIZE (0x10000*2) |
| 105 | #define CONFIG_SYS_MAX_FLASH_SECT 512 |
| 106 | |
Rick Chen | b46a18b | 2017-12-26 13:55:54 +0800 | [diff] [blame] | 107 | /* environments */ |
Rick Chen | b46a18b | 2017-12-26 13:55:54 +0800 | [diff] [blame] | 108 | |
| 109 | /* SPI FLASH */ |
Rick Chen | b46a18b | 2017-12-26 13:55:54 +0800 | [diff] [blame] | 110 | |
| 111 | /* |
| 112 | * For booting Linux, the board info and command line data |
| 113 | * have to be in the first 16 MB of memory, since this is |
| 114 | * the maximum mapped by the Linux kernel during initialization. |
| 115 | */ |
| 116 | |
| 117 | /* Initial Memory map for Linux*/ |
| 118 | #define CONFIG_SYS_BOOTMAPSZ (64 << 20) |
| 119 | /* Increase max gunzip size */ |
| 120 | #define CONFIG_SYS_BOOTM_LEN (64 << 20) |
| 121 | |
Leo Yu-Chi Liang | 919a0e7 | 2021-11-04 09:53:26 +0800 | [diff] [blame] | 122 | /* Support autoboot from RAM (kernel image is loaded via debug port) */ |
| 123 | #define KERNEL_IMAGE_ADDR "0x2000000 " |
| 124 | #define BOOTENV_DEV_NAME_RAM(devtypeu, devtypel, instance) \ |
| 125 | "ram " |
| 126 | #define BOOTENV_DEV_RAM(devtypeu, devtypel, instance) \ |
| 127 | "bootcmd_ram=" \ |
| 128 | "booti " \ |
| 129 | KERNEL_IMAGE_ADDR \ |
| 130 | "- $fdtcontroladdr\0" |
| 131 | |
Alexander Graf | 438b9be | 2018-04-23 07:59:49 +0200 | [diff] [blame] | 132 | /* When we use RAM as ENV */ |
Alexander Graf | 438b9be | 2018-04-23 07:59:49 +0200 | [diff] [blame] | 133 | |
| 134 | /* Enable distro boot */ |
| 135 | #define BOOT_TARGET_DEVICES(func) \ |
| 136 | func(MMC, mmc, 0) \ |
Leo Yu-Chi Liang | 919a0e7 | 2021-11-04 09:53:26 +0800 | [diff] [blame] | 137 | func(DHCP, dhcp, na) \ |
| 138 | func(RAM, ram, na) |
Alexander Graf | 438b9be | 2018-04-23 07:59:49 +0200 | [diff] [blame] | 139 | #include <config_distro_bootcmd.h> |
| 140 | |
| 141 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
| 142 | "kernel_addr_r=0x00080000\0" \ |
| 143 | "pxefile_addr_r=0x01f00000\0" \ |
| 144 | "scriptaddr=0x01f00000\0" \ |
| 145 | "fdt_addr_r=0x02000000\0" \ |
| 146 | "ramdisk_addr_r=0x02800000\0" \ |
| 147 | BOOTENV |
| 148 | |
Rick Chen | b46a18b | 2017-12-26 13:55:54 +0800 | [diff] [blame] | 149 | #endif /* __CONFIG_H */ |