blob: 3764b5478b79ab07c03386414459f93f6d565261 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Minkyu Kang0aa1a6b2011-01-24 15:33:50 +09002/*
3 * Copyright (C) 2010 Samsung Electronics
4 * Minkyu Kang <mk7.kang@samsung.com>
5 * Kyungmin Park <kyungmin.park@samsung.com>
Minkyu Kang0aa1a6b2011-01-24 15:33:50 +09006 */
7
8#include <common.h>
Simon Glass5e6201b2019-08-01 09:46:51 -06009#include <env.h>
Simon Glass0f2af882020-05-10 11:40:05 -060010#include <log.h>
Piotr Wilczeke372b552012-10-19 05:34:03 +000011#include <spi.h>
Piotr Wilczek461c5e52012-10-19 05:34:07 +000012#include <lcd.h>
Simon Glass3ba929a2020-10-30 21:38:53 -060013#include <asm/global_data.h>
Minkyu Kang0aa1a6b2011-01-24 15:33:50 +090014#include <asm/io.h>
Piotr Wilczeke372b552012-10-19 05:34:03 +000015#include <asm/gpio.h>
Minkyu Kang0aa1a6b2011-01-24 15:33:50 +090016#include <asm/arch/adc.h>
Piotr Wilczek3b179142012-09-20 00:19:59 +000017#include <asm/arch/pinmux.h>
Piotr Wilczek6ce94c32012-09-20 00:20:00 +000018#include <asm/arch/watchdog.h>
Piotr Wilczek461c5e52012-10-19 05:34:07 +000019#include <ld9040.h>
Simon Glassdbd79542020-05-10 11:40:11 -060020#include <linux/delay.h>
Łukasz Majewski1c6dba12012-11-13 03:21:55 +000021#include <power/pmic.h>
Piotr Wilczek0ada4ad2014-03-07 14:59:47 +010022#include <usb.h>
Marek Vasutf1be9cb2015-12-04 02:51:20 +010023#include <usb/dwc2_udc.h>
Lukasz Majewskibf731262011-12-15 10:32:12 +010024#include <asm/arch/cpu.h>
Łukasz Majewski1c6dba12012-11-13 03:21:55 +000025#include <power/max8998_pmic.h>
Piotr Wilczek0ada4ad2014-03-07 14:59:47 +010026#include <libtizen.h>
Przemyslaw Marczak94df8012014-01-22 11:24:20 +010027#include <samsung/misc.h>
Piotr Wilczek0ada4ad2014-03-07 14:59:47 +010028#include <usb_mass_storage.h>
Simon Glass0ffb9d62017-05-31 19:47:48 -060029#include <asm/mach-types.h>
Minkyu Kang0aa1a6b2011-01-24 15:33:50 +090030
31DECLARE_GLOBAL_DATA_PTR;
32
Minkyu Kang0aa1a6b2011-01-24 15:33:50 +090033unsigned int board_rev;
Jaehoon Chung40195a22017-01-09 14:47:50 +090034static int init_pmic_lcd(void);
Minkyu Kang0aa1a6b2011-01-24 15:33:50 +090035
Tom Rini4cc38852021-08-30 09:16:30 -040036#ifdef CONFIG_REVISION_TAG
Minkyu Kang0aa1a6b2011-01-24 15:33:50 +090037u32 get_board_rev(void)
38{
39 return board_rev;
40}
Tom Rini4cc38852021-08-30 09:16:30 -040041#endif
Minkyu Kang0aa1a6b2011-01-24 15:33:50 +090042
Jaehoon Chung40195a22017-01-09 14:47:50 +090043int exynos_power_init(void)
Minkyu Kang0aa1a6b2011-01-24 15:33:50 +090044{
Jaehoon Chung40195a22017-01-09 14:47:50 +090045 return init_pmic_lcd();
Minkyu Kang0aa1a6b2011-01-24 15:33:50 +090046}
47
Jaehoon Chung40195a22017-01-09 14:47:50 +090048static int get_hwrev(void)
Łukasz Majewski11be2832012-11-13 03:22:17 +000049{
Jaehoon Chung40195a22017-01-09 14:47:50 +090050 return board_rev & 0xFF;
Łukasz Majewski11be2832012-11-13 03:22:17 +000051}
Minkyu Kang0aa1a6b2011-01-24 15:33:50 +090052
Minkyu Kang0aa1a6b2011-01-24 15:33:50 +090053static unsigned short get_adc_value(int channel)
54{
55 struct s5p_adc *adc = (struct s5p_adc *)samsung_get_base_adc();
56 unsigned short ret = 0;
57 unsigned int reg;
58 unsigned int loop = 0;
59
60 writel(channel & 0xF, &adc->adcmux);
61 writel((1 << 14) | (49 << 6), &adc->adccon);
62 writel(1000 & 0xffff, &adc->adcdly);
63 writel(readl(&adc->adccon) | (1 << 16), &adc->adccon); /* 12 bit */
64 udelay(10);
65 writel(readl(&adc->adccon) | (1 << 0), &adc->adccon); /* Enable */
66 udelay(10);
67
68 do {
69 udelay(1);
70 reg = readl(&adc->adccon);
71 } while (!(reg & (1 << 15)) && (loop++ < 1000));
72
73 ret = readl(&adc->adcdat0) & 0xFFF;
74
75 return ret;
76}
77
Łukasz Majewski61f8b402012-03-26 21:53:48 +000078static int adc_power_control(int on)
79{
Jaehoon Chung40195a22017-01-09 14:47:50 +090080 struct udevice *dev;
Łukasz Majewski61f8b402012-03-26 21:53:48 +000081 int ret;
Jaehoon Chung40195a22017-01-09 14:47:50 +090082 u8 reg;
Łukasz Majewski61f8b402012-03-26 21:53:48 +000083
Jaehoon Chung40195a22017-01-09 14:47:50 +090084 ret = pmic_get("max8998-pmic", &dev);
85 if (ret) {
86 puts("Failed to get MAX8998!\n");
87 return ret;
88 }
Łukasz Majewski61f8b402012-03-26 21:53:48 +000089
Jaehoon Chung40195a22017-01-09 14:47:50 +090090 reg = pmic_reg_read(dev, MAX8998_REG_ONOFF1);
91 if (on)
92 reg |= MAX8998_LDO4;
93 else
94 reg &= ~MAX8998_LDO4;
Łukasz Majewski61f8b402012-03-26 21:53:48 +000095
Jaehoon Chung40195a22017-01-09 14:47:50 +090096 ret = pmic_reg_write(dev, MAX8998_REG_ONOFF1, reg);
97 if (ret) {
98 puts("MAX8998 LDO setting error\n");
99 return -EINVAL;
100 }
101
Simon Glass7bbb7d92016-11-23 06:34:40 -0700102 return 0;
Łukasz Majewski61f8b402012-03-26 21:53:48 +0000103}
104
Minkyu Kang0aa1a6b2011-01-24 15:33:50 +0900105static unsigned int get_hw_revision(void)
106{
107 int hwrev, mode0, mode1;
108
Łukasz Majewski61f8b402012-03-26 21:53:48 +0000109 adc_power_control(1);
110
Minkyu Kang0aa1a6b2011-01-24 15:33:50 +0900111 mode0 = get_adc_value(1); /* HWREV_MODE0 */
112 mode1 = get_adc_value(2); /* HWREV_MODE1 */
113
114 /*
115 * XXX Always set the default hwrev as the latest board
116 * ADC = (voltage) / 3.3 * 4096
117 */
118 hwrev = 3;
119
120#define IS_RANGE(x, min, max) ((x) > (min) && (x) < (max))
121 if (IS_RANGE(mode0, 80, 200) && IS_RANGE(mode1, 80, 200))
122 hwrev = 0x0; /* 0.01V 0.01V */
123 if (IS_RANGE(mode0, 750, 1000) && IS_RANGE(mode1, 80, 200))
124 hwrev = 0x1; /* 610mV 0.01V */
125 if (IS_RANGE(mode0, 1300, 1700) && IS_RANGE(mode1, 80, 200))
126 hwrev = 0x2; /* 1.16V 0.01V */
127 if (IS_RANGE(mode0, 2000, 2400) && IS_RANGE(mode1, 80, 200))
128 hwrev = 0x3; /* 1.79V 0.01V */
129#undef IS_RANGE
130
131 debug("mode0: %d, mode1: %d, hwrev 0x%x\n", mode0, mode1, hwrev);
132
Łukasz Majewski61f8b402012-03-26 21:53:48 +0000133 adc_power_control(0);
134
Minkyu Kang0aa1a6b2011-01-24 15:33:50 +0900135 return hwrev;
136}
137
138static void check_hw_revision(void)
139{
140 int hwrev;
141
142 hwrev = get_hw_revision();
143
144 board_rev |= hwrev;
145}
146
Lukasz Majewskibf731262011-12-15 10:32:12 +0100147#ifdef CONFIG_USB_GADGET
148static int s5pc210_phy_control(int on)
149{
Jaehoon Chung40195a22017-01-09 14:47:50 +0900150 struct udevice *dev;
151 int ret;
152 u8 reg;
Lukasz Majewskibf731262011-12-15 10:32:12 +0100153
Jaehoon Chung40195a22017-01-09 14:47:50 +0900154 ret = pmic_get("max8998-pmic", &dev);
155 if (ret) {
156 puts("Failed to get MAX8998!\n");
157 return ret;
158 }
Lukasz Majewskibf731262011-12-15 10:32:12 +0100159
160 if (on) {
Jaehoon Chung40195a22017-01-09 14:47:50 +0900161 reg = pmic_reg_read(dev, MAX8998_REG_BUCK_ACTIVE_DISCHARGE3);
162 reg |= MAX8998_SAFEOUT1;
163 ret |= pmic_reg_write(dev,
164 MAX8998_REG_BUCK_ACTIVE_DISCHARGE3, reg);
165
166 reg = pmic_reg_read(dev, MAX8998_REG_ONOFF1);
167 reg |= MAX8998_LDO3;
168 ret |= pmic_reg_write(dev, MAX8998_REG_ONOFF1, reg);
169
170 reg = pmic_reg_read(dev, MAX8998_REG_ONOFF2);
171 reg |= MAX8998_LDO8;
172 ret |= pmic_reg_write(dev, MAX8998_REG_ONOFF2, reg);
Lukasz Majewskibf731262011-12-15 10:32:12 +0100173
174 } else {
Jaehoon Chung40195a22017-01-09 14:47:50 +0900175 reg = pmic_reg_read(dev, MAX8998_REG_ONOFF2);
176 reg &= ~MAX8998_LDO8;
177 ret |= pmic_reg_write(dev, MAX8998_REG_ONOFF2, reg);
178
179 reg = pmic_reg_read(dev, MAX8998_REG_ONOFF1);
180 reg &= ~MAX8998_LDO3;
181 ret |= pmic_reg_write(dev, MAX8998_REG_ONOFF1, reg);
182
183 reg = pmic_reg_read(dev, MAX8998_REG_BUCK_ACTIVE_DISCHARGE3);
184 reg &= ~MAX8998_SAFEOUT1;
185 ret |= pmic_reg_write(dev,
186 MAX8998_REG_BUCK_ACTIVE_DISCHARGE3, reg);
Lukasz Majewskibf731262011-12-15 10:32:12 +0100187 }
188
189 if (ret) {
190 puts("MAX8998 LDO setting error!\n");
Jaehoon Chung40195a22017-01-09 14:47:50 +0900191 return -EINVAL;
Lukasz Majewskibf731262011-12-15 10:32:12 +0100192 }
Jaehoon Chung40195a22017-01-09 14:47:50 +0900193
Lukasz Majewskibf731262011-12-15 10:32:12 +0100194 return 0;
195}
196
Marek Vasut6939aca2015-12-04 02:23:29 +0100197struct dwc2_plat_otg_data s5pc210_otg_data = {
Lukasz Majewskibf731262011-12-15 10:32:12 +0100198 .phy_control = s5pc210_phy_control,
199 .regs_phy = EXYNOS4_USBPHY_BASE,
200 .regs_otg = EXYNOS4_USBOTG_BASE,
201 .usb_phy_ctrl = EXYNOS4_USBPHY_CONTROL,
202 .usb_flags = PHY0_SLEEP,
203};
204#endif
Piotr Wilczek6ce94c32012-09-20 00:20:00 +0000205
Piotr Wilczek0ada4ad2014-03-07 14:59:47 +0100206int board_usb_init(int index, enum usb_init_type init)
207{
208 debug("USB_udc_probe\n");
Marek Vasut01b61fa2015-12-04 02:26:33 +0100209 return dwc2_udc_probe(&s5pc210_otg_data);
Piotr Wilczek0ada4ad2014-03-07 14:59:47 +0100210}
211
Piotr Wilczek0ada4ad2014-03-07 14:59:47 +0100212int exynos_early_init_f(void)
Piotr Wilczek6ce94c32012-09-20 00:20:00 +0000213{
214 wdt_stop();
215
216 return 0;
217}
Piotr Wilczeke372b552012-10-19 05:34:03 +0000218
Jaehoon Chung40195a22017-01-09 14:47:50 +0900219static int init_pmic_lcd(void)
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000220{
Jaehoon Chung40195a22017-01-09 14:47:50 +0900221 struct udevice *dev;
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000222 unsigned char val;
223 int ret = 0;
224
Jaehoon Chung40195a22017-01-09 14:47:50 +0900225 ret = pmic_get("max8998-pmic", &dev);
226 if (ret) {
227 puts("Failed to get MAX8998 for init_pmic_lcd()!\n");
228 return ret;
229 }
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000230
231 /* LDO7 1.8V */
232 val = 0x02; /* (1800 - 1600) / 100; */
Jaehoon Chung40195a22017-01-09 14:47:50 +0900233 ret |= pmic_reg_write(dev, MAX8998_REG_LDO7, val);
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000234
235 /* LDO17 3.0V */
236 val = 0xe; /* (3000 - 1600) / 100; */
Jaehoon Chung40195a22017-01-09 14:47:50 +0900237 ret |= pmic_reg_write(dev, MAX8998_REG_LDO17, val);
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000238
239 /* Disable unneeded regulators */
240 /*
241 * ONOFF1
242 * Buck1 ON, Buck2 OFF, Buck3 ON, Buck4 ON
243 * LDO2 ON, LDO3 OFF, LDO4 OFF, LDO5 ON
244 */
245 val = 0xB9;
Jaehoon Chung40195a22017-01-09 14:47:50 +0900246 ret |= pmic_reg_write(dev, MAX8998_REG_ONOFF1, val);
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000247
248 /* ONOFF2
249 * LDO6 OFF, LDO7 ON, LDO8 OFF, LDO9 ON,
250 * LDO10 OFF, LDO11 OFF, LDO12 OFF, LDO13 OFF
251 */
252 val = 0x50;
Jaehoon Chung40195a22017-01-09 14:47:50 +0900253 ret |= pmic_reg_write(dev, MAX8998_REG_ONOFF2, val);
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000254
255 /* ONOFF3
256 * LDO14 OFF, LDO15 OFF, LGO16 OFF, LDO17 OFF
257 * EPWRHOLD OFF, EBATTMON OFF, ELBCNFG2 OFF, ELBCNFG1 OFF
258 */
259 val = 0x00;
Jaehoon Chung40195a22017-01-09 14:47:50 +0900260 ret |= pmic_reg_write(dev, MAX8998_REG_ONOFF3, val);
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000261
Jaehoon Chung40195a22017-01-09 14:47:50 +0900262 if (ret) {
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000263 puts("LCD pmic initialisation error!\n");
Jaehoon Chung40195a22017-01-09 14:47:50 +0900264 return -EINVAL;
265 }
266
267 return 0;
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000268}
269
Ajay Kumar41022a12013-02-21 23:52:57 +0000270void exynos_cfg_lcd_gpio(void)
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000271{
272 unsigned int i, f3_end = 4;
273
274 for (i = 0; i < 8; i++) {
275 /* set GPF0,1,2[0:7] for RGB Interface and Data lines (32bit) */
Akshay Saraswat1376cdd2014-05-13 10:30:14 +0530276 gpio_cfg_pin(EXYNOS4_GPIO_F00 + i, S5P_GPIO_FUNC(2));
277 gpio_cfg_pin(EXYNOS4_GPIO_F10 + i, S5P_GPIO_FUNC(2));
278 gpio_cfg_pin(EXYNOS4_GPIO_F20 + i, S5P_GPIO_FUNC(2));
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000279 /* pull-up/down disable */
Akshay Saraswat1376cdd2014-05-13 10:30:14 +0530280 gpio_set_pull(EXYNOS4_GPIO_F00 + i, S5P_GPIO_PULL_NONE);
281 gpio_set_pull(EXYNOS4_GPIO_F10 + i, S5P_GPIO_PULL_NONE);
282 gpio_set_pull(EXYNOS4_GPIO_F20 + i, S5P_GPIO_PULL_NONE);
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000283
284 /* drive strength to max (24bit) */
Akshay Saraswat1376cdd2014-05-13 10:30:14 +0530285 gpio_set_drv(EXYNOS4_GPIO_F00 + i, S5P_GPIO_DRV_4X);
286 gpio_set_rate(EXYNOS4_GPIO_F00 + i, S5P_GPIO_DRV_SLOW);
287 gpio_set_drv(EXYNOS4_GPIO_F10 + i, S5P_GPIO_DRV_4X);
288 gpio_set_rate(EXYNOS4_GPIO_F10 + i, S5P_GPIO_DRV_SLOW);
289 gpio_set_drv(EXYNOS4_GPIO_F20 + i, S5P_GPIO_DRV_4X);
290 gpio_set_rate(EXYNOS4_GPIO_F00 + i, S5P_GPIO_DRV_SLOW);
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000291 }
292
Akshay Saraswat1376cdd2014-05-13 10:30:14 +0530293 for (i = EXYNOS4_GPIO_F30; i < (EXYNOS4_GPIO_F30 + f3_end); i++) {
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000294 /* set GPF3[0:3] for RGB Interface and Data lines (32bit) */
Akshay Saraswat1376cdd2014-05-13 10:30:14 +0530295 gpio_cfg_pin(i, S5P_GPIO_FUNC(2));
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000296 /* pull-up/down disable */
Akshay Saraswat1376cdd2014-05-13 10:30:14 +0530297 gpio_set_pull(i, S5P_GPIO_PULL_NONE);
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000298 /* drive strength to max (24bit) */
Akshay Saraswat1376cdd2014-05-13 10:30:14 +0530299 gpio_set_drv(i, S5P_GPIO_DRV_4X);
300 gpio_set_rate(i, S5P_GPIO_DRV_SLOW);
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000301 }
302
303 /* gpio pad configuration for LCD reset. */
Simon Glass4f83d3d2014-10-20 19:48:39 -0600304 gpio_request(EXYNOS4_GPIO_Y45, "lcd_reset");
Akshay Saraswat1376cdd2014-05-13 10:30:14 +0530305 gpio_cfg_pin(EXYNOS4_GPIO_Y45, S5P_GPIO_OUTPUT);
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000306}
307
Piotr Wilczek0ada4ad2014-03-07 14:59:47 +0100308int mipi_power(void)
309{
310 return 0;
311}
312
Ajay Kumar41022a12013-02-21 23:52:57 +0000313void exynos_reset_lcd(void)
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000314{
Akshay Saraswat1376cdd2014-05-13 10:30:14 +0530315 gpio_set_value(EXYNOS4_GPIO_Y45, 1);
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000316 udelay(10000);
Akshay Saraswat1376cdd2014-05-13 10:30:14 +0530317 gpio_set_value(EXYNOS4_GPIO_Y45, 0);
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000318 udelay(10000);
Akshay Saraswat1376cdd2014-05-13 10:30:14 +0530319 gpio_set_value(EXYNOS4_GPIO_Y45, 1);
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000320 udelay(100);
321}
322
Ajay Kumar41022a12013-02-21 23:52:57 +0000323void exynos_lcd_power_on(void)
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000324{
Jaehoon Chung40195a22017-01-09 14:47:50 +0900325 struct udevice *dev;
326 int ret;
327 u8 reg;
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000328
Jaehoon Chung40195a22017-01-09 14:47:50 +0900329 ret = pmic_get("max8998-pmic", &dev);
330 if (ret) {
331 puts("Failed to get MAX8998!\n");
Minkyu Kang538f26b2012-12-10 22:43:57 +0900332 return;
Jaehoon Chung40195a22017-01-09 14:47:50 +0900333 }
Minkyu Kang538f26b2012-12-10 22:43:57 +0900334
Jaehoon Chung40195a22017-01-09 14:47:50 +0900335 reg = pmic_reg_read(dev, MAX8998_REG_ONOFF3);
336 reg |= MAX8998_LDO17;
337 ret = pmic_reg_write(dev, MAX8998_REG_ONOFF3, reg);
338 if (ret) {
339 puts("MAX8998 LDO setting error\n");
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000340 return;
Jaehoon Chung40195a22017-01-09 14:47:50 +0900341 }
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000342
Jaehoon Chung40195a22017-01-09 14:47:50 +0900343 reg = pmic_reg_read(dev, MAX8998_REG_ONOFF2);
344 reg |= MAX8998_LDO7;
345 ret = pmic_reg_write(dev, MAX8998_REG_ONOFF2, reg);
346 if (ret) {
347 puts("MAX8998 LDO setting error\n");
348 return;
349 }
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000350}
351
Ajay Kumar41022a12013-02-21 23:52:57 +0000352void exynos_cfg_ldo(void)
353{
354 ld9040_cfg_ldo();
355}
356
357void exynos_enable_ldo(unsigned int onoff)
358{
359 ld9040_enable_ldo(onoff);
360}
361
Piotr Wilczek0ada4ad2014-03-07 14:59:47 +0100362int exynos_init(void)
Piotr Wilczeke372b552012-10-19 05:34:03 +0000363{
Piotr Wilczeke372b552012-10-19 05:34:03 +0000364 gd->bd->bi_arch_number = MACH_TYPE_UNIVERSAL_C210;
Piotr Wilczek0ada4ad2014-03-07 14:59:47 +0100365
366 switch (get_hwrev()) {
367 case 0:
368 /*
369 * Set the low to enable LDO_EN
370 * But when you use the test board for eMMC booting
371 * you should set it HIGH since it removes the inverter
372 */
373 /* MASSMEMORY_EN: XMDMDATA_6: GPE3[6] */
Simon Glass4f83d3d2014-10-20 19:48:39 -0600374 gpio_request(EXYNOS4_GPIO_E36, "ldo_en");
Akshay Saraswat1376cdd2014-05-13 10:30:14 +0530375 gpio_direction_output(EXYNOS4_GPIO_E36, 0);
Piotr Wilczek0ada4ad2014-03-07 14:59:47 +0100376 break;
377 default:
378 /*
379 * Default reset state is High and there's no inverter
380 * But set it as HIGH to ensure
381 */
382 /* MASSMEMORY_EN: XMDMADDR_3: GPE1[3] */
Simon Glass4f83d3d2014-10-20 19:48:39 -0600383 gpio_request(EXYNOS4_GPIO_E13, "massmemory_en");
Akshay Saraswat1376cdd2014-05-13 10:30:14 +0530384 gpio_direction_output(EXYNOS4_GPIO_E13, 1);
Piotr Wilczek0ada4ad2014-03-07 14:59:47 +0100385 break;
386 }
Piotr Wilczeke372b552012-10-19 05:34:03 +0000387
Piotr Wilczeke372b552012-10-19 05:34:03 +0000388 check_hw_revision();
389 printf("HW Revision:\t0x%x\n", board_rev);
390
391 return 0;
392}
Przemyslaw Marczak283a3202014-01-22 11:24:12 +0100393
Simon Glassb4a967e2016-02-21 21:08:54 -0700394#ifdef CONFIG_LCD
Piotr Wilczek0ada4ad2014-03-07 14:59:47 +0100395void exynos_lcd_misc_init(vidinfo_t *vid)
Przemyslaw Marczak283a3202014-01-22 11:24:12 +0100396{
Piotr Wilczek0ada4ad2014-03-07 14:59:47 +0100397#ifdef CONFIG_TIZEN
398 get_tizen_logo_info(vid);
Przemyslaw Marczak283a3202014-01-22 11:24:12 +0100399#endif
Piotr Wilczek0ada4ad2014-03-07 14:59:47 +0100400
401 /* for LD9040. */
402 vid->pclk_name = 1; /* MPLL */
403 vid->sclk_div = 1;
404
Simon Glass6a38e412017-08-03 12:22:09 -0600405 env_set("lcdinfo", "lcd=ld9040");
Przemyslaw Marczak283a3202014-01-22 11:24:12 +0100406}
Simon Glassb4a967e2016-02-21 21:08:54 -0700407#endif