Blame - arch/arm/mach-zynqmp/Kconfig - filogic/uboot

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Siva Durga Prasad Paladugu	650fb40	2015-06-10 15:50:57 +0530	[diff] [blame]	1	if ARCH_ZYNQMP
				2
Tien Fong Chee	6fd0a71	2019-01-23 14:20:03 +0800	[diff] [blame]	3	config SPL_FS_FAT
Simon Glass	6172e2e	2016-09-12 23:18:38 -0600	[diff] [blame]	4	default y
				5
Simon Glass	f2a8946	2016-09-12 23:18:41 -0600	[diff] [blame]	6	config SPL_LIBCOMMON_SUPPORT
				7	default y
				8
Simon Glass	f6de257	2016-09-12 23:18:42 -0600	[diff] [blame]	9	config SPL_LIBDISK_SUPPORT
				10	default y
				11
Simon Glass	b16c92c	2016-09-12 23:18:43 -0600	[diff] [blame]	12	config SPL_LIBGENERIC_SUPPORT
				13	default y
				14
Simon Glass	b58bfe0	2021-08-08 12:20:09 -0600	[diff] [blame]	15	config SPL_MMC
Alexandru Gagniuc	d5a7599	2017-04-04 10:02:58 -0700	[diff] [blame]	16	default y if MMC_SDHCI_ZYNQ
Simon Glass	bd58f1d	2016-09-12 23:18:44 -0600	[diff] [blame]	17
Simon Glass	f4d6039	2021-08-08 12:20:12 -0600	[diff] [blame]	18	config SPL_SERIAL
Simon Glass	e076d6f	2016-09-12 23:18:56 -0600	[diff] [blame]	19	default y
				20
Simon Glass	219d612	2016-09-12 23:18:57 -0600	[diff] [blame]	21	config SPL_SPI_FLASH_SUPPORT
				22	default y if ZYNQ_QSPI
				23
Simon Glass	a582047	2021-08-08 12:20:14 -0600	[diff] [blame]	24	config SPL_SPI
Simon Glass	b24fdca	2016-09-12 23:18:58 -0600	[diff] [blame]	25	default y if ZYNQ_QSPI
				26
Michal Simek	04b7e62	2015-01-15 10:01:51 +0100	[diff] [blame]	27	config SYS_BOARD
Liam Beguin	dda9e21	2021-10-20 11:25:18 -0400	[diff] [blame]	28	string "Board name"
Michal Simek	04b7e62	2015-01-15 10:01:51 +0100	[diff] [blame]	29	default "zynqmp"
				30
				31	config SYS_VENDOR
Mike Looijmans	61d245c	2017-01-03 09:47:52 +0100	[diff] [blame]	32	string "Vendor name"
Michal Simek	04b7e62	2015-01-15 10:01:51 +0100	[diff] [blame]	33	default "xilinx"
				34
				35	config SYS_SOC
				36	default "zynqmp"
				37
				38	config SYS_CONFIG_NAME
Michal Simek	7b5413e	2016-03-18 18:21:36 +0100	[diff] [blame]	39	string "Board configuration name"
				40	default "xilinx_zynqmp"
				41	help
				42	This option contains information about board configuration name.
				43	Based on this option include/configs/<CONFIG_SYS_CONFIG_NAME>.h header
				44	will be used for board configuration.
Michal Simek	04b7e62	2015-01-15 10:01:51 +0100	[diff] [blame]	45
Siva Durga Prasad Paladugu	4628c50	2017-07-13 19:01:11 +0530	[diff] [blame]	46	config SYS_MEM_RSVD_FOR_MMU
				47	bool "Reserve memory for MMU Table"
				48	help
				49	If defined this option is used to setup different space for
				50	MMU table than the one which will be allocated during
				51	relocation.
				52
Mike Looijmans	96e706f	2016-09-20 11:37:24 +0200	[diff] [blame]	53	config BOOT_INIT_FILE
				54	string "boot.bin init register filename"
Michal Simek	5d35909	2016-12-16 13:00:26 +0100	[diff] [blame]	55	depends on SPL
Mike Looijmans	96e706f	2016-09-20 11:37:24 +0200	[diff] [blame]	56	default ""
				57	help
				58	Add register writes to boot.bin format (max 256 pairs).
				59	Expect a table of register-value pairs, e.g. "0x12345678 0x4321"
				60
Michal Simek	dde5a88	2016-10-21 12:58:17 +0200	[diff] [blame]	61	config PMUFW_INIT_FILE
				62	string "PMU firmware"
				63	depends on SPL
				64	default ""
				65	help
				66	Include external PMUFW (Platform Management Unit FirmWare) to
				67	a Xilinx bootable image (boot.bin).
				68
Luca Ceresoli	23e6500	2019-05-21 18:06:43 +0200	[diff] [blame]	69	config ZYNQMP_SPL_PM_CFG_OBJ_FILE
				70	string "PMU firmware configuration object to load at runtime by SPL"
				71	depends on SPL
				72	help
				73	Path to a binary PMU firmware configuration object to be linked
				74	into U-Boot SPL and loaded at runtime into the PMU firmware.
				75
				76	The ZynqMP Power Management Unit (PMU) needs a configuration
				77	object for most SoC peripherals to work. To have it loaded by
				78	U-Boot SPL set here the file name (absolute path or relative to
				79	the top source tree) of your configuration, which must be a
				80	binary blob. It will be linked in the SPL binary and loaded
				81	into the PMU firmware by U-Boot SPL during board
				82	initialization.
				83
				84	Leave this option empty if your PMU firmware has a hard-coded
				85	configuration object or you are loading it by any other means.
				86
Siva Durga Prasad Paladugu	ba1f68e	2015-08-04 13:03:26 +0530	[diff] [blame]	87	config ZYNQMP_USB
				88	bool "Configure ZynqMP USB"
				89
Siva Durga Prasad Paladugu	cafb631	2018-01-12 15:35:46 +0530	[diff] [blame]	90	config ZYNQMP_NO_DDR
				91	bool "Disable DDR MMU mapping"
				92	help
				93	This option configures MMU with no DDR to avoid speculative
				94	access to DDR memory where DDR is not present.
				95
Jorge Ramirez-Ortiz	3545696	2021-06-13 20:55:53 +0200	[diff] [blame]	96	config SPL_ZYNQMP_DRAM_ECC_INIT
				97	bool "Initialize DRAM ECC"
				98	depends on SPL
				99	help
				100	This option initializes all memory to 0xdeadbeef. Must be set if your
				101	memory is of ECC type.
				102
				103	config SPL_ZYNQMP_DRAM_BANK1_BASE
				104	depends on SPL_ZYNQMP_DRAM_ECC_INIT
				105	hex "DRAM Bank1 address"
				106	default 0x00000000
				107	help
				108	Start address of DRAM ECC bank1
				109
				110	config SPL_ZYNQMP_DRAM_BANK1_LEN
				111	depends on SPL_ZYNQMP_DRAM_ECC_INIT
				112	hex "DRAM Bank1 size"
				113	default 0x80000000
				114	help
				115	Size in bytes of the DRAM ECC bank1
				116
				117	config SPL_ZYNQMP_DRAM_BANK2_BASE
				118	depends on SPL_ZYNQMP_DRAM_ECC_INIT
				119	hex "DRAM Bank2 address"
				120	default 0x800000000
				121	help
				122	Start address of DRAM ECC bank2
				123
				124	config SPL_ZYNQMP_DRAM_BANK2_LEN
				125	depends on SPL_ZYNQMP_DRAM_ECC_INIT
				126	hex "DRAM Bank2 size"
				127	default 0x0
				128	help
				129	Size in bytes of the DRAM ECC bank2. A null size takes no action.
				130
Simon Glass	cb3e489	2016-07-05 17:10:13 -0600	[diff] [blame]	131	config SYS_MALLOC_F_LEN
				132	default 0x600
				133
Siva Durga Prasad Paladugu	9ed4e81	2017-07-13 19:01:10 +0530	[diff] [blame]	134	config DEFINE_TCM_OCM_MMAP
				135	bool "Define TCM and OCM memory in MMU Table"
Siva Durga Prasad Paladugu	c3dfac9	2017-08-01 16:24:50 +0530	[diff] [blame]	136	default y if MP
Siva Durga Prasad Paladugu	9ed4e81	2017-07-13 19:01:10 +0530	[diff] [blame]	137	help
				138	This option if enabled defines the TCM and OCM memory and its
				139	memory attributes in MMU table entry.
				140
Michal Simek	d821879	2017-07-12 13:21:27 +0200	[diff] [blame]	141	config ZYNQMP_PSU_INIT_ENABLED
				142	bool "Include psu_init"
				143	help
				144	Include psu_init to full u-boot. SPL include psu_init by default.
				145
Michal Simek	94ddcaa	2016-08-30 16:17:27 +0200	[diff] [blame]	146	config SPL_ZYNQMP_ALT_BOOTMODE_ENABLED
				147	bool "Overwrite SPL bootmode"
				148	depends on SPL
				149	help
				150	Overwrite bootmode selected via boot mode pins to tell SPL what should
				151	be the next boot device.
				152
Jorge Ramirez-Ortiz	34deca5	2021-10-13 15:48:00 +0200	[diff] [blame]	153	config SPL_ZYNQMP_RESTORE_JTAG
				154	bool "Restore JTAG"
				155	depends on SPL
				156	help
				157	Booting SPL in secure mode causes the CSU to disable the JTAG interface
				158	even if no eFuses were burnt. This option restores the interface if
				159	possible.
				160
Vipul Kumar	6254800	2018-02-28 15:53:28 +0530	[diff] [blame]	161	config ZYNQ_SDHCI_MAX_FREQ
				162	default 200000000
				163
Michal Simek	94ddcaa	2016-08-30 16:17:27 +0200	[diff] [blame]	164	config SPL_ZYNQMP_ALT_BOOTMODE
				165	hex
				166	default 0x0 if JTAG_MODE
				167	default 0x1 if QSPI_MODE_24BIT
				168	default 0x2 if QSPI_MODE_32BIT
				169	default 0x3 if SD_MODE
				170	default 0x4 if NAND_MODE
				171	default 0x5 if SD_MODE1
				172	default 0x6 if EMMC_MODE
				173	default 0x7 if USB_MODE
Michal Simek	2740d37	2016-10-26 09:24:32 +0200	[diff] [blame]	174	default 0xa if SW_USBHOST_MODE
				175	default 0xb if SW_SATA_MODE
Michal Simek	e1c4d39	2017-02-15 09:41:53 +0100	[diff] [blame]	176	default 0xe if SD1_LSHFT_MODE
Michal Simek	94ddcaa	2016-08-30 16:17:27 +0200	[diff] [blame]	177
				178	choice
				179	prompt "Boot mode"
Michal Simek	8ffddc3	2016-08-30 16:17:27 +0200	[diff] [blame]	180	depends on SPL_ZYNQMP_ALT_BOOTMODE_ENABLED
Ulf Magnusson	3e3b16a	2018-01-30 14:02:01 +0100	[diff] [blame]	181	default JTAG_MODE
Michal Simek	94ddcaa	2016-08-30 16:17:27 +0200	[diff] [blame]	182
				183	config JTAG_MODE
				184	bool "JTAG_MODE"
				185
				186	config QSPI_MODE_24BIT
				187	bool "QSPI_MODE_24BIT"
				188
				189	config QSPI_MODE_32BIT
				190	bool "QSPI_MODE_32BIT"
				191
				192	config SD_MODE
				193	bool "SD_MODE"
				194
				195	config SD_MODE1
				196	bool "SD_MODE1"
				197
				198	config NAND_MODE
				199	bool "NAND_MODE"
				200
				201	config EMMC_MODE
				202	bool "EMMC_MODE"
				203
				204	config USB_MODE
				205	bool "USB"
				206
Michal Simek	2740d37	2016-10-26 09:24:32 +0200	[diff] [blame]	207	config SW_USBHOST_MODE
				208	bool "SW USBHOST_MODE"
				209
				210	config SW_SATA_MODE
				211	bool "SW SATA_MODE"
				212
Michal Simek	e1c4d39	2017-02-15 09:41:53 +0100	[diff] [blame]	213	config SD1_LSHFT_MODE
				214	bool "SD1_LSHFT_MODE"
				215
Michal Simek	94ddcaa	2016-08-30 16:17:27 +0200	[diff] [blame]	216	endchoice
Simon Glass	cb3e489	2016-07-05 17:10:13 -0600	[diff] [blame]	217
Michal Simek	5f88485	2020-08-27 15:34:11 +0200	[diff] [blame]	218	source "board/xilinx/Kconfig"
				219	source "board/xilinx/zynqmp/Kconfig"
				220
Michal Simek	04b7e62	2015-01-15 10:01:51 +0100	[diff] [blame]	221	endif