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git01.mediatek.com / filogic / uboot / 90b5b3bb491621f557aae689a7c640bca5b995d2 / . / board / renesas / gose / qos.c
blob: 1c4ebfc6a8ad49f251d03ce55a6a900b10b575a7 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -0400[diff] [blame]1// SPDX-License-Identifier: GPL-2.0
Nobuhiro Iwamatsu7e405632014-11-06 15:39:28 +0900[diff] [blame]2/*
3 * board/renesas/gose/qos.c
4 * This file is gose QoS setting.
5 *
6 * Copyright (C) 2014 Renesas Electronics Corporation
Nobuhiro Iwamatsu7e405632014-11-06 15:39:28 +0900[diff] [blame]7 */
8
9#include <common.h>
10#include <asm/processor.h>
11#include <asm/mach-types.h>
12#include <asm/io.h>
13#include <asm/arch/rmobile.h>
14
Nobuhiro Iwamatsu7c112732015-10-10 05:58:28 +0900[diff] [blame]15#if defined(CONFIG_ARCH_RMOBILE_EXTRAM_BOOT)
Nobuhiro Iwamatsu36c11f62015-03-05 08:30:39 +0900[diff] [blame]16/* QoS version 0.311 */
Nobuhiro Iwamatsu7e405632014-11-06 15:39:28 +0900[diff] [blame]17enum {
18 DBSC3_00, DBSC3_01, DBSC3_02, DBSC3_03, DBSC3_04,
19 DBSC3_05, DBSC3_06, DBSC3_07, DBSC3_08, DBSC3_09,
20 DBSC3_10, DBSC3_11, DBSC3_12, DBSC3_13, DBSC3_14,
21 DBSC3_15,
22 DBSC3_NR,
23};
24
25static u32 dbsc3_0_r_qos_addr[DBSC3_NR] = {
26 [DBSC3_00] = DBSC3_0_QOS_R0_BASE,
27 [DBSC3_01] = DBSC3_0_QOS_R1_BASE,
28 [DBSC3_02] = DBSC3_0_QOS_R2_BASE,
29 [DBSC3_03] = DBSC3_0_QOS_R3_BASE,
30 [DBSC3_04] = DBSC3_0_QOS_R4_BASE,
31 [DBSC3_05] = DBSC3_0_QOS_R5_BASE,
32 [DBSC3_06] = DBSC3_0_QOS_R6_BASE,
33 [DBSC3_07] = DBSC3_0_QOS_R7_BASE,
34 [DBSC3_08] = DBSC3_0_QOS_R8_BASE,
35 [DBSC3_09] = DBSC3_0_QOS_R9_BASE,
36 [DBSC3_10] = DBSC3_0_QOS_R10_BASE,
37 [DBSC3_11] = DBSC3_0_QOS_R11_BASE,
38 [DBSC3_12] = DBSC3_0_QOS_R12_BASE,
39 [DBSC3_13] = DBSC3_0_QOS_R13_BASE,
40 [DBSC3_14] = DBSC3_0_QOS_R14_BASE,
41 [DBSC3_15] = DBSC3_0_QOS_R15_BASE,
42};
43
44static u32 dbsc3_0_w_qos_addr[DBSC3_NR] = {
45 [DBSC3_00] = DBSC3_0_QOS_W0_BASE,
46 [DBSC3_01] = DBSC3_0_QOS_W1_BASE,
47 [DBSC3_02] = DBSC3_0_QOS_W2_BASE,
48 [DBSC3_03] = DBSC3_0_QOS_W3_BASE,
49 [DBSC3_04] = DBSC3_0_QOS_W4_BASE,
50 [DBSC3_05] = DBSC3_0_QOS_W5_BASE,
51 [DBSC3_06] = DBSC3_0_QOS_W6_BASE,
52 [DBSC3_07] = DBSC3_0_QOS_W7_BASE,
53 [DBSC3_08] = DBSC3_0_QOS_W8_BASE,
54 [DBSC3_09] = DBSC3_0_QOS_W9_BASE,
55 [DBSC3_10] = DBSC3_0_QOS_W10_BASE,
56 [DBSC3_11] = DBSC3_0_QOS_W11_BASE,
57 [DBSC3_12] = DBSC3_0_QOS_W12_BASE,
58 [DBSC3_13] = DBSC3_0_QOS_W13_BASE,
59 [DBSC3_14] = DBSC3_0_QOS_W14_BASE,
60 [DBSC3_15] = DBSC3_0_QOS_W15_BASE,
61};
62
Nobuhiro Iwamatsu36c11f62015-03-05 08:30:39 +0900[diff] [blame]63#if defined(CONFIG_QOS_PRI_MEDIA)
64#define is_qos_pri_media() 1
65#else
66#define is_qos_pri_media() 0
67#endif
68
69#if defined(CONFIG_QOS_PRI_NORMAL)
70#define is_qos_pri_normal() 1
71#else
72#define is_qos_pri_normal() 0
73#endif
74
75#if defined(CONFIG_QOS_PRI_GFX)
76#define is_qos_pri_gfx() 1
77#else
78#define is_qos_pri_gfx() 0
79#endif
80
Nobuhiro Iwamatsu7e405632014-11-06 15:39:28 +0900[diff] [blame]81void qos_init(void)
82{
83 int i;
84 struct rcar_s3c *s3c;
85 struct rcar_s3c_qos *s3c_qos;
86 struct rcar_dbsc3_qos *qos_addr;
87 struct rcar_mxi *mxi;
88 struct rcar_mxi_qos *mxi_qos;
89 struct rcar_axi_qos *axi_qos;
90
91 /* DBSC DBADJ2 */
92 writel(0x20042004, DBSC3_0_DBADJ2);
93
94 /* S3C -QoS */
95 s3c = (struct rcar_s3c *)S3C_BASE;
96 writel(0x00000000, &s3c->s3cadsplcr);
Nobuhiro Iwamatsu36c11f62015-03-05 08:30:39 +0900[diff] [blame]97 if (is_qos_pri_media()) {
98 writel(0x1F0B0604, &s3c->s3crorr);
99 writel(0x1F0E0705, &s3c->s3cworr);
100 } else if (is_qos_pri_normal()) {
101 writel(0x1F0B0908, &s3c->s3crorr);
102 writel(0x1F0C0A08, &s3c->s3cworr);
103 } else if (is_qos_pri_gfx()) {
104 writel(0x1F0B0B0B, &s3c->s3crorr);
105 writel(0x1F0E0C0C, &s3c->s3cworr);
106 }
Nobuhiro Iwamatsu7e405632014-11-06 15:39:28 +0900[diff] [blame]107 /* QoS Control Registers */
108 s3c_qos = (struct rcar_s3c_qos *)S3C_QOS_CCI0_BASE;
109 writel(0x00890089, &s3c_qos->s3cqos0);
110 writel(0x20960010, &s3c_qos->s3cqos1);
111 writel(0x20302030, &s3c_qos->s3cqos2);
Nobuhiro Iwamatsu36c11f62015-03-05 08:30:39 +0900[diff] [blame]112 if (is_qos_pri_media())
113 writel(0x20AA2300, &s3c_qos->s3cqos3);
114 else if (is_qos_pri_normal())
115 writel(0x20AA2200, &s3c_qos->s3cqos3);
116 else if (is_qos_pri_gfx())
117 writel(0x20AA2100, &s3c_qos->s3cqos3);
Nobuhiro Iwamatsu7e405632014-11-06 15:39:28 +0900[diff] [blame]118 writel(0x00002032, &s3c_qos->s3cqos4);
119 writel(0x20960010, &s3c_qos->s3cqos5);
120 writel(0x20302030, &s3c_qos->s3cqos6);
Nobuhiro Iwamatsu36c11f62015-03-05 08:30:39 +0900[diff] [blame]121 if (is_qos_pri_media())
122 writel(0x20AA2300, &s3c_qos->s3cqos7);
123 else if (is_qos_pri_normal())
124 writel(0x20AA2200, &s3c_qos->s3cqos7);
125 else if (is_qos_pri_gfx())
126 writel(0x20AA2100, &s3c_qos->s3cqos7);
Nobuhiro Iwamatsu7e405632014-11-06 15:39:28 +0900[diff] [blame]127 writel(0x00002032, &s3c_qos->s3cqos8);
128
129 s3c_qos = (struct rcar_s3c_qos *)S3C_QOS_CCI1_BASE;
130 writel(0x00890089, &s3c_qos->s3cqos0);
131 writel(0x20960010, &s3c_qos->s3cqos1);
132 writel(0x20302030, &s3c_qos->s3cqos2);
Nobuhiro Iwamatsu36c11f62015-03-05 08:30:39 +0900[diff] [blame]133 if (is_qos_pri_media())
134 writel(0x20AA2300, &s3c_qos->s3cqos3);
135 else if (is_qos_pri_normal())
136 writel(0x20AA2200, &s3c_qos->s3cqos3);
137 else if (is_qos_pri_gfx())
138 writel(0x20AA2100, &s3c_qos->s3cqos3);
Nobuhiro Iwamatsu7e405632014-11-06 15:39:28 +0900[diff] [blame]139 writel(0x00002032, &s3c_qos->s3cqos4);
140 writel(0x20960010, &s3c_qos->s3cqos5);
141 writel(0x20302030, &s3c_qos->s3cqos6);
Nobuhiro Iwamatsu36c11f62015-03-05 08:30:39 +0900[diff] [blame]142 if (is_qos_pri_media())
143 writel(0x20AA2300, &s3c_qos->s3cqos7);
144 else if (is_qos_pri_normal())
145 writel(0x20AA2200, &s3c_qos->s3cqos7);
146 else if (is_qos_pri_gfx())
147 writel(0x20AA2100, &s3c_qos->s3cqos7);
148 writel(0x00002032, &s3c_qos->s3cqos4);
Nobuhiro Iwamatsu7e405632014-11-06 15:39:28 +0900[diff] [blame]149 writel(0x00002032, &s3c_qos->s3cqos8);
150
151 s3c_qos = (struct rcar_s3c_qos *)S3C_QOS_MXI_BASE;
Nobuhiro Iwamatsu36c11f62015-03-05 08:30:39 +0900[diff] [blame]152 writel(0x00820092, &s3c_qos->s3cqos0);
Nobuhiro Iwamatsu7e405632014-11-06 15:39:28 +0900[diff] [blame]153 writel(0x20960020, &s3c_qos->s3cqos1);
154 writel(0x20302030, &s3c_qos->s3cqos2);
155 writel(0x20AA20DC, &s3c_qos->s3cqos3);
156 writel(0x00002032, &s3c_qos->s3cqos4);
157 writel(0x20960020, &s3c_qos->s3cqos5);
158 writel(0x20302030, &s3c_qos->s3cqos6);
159 writel(0x20AA20DC, &s3c_qos->s3cqos7);
160 writel(0x00002032, &s3c_qos->s3cqos8);
161
162 s3c_qos = (struct rcar_s3c_qos *)S3C_QOS_AXI_BASE;
Nobuhiro Iwamatsu36c11f62015-03-05 08:30:39 +0900[diff] [blame]163 writel(0x00820092, &s3c_qos->s3cqos0);
Nobuhiro Iwamatsu7e405632014-11-06 15:39:28 +0900[diff] [blame]164 writel(0x20960020, &s3c_qos->s3cqos1);
165 writel(0x20302030, &s3c_qos->s3cqos2);
166 writel(0x20AA20FA, &s3c_qos->s3cqos3);
167 writel(0x00002032, &s3c_qos->s3cqos4);
168 writel(0x20960020, &s3c_qos->s3cqos5);
169 writel(0x20302030, &s3c_qos->s3cqos6);
170 writel(0x20AA20FA, &s3c_qos->s3cqos7);
171 writel(0x00002032, &s3c_qos->s3cqos8);
172
173 /* DBSC -QoS */
174 /* DBSC0 - Read */
175 for (i = DBSC3_00; i < DBSC3_NR; i++) {
176 qos_addr = (struct rcar_dbsc3_qos *)dbsc3_0_r_qos_addr[i];
177 writel(0x00000002, &qos_addr->dblgcnt);
178 writel(0x00002096, &qos_addr->dbtmval0);
179 writel(0x00002064, &qos_addr->dbtmval1);
180 writel(0x00002032, &qos_addr->dbtmval2);
181 writel(0x00001FB0, &qos_addr->dbtmval3);
182 writel(0x00000001, &qos_addr->dbrqctr);
183 writel(0x00002078, &qos_addr->dbthres0);
184 writel(0x0000204B, &qos_addr->dbthres1);
185 writel(0x0000201E, &qos_addr->dbthres2);
186 writel(0x00000001, &qos_addr->dblgqon);
187 }
188
189 /* DBSC0 - Write */
190 for (i = DBSC3_00; i < DBSC3_NR; i++) {
191 qos_addr = (struct rcar_dbsc3_qos *)dbsc3_0_w_qos_addr[i];
192 writel(0x00000002, &qos_addr->dblgcnt);
193 writel(0x00002096, &qos_addr->dbtmval0);
194 writel(0x00002064, &qos_addr->dbtmval1);
195 writel(0x00002050, &qos_addr->dbtmval2);
196 writel(0x0000203A, &qos_addr->dbtmval3);
197 writel(0x00000001, &qos_addr->dbrqctr);
198 writel(0x00002078, &qos_addr->dbthres0);
199 writel(0x0000204B, &qos_addr->dbthres1);
200 writel(0x0000203C, &qos_addr->dbthres2);
201 writel(0x00000001, &qos_addr->dblgqon);
202 }
203
204 /* CCI-400 -QoS */
205 writel(0x20001000, CCI_400_MAXOT_1);
206 writel(0x20001000, CCI_400_MAXOT_2);
207 writel(0x0000000C, CCI_400_QOSCNTL_1);
208 writel(0x0000000C, CCI_400_QOSCNTL_2);
209
210 /* MXI -QoS */
211 /* Transaction Control (MXI) */
212 mxi = (struct rcar_mxi *)MXI_BASE;
213 writel(0x00000013, &mxi->mxrtcr);
Nobuhiro Iwamatsu36c11f62015-03-05 08:30:39 +0900[diff] [blame]214 writel(0x00000016, &mxi->mxwtcr);
Nobuhiro Iwamatsu7e405632014-11-06 15:39:28 +0900[diff] [blame]215 writel(0x00200000, &mxi->mxs3cracr);
216 writel(0x00200000, &mxi->mxs3cwacr);
217 writel(0x00200000, &mxi->mxaxiracr);
218 writel(0x00200000, &mxi->mxaxiwacr);
Nobuhiro Iwamatsu36c11f62015-03-05 08:30:39 +0900[diff] [blame]219 writel(0x00780080, &mxi->mxsaar0);
220 writel(0x02000800, &mxi->mxsaar1);
Nobuhiro Iwamatsu7e405632014-11-06 15:39:28 +0900[diff] [blame]221
222 /* QoS Control (MXI) */
223 mxi_qos = (struct rcar_mxi_qos *)MXI_QOS_BASE;
224 writel(0x0000000C, &mxi_qos->vspdu0);
225 writel(0x0000000C, &mxi_qos->vspdu1);
226 writel(0x0000000E, &mxi_qos->du0);
227
228 /* AXI -QoS */
229 /* Transaction Control (MXI) */
230 axi_qos = (struct rcar_axi_qos *)SYS_AXI_SYX64TO128_BASE;
231 writel(0x00000002, &axi_qos->qosconf);
232 writel(0x00002245, &axi_qos->qosctset0);
233 writel(0x00002096, &axi_qos->qosctset1);
234 writel(0x00002030, &axi_qos->qosctset2);
235 writel(0x00002030, &axi_qos->qosctset3);
236 writel(0x00000001, &axi_qos->qosreqctr);
237 writel(0x00002064, &axi_qos->qosthres0);
238 writel(0x00002004, &axi_qos->qosthres1);
239 writel(0x00000000, &axi_qos->qosthres2);
240 writel(0x00000001, &axi_qos->qosqon);
241
242 axi_qos = (struct rcar_axi_qos *)SYS_AXI_AVB_BASE;
243 writel(0x00000000, &axi_qos->qosconf);
244 writel(0x000020A6, &axi_qos->qosctset0);
245 writel(0x00000001, &axi_qos->qosreqctr);
246 writel(0x00002064, &axi_qos->qosthres0);
247 writel(0x00002004, &axi_qos->qosthres1);
248 writel(0x00000000, &axi_qos->qosthres2);
249 writel(0x00000001, &axi_qos->qosqon);
250
251 axi_qos = (struct rcar_axi_qos *)SYS_AXI_G2D_BASE;
252 writel(0x00000000, &axi_qos->qosconf);
253 writel(0x000020A6, &axi_qos->qosctset0);
254 writel(0x00000001, &axi_qos->qosreqctr);
255 writel(0x00002064, &axi_qos->qosthres0);
256 writel(0x00002004, &axi_qos->qosthres1);
257 writel(0x00000000, &axi_qos->qosthres2);
258 writel(0x00000001, &axi_qos->qosqon);
259
260 axi_qos = (struct rcar_axi_qos *)SYS_AXI_IMP0_BASE;
261 writel(0x00000000, &axi_qos->qosconf);
262 writel(0x00002021, &axi_qos->qosctset0);
263 writel(0x00000001, &axi_qos->qosreqctr);
264 writel(0x00002064, &axi_qos->qosthres0);
265 writel(0x00002004, &axi_qos->qosthres1);
266 writel(0x00000000, &axi_qos->qosthres2);
267 writel(0x00000001, &axi_qos->qosqon);
268
269 axi_qos = (struct rcar_axi_qos *)SYS_AXI_IMP1_BASE;
270 writel(0x00000000, &axi_qos->qosconf);
271 writel(0x00002037, &axi_qos->qosctset0);
272 writel(0x00000001, &axi_qos->qosreqctr);
273 writel(0x00002064, &axi_qos->qosthres0);
274 writel(0x00002004, &axi_qos->qosthres1);
275 writel(0x00000000, &axi_qos->qosthres2);
276 writel(0x00000001, &axi_qos->qosqon);
277
278 axi_qos = (struct rcar_axi_qos *)SYS_AXI_IMUX0_BASE;
279 writel(0x00000002, &axi_qos->qosconf);
280 writel(0x00002245, &axi_qos->qosctset0);
281 writel(0x00002096, &axi_qos->qosctset1);
282 writel(0x00002030, &axi_qos->qosctset2);
283 writel(0x00002030, &axi_qos->qosctset3);
284 writel(0x00000001, &axi_qos->qosreqctr);
285 writel(0x00002064, &axi_qos->qosthres0);
286 writel(0x00002004, &axi_qos->qosthres1);
287 writel(0x00000000, &axi_qos->qosthres2);
288 writel(0x00000001, &axi_qos->qosqon);
289
290 axi_qos = (struct rcar_axi_qos *)SYS_AXI_IMUX1_BASE;
291 writel(0x00000002, &axi_qos->qosconf);
292 writel(0x00002245, &axi_qos->qosctset0);
293 writel(0x00002096, &axi_qos->qosctset1);
294 writel(0x00002030, &axi_qos->qosctset2);
295 writel(0x00002030, &axi_qos->qosctset3);
296 writel(0x00000001, &axi_qos->qosreqctr);
297 writel(0x00002064, &axi_qos->qosthres0);
298 writel(0x00002004, &axi_qos->qosthres1);
299 writel(0x00000000, &axi_qos->qosthres2);
300 writel(0x00000001, &axi_qos->qosqon);
301
302 axi_qos = (struct rcar_axi_qos *)SYS_AXI_IMUX2_BASE;
303 writel(0x00000002, &axi_qos->qosconf);
304 writel(0x00002245, &axi_qos->qosctset0);
305 writel(0x00002096, &axi_qos->qosctset1);
306 writel(0x00002030, &axi_qos->qosctset2);
307 writel(0x00002030, &axi_qos->qosctset3);
308 writel(0x00000001, &axi_qos->qosreqctr);
309 writel(0x00002064, &axi_qos->qosthres0);
310 writel(0x00002004, &axi_qos->qosthres1);
311 writel(0x00000000, &axi_qos->qosthres2);
312 writel(0x00000001, &axi_qos->qosqon);
313
314 axi_qos = (struct rcar_axi_qos *)SYS_AXI_LBS_BASE;
315 writel(0x00000000, &axi_qos->qosconf);
316 writel(0x0000214C, &axi_qos->qosctset0);
317 writel(0x00000001, &axi_qos->qosreqctr);
318 writel(0x00002064, &axi_qos->qosthres0);
319 writel(0x00002004, &axi_qos->qosthres1);
320 writel(0x00000000, &axi_qos->qosthres2);
321 writel(0x00000001, &axi_qos->qosqon);
322
323 axi_qos = (struct rcar_axi_qos *)SYS_AXI_MMUDS_BASE;
324 writel(0x00000001, &axi_qos->qosconf);
325 writel(0x00002004, &axi_qos->qosctset0);
326 writel(0x00002096, &axi_qos->qosctset1);
327 writel(0x00002030, &axi_qos->qosctset2);
328 writel(0x00002030, &axi_qos->qosctset3);
329 writel(0x00000001, &axi_qos->qosreqctr);
330 writel(0x00002064, &axi_qos->qosthres0);
331 writel(0x00002004, &axi_qos->qosthres1);
332 writel(0x00000000, &axi_qos->qosthres2);
333 writel(0x00000001, &axi_qos->qosqon);
334
335 axi_qos = (struct rcar_axi_qos *)SYS_AXI_MMUM_BASE;
336 writel(0x00000001, &axi_qos->qosconf);
337 writel(0x00002004, &axi_qos->qosctset0);
338 writel(0x00002096, &axi_qos->qosctset1);
339 writel(0x00002030, &axi_qos->qosctset2);
340 writel(0x00002030, &axi_qos->qosctset3);
341 writel(0x00000001, &axi_qos->qosreqctr);
342 writel(0x00002064, &axi_qos->qosthres0);
343 writel(0x00002004, &axi_qos->qosthres1);
344 writel(0x00000000, &axi_qos->qosthres2);
345 writel(0x00000001, &axi_qos->qosqon);
346
347 axi_qos = (struct rcar_axi_qos *)SYS_AXI_MMUR_BASE;
348 writel(0x00000001, &axi_qos->qosconf);
349 writel(0x00002004, &axi_qos->qosctset0);
350 writel(0x00002096, &axi_qos->qosctset1);
351 writel(0x00002030, &axi_qos->qosctset2);
352 writel(0x00002030, &axi_qos->qosctset3);
353 writel(0x00000001, &axi_qos->qosreqctr);
354 writel(0x00002064, &axi_qos->qosthres0);
355 writel(0x00002004, &axi_qos->qosthres1);
356 writel(0x00000000, &axi_qos->qosthres2);
357 writel(0x00000001, &axi_qos->qosqon);
358
359 axi_qos = (struct rcar_axi_qos *)SYS_AXI_MMUS0_BASE;
360 writel(0x00000001, &axi_qos->qosconf);
361 writel(0x00002004, &axi_qos->qosctset0);
362 writel(0x00002096, &axi_qos->qosctset1);
363 writel(0x00002030, &axi_qos->qosctset2);
364 writel(0x00002030, &axi_qos->qosctset3);
365 writel(0x00000001, &axi_qos->qosreqctr);
366 writel(0x00002064, &axi_qos->qosthres0);
367 writel(0x00002004, &axi_qos->qosthres1);
368 writel(0x00000000, &axi_qos->qosthres2);
369 writel(0x00000001, &axi_qos->qosqon);
370
371 axi_qos = (struct rcar_axi_qos *)SYS_AXI_MMUS1_BASE;
372 writel(0x00000001, &axi_qos->qosconf);
373 writel(0x00002004, &axi_qos->qosctset0);
374 writel(0x00002096, &axi_qos->qosctset1);
375 writel(0x00002030, &axi_qos->qosctset2);
376 writel(0x00002030, &axi_qos->qosctset3);
377 writel(0x00000001, &axi_qos->qosreqctr);
378 writel(0x00002064, &axi_qos->qosthres0);
379 writel(0x00002004, &axi_qos->qosthres1);
380 writel(0x00000000, &axi_qos->qosthres2);
381 writel(0x00000001, &axi_qos->qosqon);
382
383 axi_qos = (struct rcar_axi_qos *)SYS_AXI_MTSB0_BASE;
384 writel(0x00000000, &axi_qos->qosconf);
385 writel(0x00002021, &axi_qos->qosctset0);
386 writel(0x00000001, &axi_qos->qosreqctr);
387 writel(0x00002064, &axi_qos->qosthres0);
388 writel(0x00002004, &axi_qos->qosthres1);
389 writel(0x00000000, &axi_qos->qosthres2);
390 writel(0x00000001, &axi_qos->qosqon);
391
392 axi_qos = (struct rcar_axi_qos *)SYS_AXI_MTSB1_BASE;
393 writel(0x00000000, &axi_qos->qosconf);
394 writel(0x00002021, &axi_qos->qosctset0);
395 writel(0x00000001, &axi_qos->qosreqctr);
396 writel(0x00002064, &axi_qos->qosthres0);
397 writel(0x00002004, &axi_qos->qosthres1);
398 writel(0x00000000, &axi_qos->qosthres2);
399 writel(0x00000001, &axi_qos->qosqon);
400
401 axi_qos = (struct rcar_axi_qos *)SYS_AXI_PCI_BASE;
402 writel(0x00000000, &axi_qos->qosconf);
403 writel(0x0000214C, &axi_qos->qosctset0);
404 writel(0x00000001, &axi_qos->qosreqctr);
405 writel(0x00002064, &axi_qos->qosthres0);
406 writel(0x00002004, &axi_qos->qosthres1);
407 writel(0x00000000, &axi_qos->qosthres2);
408 writel(0x00000001, &axi_qos->qosqon);
409
410 axi_qos = (struct rcar_axi_qos *)SYS_AXI_RTX_BASE;
411 writel(0x00000002, &axi_qos->qosconf);
412 writel(0x00002245, &axi_qos->qosctset0);
413 writel(0x00002096, &axi_qos->qosctset1);
414 writel(0x00002030, &axi_qos->qosctset2);
415 writel(0x00002030, &axi_qos->qosctset3);
416 writel(0x00000001, &axi_qos->qosreqctr);
417 writel(0x00002064, &axi_qos->qosthres0);
418 writel(0x00002004, &axi_qos->qosthres1);
419 writel(0x00000000, &axi_qos->qosthres2);
420 writel(0x00000001, &axi_qos->qosqon);
421
422 axi_qos = (struct rcar_axi_qos *)SYS_AXI_SDS0_BASE;
423 writel(0x00000000, &axi_qos->qosconf);
424 writel(0x000020A6, &axi_qos->qosctset0);
425 writel(0x00000001, &axi_qos->qosreqctr);
426 writel(0x00002064, &axi_qos->qosthres0);
427 writel(0x00002004, &axi_qos->qosthres1);
428 writel(0x00000000, &axi_qos->qosthres2);
429 writel(0x00000001, &axi_qos->qosqon);
430
431 axi_qos = (struct rcar_axi_qos *)SYS_AXI_SDS1_BASE;
432 writel(0x00000000, &axi_qos->qosconf);
433 writel(0x000020A6, &axi_qos->qosctset0);
434 writel(0x00000001, &axi_qos->qosreqctr);
435 writel(0x00002064, &axi_qos->qosthres0);
436 writel(0x00002004, &axi_qos->qosthres1);
437 writel(0x00000000, &axi_qos->qosthres2);
438 writel(0x00000001, &axi_qos->qosqon);
439
440 axi_qos = (struct rcar_axi_qos *)SYS_AXI_USB20_BASE;
441 writel(0x00000000, &axi_qos->qosconf);
442 writel(0x00002053, &axi_qos->qosctset0);
443 writel(0x00000001, &axi_qos->qosreqctr);
444 writel(0x00002064, &axi_qos->qosthres0);
445 writel(0x00002004, &axi_qos->qosthres1);
446 writel(0x00000000, &axi_qos->qosthres2);
447 writel(0x00000001, &axi_qos->qosqon);
448
449 axi_qos = (struct rcar_axi_qos *)SYS_AXI_USB21_BASE;
450 writel(0x00000000, &axi_qos->qosconf);
451 writel(0x00002053, &axi_qos->qosctset0);
452 writel(0x00000001, &axi_qos->qosreqctr);
453 writel(0x00002064, &axi_qos->qosthres0);
454 writel(0x00002004, &axi_qos->qosthres1);
455 writel(0x00000000, &axi_qos->qosthres2);
456 writel(0x00000001, &axi_qos->qosqon);
457
458 axi_qos = (struct rcar_axi_qos *)SYS_AXI_USB22_BASE;
459 writel(0x00000000, &axi_qos->qosconf);
460 writel(0x00002053, &axi_qos->qosctset0);
461 writel(0x00000001, &axi_qos->qosreqctr);
462 writel(0x00002064, &axi_qos->qosthres0);
463 writel(0x00002004, &axi_qos->qosthres1);
464 writel(0x00000000, &axi_qos->qosthres2);
465 writel(0x00000001, &axi_qos->qosqon);
466
467 axi_qos = (struct rcar_axi_qos *)SYS_AXI_USB30_BASE;
468 writel(0x00000000, &axi_qos->qosconf);
469 writel(0x0000214C, &axi_qos->qosctset0);
470 writel(0x00000001, &axi_qos->qosreqctr);
471 writel(0x00002064, &axi_qos->qosthres0);
472 writel(0x00002004, &axi_qos->qosthres1);
473 writel(0x00000000, &axi_qos->qosthres2);
474 writel(0x00000001, &axi_qos->qosqon);
475
476 axi_qos = (struct rcar_axi_qos *)SYS_AXI_AX2M_BASE;
477 writel(0x00000002, &axi_qos->qosconf);
478 writel(0x00002245, &axi_qos->qosctset0);
479 writel(0x00000001, &axi_qos->qosreqctr);
480 writel(0x00002064, &axi_qos->qosthres0);
481 writel(0x00002004, &axi_qos->qosthres1);
482 writel(0x00000000, &axi_qos->qosthres2);
483 writel(0x00000001, &axi_qos->qosqon);
484
485 axi_qos = (struct rcar_axi_qos *)SYS_AXI_CC50_BASE;
486 writel(0x00000000, &axi_qos->qosconf);
487 writel(0x00002029, &axi_qos->qosctset0);
488 writel(0x00000001, &axi_qos->qosreqctr);
489 writel(0x00002064, &axi_qos->qosthres0);
490 writel(0x00002004, &axi_qos->qosthres1);
491 writel(0x00000000, &axi_qos->qosthres2);
492 writel(0x00000001, &axi_qos->qosqon);
493
494 axi_qos = (struct rcar_axi_qos *)SYS_AXI_CCI_BASE;
495 writel(0x00000002, &axi_qos->qosconf);
496 writel(0x00002245, &axi_qos->qosctset0);
497 writel(0x00000001, &axi_qos->qosreqctr);
498 writel(0x00002064, &axi_qos->qosthres0);
499 writel(0x00002004, &axi_qos->qosthres1);
500 writel(0x00000000, &axi_qos->qosthres2);
501 writel(0x00000001, &axi_qos->qosqon);
502
503 axi_qos = (struct rcar_axi_qos *)SYS_AXI_CS_BASE;
504 writel(0x00000000, &axi_qos->qosconf);
505 writel(0x00002053, &axi_qos->qosctset0);
506 writel(0x00000001, &axi_qos->qosreqctr);
507 writel(0x00002064, &axi_qos->qosthres0);
508 writel(0x00002004, &axi_qos->qosthres1);
509 writel(0x00000000, &axi_qos->qosthres2);
510 writel(0x00000001, &axi_qos->qosqon);
511
512 axi_qos = (struct rcar_axi_qos *)SYS_AXI_DDM_BASE;
513 writel(0x00000000, &axi_qos->qosconf);
514 writel(0x000020A6, &axi_qos->qosctset0);
515 writel(0x00000001, &axi_qos->qosreqctr);
516 writel(0x00002064, &axi_qos->qosthres0);
517 writel(0x00002004, &axi_qos->qosthres1);
518 writel(0x00000000, &axi_qos->qosthres2);
519 writel(0x00000001, &axi_qos->qosqon);
520
521 axi_qos = (struct rcar_axi_qos *)SYS_AXI_ETH_BASE;
522 writel(0x00000000, &axi_qos->qosconf);
523 writel(0x00002053, &axi_qos->qosctset0);
524 writel(0x00000001, &axi_qos->qosreqctr);
525 writel(0x00002064, &axi_qos->qosthres0);
526 writel(0x00002004, &axi_qos->qosthres1);
527 writel(0x00000000, &axi_qos->qosthres2);
528 writel(0x00000001, &axi_qos->qosqon);
529
530 axi_qos = (struct rcar_axi_qos *)SYS_AXI_MPXM_BASE;
531 writel(0x00000002, &axi_qos->qosconf);
532 writel(0x00002245, &axi_qos->qosctset0);
533 writel(0x00000001, &axi_qos->qosreqctr);
534 writel(0x00002064, &axi_qos->qosthres0);
535 writel(0x00002004, &axi_qos->qosthres1);
536 writel(0x00000000, &axi_qos->qosthres2);
537 writel(0x00000001, &axi_qos->qosqon);
538
539 axi_qos = (struct rcar_axi_qos *)SYS_AXI_SAT0_BASE;
540 writel(0x00000000, &axi_qos->qosconf);
541 writel(0x00002053, &axi_qos->qosctset0);
542 writel(0x00000001, &axi_qos->qosreqctr);
543 writel(0x00002064, &axi_qos->qosthres0);
544 writel(0x00002004, &axi_qos->qosthres1);
545 writel(0x00000000, &axi_qos->qosthres2);
546 writel(0x00000001, &axi_qos->qosqon);
547
548 axi_qos = (struct rcar_axi_qos *)SYS_AXI_SAT1_BASE;
549 writel(0x00000000, &axi_qos->qosconf);
550 writel(0x00002053, &axi_qos->qosctset0);
551 writel(0x00000001, &axi_qos->qosreqctr);
552 writel(0x00002064, &axi_qos->qosthres0);
553 writel(0x00002004, &axi_qos->qosthres1);
554 writel(0x00000000, &axi_qos->qosthres2);
555 writel(0x00000001, &axi_qos->qosqon);
556
557 axi_qos = (struct rcar_axi_qos *)SYS_AXI_SDM0_BASE;
558 writel(0x00000000, &axi_qos->qosconf);
559 writel(0x0000214C, &axi_qos->qosctset0);
560 writel(0x00000001, &axi_qos->qosreqctr);
561 writel(0x00002064, &axi_qos->qosthres0);
562 writel(0x00002004, &axi_qos->qosthres1);
563 writel(0x00000000, &axi_qos->qosthres2);
564 writel(0x00000001, &axi_qos->qosqon);
565
566 axi_qos = (struct rcar_axi_qos *)SYS_AXI_SDM1_BASE;
567 writel(0x00000000, &axi_qos->qosconf);
568 writel(0x0000214C, &axi_qos->qosctset0);
569 writel(0x00000001, &axi_qos->qosreqctr);
570 writel(0x00002064, &axi_qos->qosthres0);
571 writel(0x00002004, &axi_qos->qosthres1);
572 writel(0x00000000, &axi_qos->qosthres2);
573 writel(0x00000001, &axi_qos->qosqon);
574
575 axi_qos = (struct rcar_axi_qos *)SYS_AXI_TRAB_BASE;
576 writel(0x00000000, &axi_qos->qosconf);
577 writel(0x000020A6, &axi_qos->qosctset0);
578 writel(0x00000001, &axi_qos->qosreqctr);
579 writel(0x00002064, &axi_qos->qosthres0);
580 writel(0x00002004, &axi_qos->qosthres1);
581 writel(0x00000000, &axi_qos->qosthres2);
582 writel(0x00000001, &axi_qos->qosqon);
583
584 axi_qos = (struct rcar_axi_qos *)SYS_AXI_UDM0_BASE;
585 writel(0x00000000, &axi_qos->qosconf);
586 writel(0x00002053, &axi_qos->qosctset0);
587 writel(0x00000001, &axi_qos->qosreqctr);
588 writel(0x00002064, &axi_qos->qosthres0);
589 writel(0x00002004, &axi_qos->qosthres1);
590 writel(0x00000000, &axi_qos->qosthres2);
591 writel(0x00000001, &axi_qos->qosqon);
592
593 axi_qos = (struct rcar_axi_qos *)SYS_AXI_UDM1_BASE;
594 writel(0x00000000, &axi_qos->qosconf);
595 writel(0x00002053, &axi_qos->qosctset0);
596 writel(0x00000001, &axi_qos->qosreqctr);
597 writel(0x00002064, &axi_qos->qosthres0);
598 writel(0x00002004, &axi_qos->qosthres1);
599 writel(0x00000000, &axi_qos->qosthres2);
600 writel(0x00000001, &axi_qos->qosqon);
601
602 /* QoS Register (RT-AXI) */
603 axi_qos = (struct rcar_axi_qos *)RT_AXI_SHX_BASE;
Nobuhiro Iwamatsu36c11f62015-03-05 08:30:39 +0900[diff] [blame]604 writel(0x00000001, &axi_qos->qosconf);
Nobuhiro Iwamatsu7e405632014-11-06 15:39:28 +0900[diff] [blame]605 writel(0x00002053, &axi_qos->qosctset0);
606 writel(0x00002096, &axi_qos->qosctset1);
607 writel(0x00002030, &axi_qos->qosctset2);
608 writel(0x00002030, &axi_qos->qosctset3);
609 writel(0x00000001, &axi_qos->qosreqctr);
610 writel(0x00002064, &axi_qos->qosthres0);
611 writel(0x00002004, &axi_qos->qosthres1);
612 writel(0x00000000, &axi_qos->qosthres2);
613 writel(0x00000001, &axi_qos->qosqon);
614
615 axi_qos = (struct rcar_axi_qos *)RT_AXI_DBG_BASE;
616 writel(0x00000000, &axi_qos->qosconf);
617 writel(0x00002053, &axi_qos->qosctset0);
618 writel(0x00002096, &axi_qos->qosctset1);
619 writel(0x00002030, &axi_qos->qosctset2);
620 writel(0x00002030, &axi_qos->qosctset3);
621 writel(0x00000001, &axi_qos->qosreqctr);
622 writel(0x00002064, &axi_qos->qosthres0);
623 writel(0x00002004, &axi_qos->qosthres1);
624 writel(0x00000000, &axi_qos->qosthres2);
625 writel(0x00000001, &axi_qos->qosqon);
626
627 axi_qos = (struct rcar_axi_qos *)RT_AXI_RDM_BASE;
628 writel(0x00000000, &axi_qos->qosconf);
629 writel(0x00002299, &axi_qos->qosctset0);
630 writel(0x00000001, &axi_qos->qosreqctr);
631 writel(0x00002064, &axi_qos->qosthres0);
632 writel(0x00002004, &axi_qos->qosthres1);
633 writel(0x00000000, &axi_qos->qosthres2);
634 writel(0x00000001, &axi_qos->qosqon);
635
636 axi_qos = (struct rcar_axi_qos *)RT_AXI_RDS_BASE;
637 writel(0x00000000, &axi_qos->qosconf);
638 writel(0x00002029, &axi_qos->qosctset0);
639 writel(0x00000001, &axi_qos->qosreqctr);
640 writel(0x00002064, &axi_qos->qosthres0);
641 writel(0x00002004, &axi_qos->qosthres1);
642 writel(0x00000000, &axi_qos->qosthres2);
643 writel(0x00000001, &axi_qos->qosqon);
644
645 axi_qos = (struct rcar_axi_qos *)RT_AXI_RTX64TO128_BASE;
646 writel(0x00000002, &axi_qos->qosconf);
647 writel(0x00002245, &axi_qos->qosctset0);
648 writel(0x00002096, &axi_qos->qosctset1);
649 writel(0x00002030, &axi_qos->qosctset2);
650 writel(0x00002030, &axi_qos->qosctset3);
651 writel(0x00000001, &axi_qos->qosreqctr);
652 writel(0x00002064, &axi_qos->qosthres0);
653 writel(0x00002004, &axi_qos->qosthres1);
654 writel(0x00000000, &axi_qos->qosthres2);
655 writel(0x00000001, &axi_qos->qosqon);
656
657 axi_qos = (struct rcar_axi_qos *)RT_AXI_STPRO_BASE;
658 writel(0x00000000, &axi_qos->qosconf);
659 writel(0x00002029, &axi_qos->qosctset0);
660 writel(0x00002096, &axi_qos->qosctset1);
661 writel(0x00002030, &axi_qos->qosctset2);
662 writel(0x00002030, &axi_qos->qosctset3);
663 writel(0x00000001, &axi_qos->qosreqctr);
664 writel(0x00002064, &axi_qos->qosthres0);
665 writel(0x00002004, &axi_qos->qosthres1);
666 writel(0x00000000, &axi_qos->qosthres2);
667 writel(0x00000001, &axi_qos->qosqon);
668
669 axi_qos = (struct rcar_axi_qos *)RT_AXI_SY2RT_BASE;
670 writel(0x00000002, &axi_qos->qosconf);
671 writel(0x00002245, &axi_qos->qosctset0);
672 writel(0x00000001, &axi_qos->qosreqctr);
673 writel(0x00002064, &axi_qos->qosthres0);
674 writel(0x00002004, &axi_qos->qosthres1);
675 writel(0x00000000, &axi_qos->qosthres2);
676 writel(0x00000001, &axi_qos->qosqon);
677
678 /* QoS Register (MP-AXI) */
679 axi_qos = (struct rcar_axi_qos *)MP_AXI_ADSP_BASE;
680 writel(0x00000000, &axi_qos->qosconf);
681 writel(0x00002037, &axi_qos->qosctset0);
682 writel(0x00000001, &axi_qos->qosreqctr);
683 writel(0x00002064, &axi_qos->qosthres0);
684 writel(0x00002004, &axi_qos->qosthres1);
685 writel(0x00000000, &axi_qos->qosthres2);
686 writel(0x00000001, &axi_qos->qosqon);
687
688 axi_qos = (struct rcar_axi_qos *)MP_AXI_ASDS0_BASE;
689 writel(0x00000001, &axi_qos->qosconf);
690 writel(0x00002014, &axi_qos->qosctset0);
691 writel(0x00000040, &axi_qos->qosreqctr);
692 writel(0x00002064, &axi_qos->qosthres0);
693 writel(0x00002004, &axi_qos->qosthres1);
694 writel(0x00000000, &axi_qos->qosthres2);
695 writel(0x00000001, &axi_qos->qosqon);
696
697 axi_qos = (struct rcar_axi_qos *)MP_AXI_ASDS1_BASE;
698 writel(0x00000001, &axi_qos->qosconf);
699 writel(0x00002014, &axi_qos->qosctset0);
700 writel(0x00000040, &axi_qos->qosreqctr);
701 writel(0x00002064, &axi_qos->qosthres0);
702 writel(0x00002004, &axi_qos->qosthres1);
703 writel(0x00000000, &axi_qos->qosthres2);
704 writel(0x00000001, &axi_qos->qosqon);
705
706 axi_qos = (struct rcar_axi_qos *)MP_AXI_MLP_BASE;
707 writel(0x00000001, &axi_qos->qosconf);
708 writel(0x00001FF0, &axi_qos->qosctset0);
709 writel(0x00000020, &axi_qos->qosreqctr);
710 writel(0x00002064, &axi_qos->qosthres0);
711 writel(0x00002004, &axi_qos->qosthres1);
712 writel(0x00002001, &axi_qos->qosthres2);
713 writel(0x00000001, &axi_qos->qosqon);
714
715 axi_qos = (struct rcar_axi_qos *)MP_AXI_MMUMP_BASE;
716 writel(0x00000001, &axi_qos->qosconf);
717 writel(0x00002004, &axi_qos->qosctset0);
718 writel(0x00002096, &axi_qos->qosctset1);
719 writel(0x00002030, &axi_qos->qosctset2);
720 writel(0x00002030, &axi_qos->qosctset3);
721 writel(0x00000001, &axi_qos->qosreqctr);
722 writel(0x00002064, &axi_qos->qosthres0);
723 writel(0x00002004, &axi_qos->qosthres1);
724 writel(0x00000000, &axi_qos->qosthres2);
725 writel(0x00000001, &axi_qos->qosqon);
726
727 axi_qos = (struct rcar_axi_qos *)MP_AXI_SPU_BASE;
728 writel(0x00000000, &axi_qos->qosconf);
729 writel(0x00002053, &axi_qos->qosctset0);
730 writel(0x00000001, &axi_qos->qosreqctr);
731 writel(0x00002064, &axi_qos->qosthres0);
732 writel(0x00002004, &axi_qos->qosthres1);
733 writel(0x00000000, &axi_qos->qosthres2);
734 writel(0x00000001, &axi_qos->qosqon);
735
736 axi_qos = (struct rcar_axi_qos *)MP_AXI_SPUC_BASE;
737 writel(0x00000000, &axi_qos->qosconf);
738 writel(0x0000206E, &axi_qos->qosctset0);
739 writel(0x00000001, &axi_qos->qosreqctr);
740 writel(0x00002064, &axi_qos->qosthres0);
741 writel(0x00002004, &axi_qos->qosthres1);
742 writel(0x00000000, &axi_qos->qosthres2);
743 writel(0x00000001, &axi_qos->qosqon);
744
745 /* QoS Register (SYS-AXI256) */
746 axi_qos = (struct rcar_axi_qos *)SYS_AXI256_AXI128TO256_BASE;
747 writel(0x00000002, &axi_qos->qosconf);
748 writel(0x000020EB, &axi_qos->qosctset0);
749 writel(0x00002096, &axi_qos->qosctset1);
750 writel(0x00002030, &axi_qos->qosctset2);
751 writel(0x00002030, &axi_qos->qosctset3);
752 writel(0x00000001, &axi_qos->qosreqctr);
753 writel(0x00002064, &axi_qos->qosthres0);
754 writel(0x00002004, &axi_qos->qosthres1);
755 writel(0x00000000, &axi_qos->qosthres2);
756 writel(0x00000001, &axi_qos->qosqon);
757
758 axi_qos = (struct rcar_axi_qos *)SYS_AXI256_SYX_BASE;
759 writel(0x00000002, &axi_qos->qosconf);
760 writel(0x000020EB, &axi_qos->qosctset0);
761 writel(0x00002096, &axi_qos->qosctset1);
762 writel(0x00002030, &axi_qos->qosctset2);
763 writel(0x00002030, &axi_qos->qosctset3);
764 writel(0x00000001, &axi_qos->qosreqctr);
765 writel(0x00002064, &axi_qos->qosthres0);
766 writel(0x00002004, &axi_qos->qosthres1);
767 writel(0x00000000, &axi_qos->qosthres2);
768 writel(0x00000001, &axi_qos->qosqon);
769
770 axi_qos = (struct rcar_axi_qos *)SYS_AXI256_MPX_BASE;
771 writel(0x00000002, &axi_qos->qosconf);
772 writel(0x000020EB, &axi_qos->qosctset0);
773 writel(0x00002096, &axi_qos->qosctset1);
774 writel(0x00002030, &axi_qos->qosctset2);
775 writel(0x00002030, &axi_qos->qosctset3);
776 writel(0x00000001, &axi_qos->qosreqctr);
777 writel(0x00002064, &axi_qos->qosthres0);
778 writel(0x00002004, &axi_qos->qosthres1);
779 writel(0x00000000, &axi_qos->qosthres2);
780 writel(0x00000001, &axi_qos->qosqon);
781
782 axi_qos = (struct rcar_axi_qos *)SYS_AXI256_MXI_BASE;
783 writel(0x00000002, &axi_qos->qosconf);
784 writel(0x000020EB, &axi_qos->qosctset0);
785 writel(0x00002096, &axi_qos->qosctset1);
786 writel(0x00002030, &axi_qos->qosctset2);
787 writel(0x00002030, &axi_qos->qosctset3);
788 writel(0x00000001, &axi_qos->qosreqctr);
789 writel(0x00002064, &axi_qos->qosthres0);
790 writel(0x00002004, &axi_qos->qosthres1);
791 writel(0x00000000, &axi_qos->qosthres2);
792 writel(0x00000001, &axi_qos->qosqon);
793
794 /* QoS Register (CCI-AXI) */
795 axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUS0_BASE;
796 writel(0x00000001, &axi_qos->qosconf);
797 writel(0x00002004, &axi_qos->qosctset0);
798 writel(0x00002096, &axi_qos->qosctset1);
799 writel(0x00002030, &axi_qos->qosctset2);
800 writel(0x00002030, &axi_qos->qosctset3);
801 writel(0x00000001, &axi_qos->qosreqctr);
802 writel(0x00002064, &axi_qos->qosthres0);
803 writel(0x00002004, &axi_qos->qosthres1);
804 writel(0x00000000, &axi_qos->qosthres2);
805 writel(0x00000001, &axi_qos->qosqon);
806
807 axi_qos = (struct rcar_axi_qos *)CCI_AXI_SYX2_BASE;
808 writel(0x00000002, &axi_qos->qosconf);
809 writel(0x00002245, &axi_qos->qosctset0);
810 writel(0x00002096, &axi_qos->qosctset1);
811 writel(0x00002030, &axi_qos->qosctset2);
812 writel(0x00002030, &axi_qos->qosctset3);
813 writel(0x00000001, &axi_qos->qosreqctr);
814 writel(0x00002064, &axi_qos->qosthres0);
815 writel(0x00002004, &axi_qos->qosthres1);
816 writel(0x00000000, &axi_qos->qosthres2);
817 writel(0x00000001, &axi_qos->qosqon);
818
819 axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUR_BASE;
820 writel(0x00000001, &axi_qos->qosconf);
821 writel(0x00002004, &axi_qos->qosctset0);
822 writel(0x00002096, &axi_qos->qosctset1);
823 writel(0x00002030, &axi_qos->qosctset2);
824 writel(0x00002030, &axi_qos->qosctset3);
825 writel(0x00000001, &axi_qos->qosreqctr);
826 writel(0x00002064, &axi_qos->qosthres0);
827 writel(0x00002004, &axi_qos->qosthres1);
828 writel(0x00000000, &axi_qos->qosthres2);
829 writel(0x00000001, &axi_qos->qosqon);
830
831 axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUDS_BASE;
832 writel(0x00000001, &axi_qos->qosconf);
833 writel(0x00002004, &axi_qos->qosctset0);
834 writel(0x00002096, &axi_qos->qosctset1);
835 writel(0x00002030, &axi_qos->qosctset2);
836 writel(0x00002030, &axi_qos->qosctset3);
837 writel(0x00000001, &axi_qos->qosreqctr);
838 writel(0x00002064, &axi_qos->qosthres0);
839 writel(0x00002004, &axi_qos->qosthres1);
840 writel(0x00000000, &axi_qos->qosthres2);
841 writel(0x00000001, &axi_qos->qosqon);
842
843 axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUM_BASE;
844 writel(0x00000001, &axi_qos->qosconf);
845 writel(0x00002004, &axi_qos->qosctset0);
846 writel(0x00002096, &axi_qos->qosctset1);
847 writel(0x00002030, &axi_qos->qosctset2);
848 writel(0x00002030, &axi_qos->qosctset3);
849 writel(0x00000001, &axi_qos->qosreqctr);
850 writel(0x00002064, &axi_qos->qosthres0);
851 writel(0x00002004, &axi_qos->qosthres1);
852 writel(0x00000000, &axi_qos->qosthres2);
853 writel(0x00000001, &axi_qos->qosqon);
854
855 axi_qos = (struct rcar_axi_qos *)CCI_AXI_MXI_BASE;
856 writel(0x00000002, &axi_qos->qosconf);
857 writel(0x00002245, &axi_qos->qosctset0);
858 writel(0x00002096, &axi_qos->qosctset1);
859 writel(0x00002030, &axi_qos->qosctset2);
860 writel(0x00002030, &axi_qos->qosctset3);
861 writel(0x00000001, &axi_qos->qosreqctr);
862 writel(0x00002064, &axi_qos->qosthres0);
863 writel(0x00002004, &axi_qos->qosthres1);
864 writel(0x00000000, &axi_qos->qosthres2);
865 writel(0x00000001, &axi_qos->qosqon);
866
867 axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUS1_BASE;
868 writel(0x00000001, &axi_qos->qosconf);
869 writel(0x00002004, &axi_qos->qosctset0);
870 writel(0x00002096, &axi_qos->qosctset1);
871 writel(0x00002030, &axi_qos->qosctset2);
872 writel(0x00002030, &axi_qos->qosctset3);
873 writel(0x00000001, &axi_qos->qosreqctr);
874 writel(0x00002064, &axi_qos->qosthres0);
875 writel(0x00002004, &axi_qos->qosthres1);
876 writel(0x00000000, &axi_qos->qosthres2);
877 writel(0x00000001, &axi_qos->qosqon);
878
879 axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUMP_BASE;
880 writel(0x00000001, &axi_qos->qosconf);
881 writel(0x00002004, &axi_qos->qosctset0);
882 writel(0x00002096, &axi_qos->qosctset1);
883 writel(0x00002030, &axi_qos->qosctset2);
884 writel(0x00002030, &axi_qos->qosctset3);
885 writel(0x00000001, &axi_qos->qosreqctr);
886 writel(0x00002064, &axi_qos->qosthres0);
887 writel(0x00002004, &axi_qos->qosthres1);
888 writel(0x00000000, &axi_qos->qosthres2);
889 writel(0x00000001, &axi_qos->qosqon);
890
891 /* QoS Register (Media-AXI) */
892 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_MXR_BASE;
893 writel(0x00000002, &axi_qos->qosconf);
894 writel(0x000020DC, &axi_qos->qosctset0);
895 writel(0x00002096, &axi_qos->qosctset1);
896 writel(0x00002030, &axi_qos->qosctset2);
897 writel(0x00002030, &axi_qos->qosctset3);
898 writel(0x00000020, &axi_qos->qosreqctr);
899 writel(0x000020AA, &axi_qos->qosthres0);
900 writel(0x00002032, &axi_qos->qosthres1);
901 writel(0x00000001, &axi_qos->qosthres2);
902
903 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_MXW_BASE;
904 writel(0x00000002, &axi_qos->qosconf);
905 writel(0x000020DC, &axi_qos->qosctset0);
906 writel(0x00002096, &axi_qos->qosctset1);
907 writel(0x00002030, &axi_qos->qosctset2);
908 writel(0x00002030, &axi_qos->qosctset3);
909 writel(0x00000020, &axi_qos->qosreqctr);
910 writel(0x000020AA, &axi_qos->qosthres0);
911 writel(0x00002032, &axi_qos->qosthres1);
912 writel(0x00000001, &axi_qos->qosthres2);
913
914 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_JPR_BASE;
915 writel(0x00000001, &axi_qos->qosconf);
916 writel(0x00002190, &axi_qos->qosctset0);
917 writel(0x00000020, &axi_qos->qosreqctr);
918 writel(0x00002064, &axi_qos->qosthres0);
919 writel(0x00002004, &axi_qos->qosthres1);
920 writel(0x00000001, &axi_qos->qosthres2);
921 writel(0x00000001, &axi_qos->qosqon);
922
923 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_JPW_BASE;
924 writel(0x00000001, &axi_qos->qosconf);
925 writel(0x00002190, &axi_qos->qosctset0);
926 writel(0x00000020, &axi_qos->qosreqctr);
927 writel(0x00000001, &axi_qos->qosthres0);
928 writel(0x00000001, &axi_qos->qosthres1);
929 writel(0x00000001, &axi_qos->qosthres2);
930 writel(0x00000001, &axi_qos->qosqon);
931
932 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_TDMR_BASE;
933 writel(0x00000001, &axi_qos->qosconf);
934 writel(0x00002190, &axi_qos->qosctset0);
935 writel(0x00000020, &axi_qos->qosreqctr);
936 writel(0x00002064, &axi_qos->qosthres0);
937 writel(0x00002004, &axi_qos->qosthres1);
938 writel(0x00000001, &axi_qos->qosthres2);
939 writel(0x00000001, &axi_qos->qosqon);
940
941 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_TDMW_BASE;
942 writel(0x00000001, &axi_qos->qosconf);
943 writel(0x00002190, &axi_qos->qosctset0);
944 writel(0x00000020, &axi_qos->qosreqctr);
945 writel(0x00000001, &axi_qos->qosthres0);
946 writel(0x00000001, &axi_qos->qosthres1);
947 writel(0x00000001, &axi_qos->qosthres2);
948 writel(0x00000001, &axi_qos->qosqon);
949
950 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSP1CR_BASE;
951 writel(0x00000001, &axi_qos->qosconf);
952 writel(0x00002190, &axi_qos->qosctset0);
953 writel(0x00000020, &axi_qos->qosreqctr);
954 writel(0x00002064, &axi_qos->qosthres0);
955 writel(0x00002004, &axi_qos->qosthres1);
956 writel(0x00000001, &axi_qos->qosthres2);
957 writel(0x00000001, &axi_qos->qosqon);
958
959 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSP1CW_BASE;
960 writel(0x00000001, &axi_qos->qosconf);
961 writel(0x00002190, &axi_qos->qosctset0);
962 writel(0x00000020, &axi_qos->qosreqctr);
963 writel(0x00000001, &axi_qos->qosthres0);
964 writel(0x00000001, &axi_qos->qosthres1);
965 writel(0x00000001, &axi_qos->qosthres2);
966 writel(0x00000001, &axi_qos->qosqon);
967
968 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPDU0CR_BASE;
969 writel(0x00000001, &axi_qos->qosconf);
970 writel(0x00002190, &axi_qos->qosctset0);
971 writel(0x00000020, &axi_qos->qosreqctr);
972 writel(0x00002064, &axi_qos->qosthres0);
973 writel(0x00002004, &axi_qos->qosthres1);
974 writel(0x00000001, &axi_qos->qosthres2);
975 writel(0x00000001, &axi_qos->qosqon);
976
977 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPDU0CW_BASE;
978 writel(0x00000001, &axi_qos->qosconf);
979 writel(0x00002190, &axi_qos->qosctset0);
980 writel(0x00000020, &axi_qos->qosreqctr);
981 writel(0x00000001, &axi_qos->qosthres0);
982 writel(0x00000001, &axi_qos->qosthres1);
983 writel(0x00000001, &axi_qos->qosthres2);
984 writel(0x00000001, &axi_qos->qosqon);
985
986 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPDU1CR_BASE;
987 writel(0x00000001, &axi_qos->qosconf);
988 writel(0x00002190, &axi_qos->qosctset0);
989 writel(0x00000020, &axi_qos->qosreqctr);
990 writel(0x00002064, &axi_qos->qosthres0);
991 writel(0x00002004, &axi_qos->qosthres1);
992 writel(0x00000001, &axi_qos->qosthres2);
993 writel(0x00000001, &axi_qos->qosqon);
994
995 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPDU1CW_BASE;
996 writel(0x00000001, &axi_qos->qosconf);
997 writel(0x00002190, &axi_qos->qosctset0);
998 writel(0x00000020, &axi_qos->qosreqctr);
999 writel(0x00000001, &axi_qos->qosthres0);
1000 writel(0x00000001, &axi_qos->qosthres1);
1001 writel(0x00000001, &axi_qos->qosthres2);
1002 writel(0x00000001, &axi_qos->qosqon);
1003
1004 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VIN0W_BASE;
1005 writel(0x00000001, &axi_qos->qosconf);
1006 writel(0x00001FF0, &axi_qos->qosctset0);
1007 writel(0x00000020, &axi_qos->qosreqctr);
1008 writel(0x00002064, &axi_qos->qosthres0);
1009 writel(0x00002004, &axi_qos->qosthres1);
1010 writel(0x00002001, &axi_qos->qosthres2);
1011 writel(0x00000001, &axi_qos->qosqon);
1012
1013 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_FDP0R_BASE;
1014 writel(0x00000001, &axi_qos->qosconf);
1015 writel(0x000020C8, &axi_qos->qosctset0);
1016 writel(0x00000020, &axi_qos->qosreqctr);
1017 writel(0x00002064, &axi_qos->qosthres0);
1018 writel(0x00002004, &axi_qos->qosthres1);
1019 writel(0x00000001, &axi_qos->qosthres2);
1020 writel(0x00000001, &axi_qos->qosqon);
1021
1022 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_FDP0W_BASE;
1023 writel(0x00000001, &axi_qos->qosconf);
1024 writel(0x000020C8, &axi_qos->qosctset0);
1025 writel(0x00000020, &axi_qos->qosreqctr);
1026 writel(0x00000001, &axi_qos->qosthres0);
1027 writel(0x00000001, &axi_qos->qosthres1);
1028 writel(0x00000001, &axi_qos->qosthres2);
1029 writel(0x00000001, &axi_qos->qosqon);
1030
1031 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_IMSR_BASE;
1032 writel(0x00000001, &axi_qos->qosconf);
1033 writel(0x000020C8, &axi_qos->qosctset0);
1034 writel(0x00000020, &axi_qos->qosreqctr);
1035 writel(0x00002064, &axi_qos->qosthres0);
1036 writel(0x00002004, &axi_qos->qosthres1);
1037 writel(0x00000001, &axi_qos->qosthres2);
1038 writel(0x00000001, &axi_qos->qosqon);
1039
1040 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_IMSW_BASE;
1041 writel(0x00000001, &axi_qos->qosconf);
1042 writel(0x000020C8, &axi_qos->qosctset0);
1043 writel(0x00000020, &axi_qos->qosreqctr);
1044 writel(0x00002064, &axi_qos->qosthres0);
1045 writel(0x00002004, &axi_qos->qosthres1);
1046 writel(0x00000001, &axi_qos->qosthres2);
1047 writel(0x00000001, &axi_qos->qosqon);
1048
1049 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSP1R_BASE;
1050 writel(0x00000001, &axi_qos->qosconf);
1051 writel(0x000020C8, &axi_qos->qosctset0);
1052 writel(0x00000020, &axi_qos->qosreqctr);
1053 writel(0x00002064, &axi_qos->qosthres0);
1054 writel(0x00002004, &axi_qos->qosthres1);
1055 writel(0x00000001, &axi_qos->qosthres2);
1056 writel(0x00000001, &axi_qos->qosqon);
1057
1058 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSP1W_BASE;
1059 writel(0x00000001, &axi_qos->qosconf);
1060 writel(0x000020C8, &axi_qos->qosctset0);
1061 writel(0x00000020, &axi_qos->qosreqctr);
1062 writel(0x00000001, &axi_qos->qosthres0);
1063 writel(0x00000001, &axi_qos->qosthres1);
1064 writel(0x00000001, &axi_qos->qosthres2);
1065 writel(0x00000001, &axi_qos->qosqon);
1066
1067 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_FDP1R_BASE;
1068 writel(0x00000001, &axi_qos->qosconf);
1069 writel(0x000020C8, &axi_qos->qosctset0);
1070 writel(0x00000020, &axi_qos->qosreqctr);
1071 writel(0x00002064, &axi_qos->qosthres0);
1072 writel(0x00002004, &axi_qos->qosthres1);
1073 writel(0x00000001, &axi_qos->qosthres2);
1074 writel(0x00000001, &axi_qos->qosqon);
1075
1076 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_FDP1W_BASE;
1077 writel(0x00000001, &axi_qos->qosconf);
1078 writel(0x000020C8, &axi_qos->qosctset0);
1079 writel(0x00000020, &axi_qos->qosreqctr);
1080 writel(0x00000001, &axi_qos->qosthres0);
1081 writel(0x00000001, &axi_qos->qosthres1);
1082 writel(0x00000001, &axi_qos->qosthres2);
1083 writel(0x00000001, &axi_qos->qosqon);
1084
1085 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_IMRR_BASE;
1086 writel(0x00000001, &axi_qos->qosconf);
1087 writel(0x000020C8, &axi_qos->qosctset0);
1088 writel(0x00000020, &axi_qos->qosreqctr);
1089 writel(0x00002064, &axi_qos->qosthres0);
1090 writel(0x00002004, &axi_qos->qosthres1);
1091 writel(0x00000001, &axi_qos->qosthres2);
1092 writel(0x00000001, &axi_qos->qosqon);
1093
1094 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_IMRW_BASE;
1095 writel(0x00000001, &axi_qos->qosconf);
1096 writel(0x000020C8, &axi_qos->qosctset0);
1097 writel(0x00000020, &axi_qos->qosreqctr);
1098 writel(0x00002064, &axi_qos->qosthres0);
1099 writel(0x00002004, &axi_qos->qosthres1);
1100 writel(0x00000001, &axi_qos->qosthres2);
1101 writel(0x00000001, &axi_qos->qosqon);
1102
1103 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPD0R_BASE;
1104 writel(0x00000003, &axi_qos->qosconf);
1105 writel(0x000020C8, &axi_qos->qosctset0);
1106 writel(0x00002064, &axi_qos->qosthres0);
1107 writel(0x00002004, &axi_qos->qosthres1);
1108 writel(0x00000001, &axi_qos->qosthres2);
1109 writel(0x00000001, &axi_qos->qosqon);
1110
1111 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPD0W_BASE;
1112 writel(0x00000003, &axi_qos->qosconf);
1113 writel(0x000020C8, &axi_qos->qosctset0);
1114 writel(0x00002064, &axi_qos->qosthres0);
1115 writel(0x00002004, &axi_qos->qosthres1);
1116 writel(0x00000001, &axi_qos->qosthres2);
1117 writel(0x00000001, &axi_qos->qosqon);
1118
1119 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPD1R_BASE;
1120 writel(0x00000003, &axi_qos->qosconf);
1121 writel(0x000020C8, &axi_qos->qosctset0);
1122 writel(0x00002064, &axi_qos->qosthres0);
1123 writel(0x00002004, &axi_qos->qosthres1);
1124 writel(0x00000001, &axi_qos->qosthres2);
1125 writel(0x00000001, &axi_qos->qosqon);
1126
1127 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPD1W_BASE;
1128 writel(0x00000003, &axi_qos->qosconf);
1129 writel(0x000020C8, &axi_qos->qosctset0);
1130 writel(0x00002064, &axi_qos->qosthres0);
1131 writel(0x00002004, &axi_qos->qosthres1);
1132 writel(0x00000001, &axi_qos->qosthres2);
1133 writel(0x00000001, &axi_qos->qosqon);
1134
1135 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_DU0R_BASE;
1136 writel(0x00000003, &axi_qos->qosconf);
1137 writel(0x00002063, &axi_qos->qosctset0);
1138 writel(0x00000001, &axi_qos->qosreqctr);
1139 writel(0x00002064, &axi_qos->qosthres0);
1140 writel(0x00002004, &axi_qos->qosthres1);
1141 writel(0x00000001, &axi_qos->qosthres2);
1142 writel(0x00000001, &axi_qos->qosqon);
1143
1144 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_DU0W_BASE;
1145 writel(0x00000003, &axi_qos->qosconf);
1146 writel(0x00002063, &axi_qos->qosctset0);
1147 writel(0x00000001, &axi_qos->qosreqctr);
1148 writel(0x00002064, &axi_qos->qosthres0);
1149 writel(0x00002004, &axi_qos->qosthres1);
1150 writel(0x00000001, &axi_qos->qosthres2);
1151 writel(0x00000001, &axi_qos->qosqon);
1152
1153 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VCP0CR_BASE;
1154 writel(0x00000001, &axi_qos->qosconf);
1155 writel(0x00002073, &axi_qos->qosctset0);
1156 writel(0x00000020, &axi_qos->qosreqctr);
1157 writel(0x00002064, &axi_qos->qosthres0);
1158 writel(0x00002004, &axi_qos->qosthres1);
1159 writel(0x00000001, &axi_qos->qosthres2);
1160 writel(0x00000001, &axi_qos->qosqon);
1161
1162 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VCP0CW_BASE;
1163 writel(0x00000001, &axi_qos->qosconf);
1164 writel(0x00002073, &axi_qos->qosctset0);
1165 writel(0x00000020, &axi_qos->qosreqctr);
1166 writel(0x00000001, &axi_qos->qosthres0);
1167 writel(0x00000001, &axi_qos->qosthres1);
1168 writel(0x00000001, &axi_qos->qosthres2);
1169 writel(0x00000001, &axi_qos->qosqon);
1170
1171 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VCP0VR_BASE;
1172 writel(0x00000001, &axi_qos->qosconf);
1173 writel(0x00002073, &axi_qos->qosctset0);
1174 writel(0x00000020, &axi_qos->qosreqctr);
1175 writel(0x00002064, &axi_qos->qosthres0);
1176 writel(0x00002004, &axi_qos->qosthres1);
1177 writel(0x00000001, &axi_qos->qosthres2);
1178 writel(0x00000001, &axi_qos->qosqon);
1179
1180 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VCP0VW_BASE;
1181 writel(0x00000001, &axi_qos->qosconf);
1182 writel(0x00002073, &axi_qos->qosctset0);
1183 writel(0x00000020, &axi_qos->qosreqctr);
1184 writel(0x00000001, &axi_qos->qosthres0);
1185 writel(0x00000001, &axi_qos->qosthres1);
1186 writel(0x00000001, &axi_qos->qosthres2);
1187 writel(0x00000001, &axi_qos->qosqon);
1188
1189 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VPC0R_BASE;
1190 writel(0x00000001, &axi_qos->qosconf);
1191 writel(0x00002073, &axi_qos->qosctset0);
1192 writel(0x00000020, &axi_qos->qosreqctr);
1193 writel(0x00002064, &axi_qos->qosthres0);
1194 writel(0x00002004, &axi_qos->qosthres1);
1195 writel(0x00000001, &axi_qos->qosthres2);
1196 writel(0x00000001, &axi_qos->qosqon);
1197}
Nobuhiro Iwamatsu7c112732015-10-10 05:58:28 +0900[diff] [blame]1198#else /* CONFIG_ARCH_RMOBILE_EXTRAM_BOOT */
Nobuhiro Iwamatsu7e405632014-11-06 15:39:28 +0900[diff] [blame]1199void qos_init(void)
1200{
1201}
Nobuhiro Iwamatsu7c112732015-10-10 05:58:28 +0900[diff] [blame]1202#endif /* CONFIG_ARCH_RMOBILE_EXTRAM_BOOT */