Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Marcel Ziswiler | 7a28dfc | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (c) 2016 Toradex, Inc. |
Marcel Ziswiler | 7a28dfc | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 4 | */ |
| 5 | |
| 6 | #include <common.h> |
| 7 | #include "tdx-cfg-block.h" |
| 8 | |
| 9 | #if defined(CONFIG_TARGET_APALIS_IMX6) || defined(CONFIG_TARGET_COLIBRI_IMX6) |
| 10 | #include <asm/arch/sys_proto.h> |
| 11 | #else |
| 12 | #define is_cpu_type(cpu) (0) |
| 13 | #endif |
| 14 | #if defined(CONFIG_CPU_PXA27X) |
| 15 | #include <asm/arch-pxa/pxa.h> |
| 16 | #else |
| 17 | #define cpu_is_pxa27x(cpu) (0) |
| 18 | #endif |
| 19 | #include <cli.h> |
| 20 | #include <console.h> |
| 21 | #include <flash.h> |
| 22 | #include <malloc.h> |
| 23 | #include <mmc.h> |
| 24 | #include <nand.h> |
Simon Glass | 0ffb9d6 | 2017-05-31 19:47:48 -0600 | [diff] [blame] | 25 | #include <asm/mach-types.h> |
Marcel Ziswiler | 7a28dfc | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 26 | |
| 27 | DECLARE_GLOBAL_DATA_PTR; |
| 28 | |
| 29 | #define TAG_VALID 0xcf01 |
| 30 | #define TAG_MAC 0x0000 |
| 31 | #define TAG_HW 0x0008 |
| 32 | #define TAG_INVALID 0xffff |
| 33 | |
| 34 | #define TAG_FLAG_VALID 0x1 |
| 35 | |
| 36 | #if defined(CONFIG_TDX_CFG_BLOCK_IS_IN_MMC) |
| 37 | #define TDX_CFG_BLOCK_MAX_SIZE 512 |
| 38 | #elif defined(CONFIG_TDX_CFG_BLOCK_IS_IN_NAND) |
| 39 | #define TDX_CFG_BLOCK_MAX_SIZE 64 |
| 40 | #elif defined(CONFIG_TDX_CFG_BLOCK_IS_IN_NOR) |
| 41 | #define TDX_CFG_BLOCK_MAX_SIZE 64 |
| 42 | #else |
| 43 | #error Toradex config block location not set |
| 44 | #endif |
| 45 | |
| 46 | struct toradex_tag { |
| 47 | u32 len:14; |
| 48 | u32 flags:2; |
| 49 | u32 id:16; |
| 50 | }; |
| 51 | |
| 52 | bool valid_cfgblock; |
| 53 | struct toradex_hw tdx_hw_tag; |
| 54 | struct toradex_eth_addr tdx_eth_addr; |
| 55 | u32 tdx_serial; |
| 56 | |
| 57 | const char * const toradex_modules[] = { |
| 58 | [0] = "UNKNOWN MODULE", |
| 59 | [1] = "Colibri PXA270 312MHz", |
| 60 | [2] = "Colibri PXA270 520MHz", |
| 61 | [3] = "Colibri PXA320 806MHz", |
| 62 | [4] = "Colibri PXA300 208MHz", |
| 63 | [5] = "Colibri PXA310 624MHz", |
| 64 | [6] = "Colibri PXA320 806MHz IT", |
| 65 | [7] = "Colibri PXA300 208MHz XT", |
| 66 | [8] = "Colibri PXA270 312MHz", |
| 67 | [9] = "Colibri PXA270 520MHz", |
| 68 | [10] = "Colibri VF50 128MB", /* not currently on sale */ |
| 69 | [11] = "Colibri VF61 256MB", |
| 70 | [12] = "Colibri VF61 256MB IT", |
| 71 | [13] = "Colibri VF50 128MB IT", |
| 72 | [14] = "Colibri iMX6 Solo 256MB", |
| 73 | [15] = "Colibri iMX6 DualLite 512MB", |
| 74 | [16] = "Colibri iMX6 Solo 256MB IT", |
| 75 | [17] = "Colibri iMX6 DualLite 512MB IT", |
| 76 | [18] = "UNKNOWN MODULE", |
| 77 | [19] = "UNKNOWN MODULE", |
| 78 | [20] = "Colibri T20 256MB", |
| 79 | [21] = "Colibri T20 512MB", |
| 80 | [22] = "Colibri T20 512MB IT", |
| 81 | [23] = "Colibri T30 1GB", |
| 82 | [24] = "Colibri T20 256MB IT", |
| 83 | [25] = "Apalis T30 2GB", |
| 84 | [26] = "Apalis T30 1GB", |
| 85 | [27] = "Apalis iMX6 Quad 1GB", |
| 86 | [28] = "Apalis iMX6 Quad 2GB IT", |
| 87 | [29] = "Apalis iMX6 Dual 512MB", |
| 88 | [30] = "Colibri T30 1GB IT", |
| 89 | [31] = "Apalis T30 1GB IT", |
| 90 | [32] = "Colibri iMX7 Solo 256MB", |
| 91 | [33] = "Colibri iMX7 Dual 512MB", |
| 92 | [34] = "Apalis TK1 2GB", |
| 93 | [35] = "Apalis iMX6 Dual 1GB IT", |
Stefan Agner | 01875e9 | 2018-05-30 19:01:47 +0200 | [diff] [blame] | 94 | [36] = "Colibri iMX6ULL 256MB", |
| 95 | [37] = "Apalis iMX8 QuadMax 4GB Wi-Fi / Bluetooth", |
| 96 | [38] = "Colibri iMX8X", |
| 97 | [39] = "Colibri iMX7 Dual 1GB (eMMC)", |
| 98 | [40] = "Colibri iMX6ULL 512MB Wi-Fi / Bluetooth IT", |
| 99 | [41] = "Colibri iMX7 Dual 512MB EPDC", |
| 100 | [42] = "Apalis TK1 4GB", |
Marcel Ziswiler | 7a28dfc | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 101 | }; |
| 102 | |
| 103 | #ifdef CONFIG_TDX_CFG_BLOCK_IS_IN_MMC |
| 104 | static int tdx_cfg_block_mmc_storage(u8 *config_block, int write) |
| 105 | { |
| 106 | struct mmc *mmc; |
| 107 | int dev = CONFIG_TDX_CFG_BLOCK_DEV; |
| 108 | int offset = CONFIG_TDX_CFG_BLOCK_OFFSET; |
| 109 | uint part = CONFIG_TDX_CFG_BLOCK_PART; |
| 110 | uint blk_start; |
| 111 | int ret = 0; |
| 112 | |
| 113 | /* Read production parameter config block from eMMC */ |
| 114 | mmc = find_mmc_device(dev); |
| 115 | if (!mmc) { |
| 116 | puts("No MMC card found\n"); |
| 117 | ret = -ENODEV; |
| 118 | goto out; |
| 119 | } |
Simon Glass | 8c4c5c8 | 2017-04-23 20:02:11 -0600 | [diff] [blame] | 120 | if (part != mmc_get_blk_desc(mmc)->hwpart) { |
Marcel Ziswiler | 7a28dfc | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 121 | if (blk_select_hwpart_devnum(IF_TYPE_MMC, dev, part)) { |
| 122 | puts("MMC partition switch failed\n"); |
| 123 | ret = -ENODEV; |
| 124 | goto out; |
| 125 | } |
| 126 | } |
| 127 | if (offset < 0) |
| 128 | offset += mmc->capacity; |
| 129 | blk_start = ALIGN(offset, mmc->write_bl_len) / mmc->write_bl_len; |
| 130 | |
| 131 | if (!write) { |
| 132 | /* Careful reads a whole block of 512 bytes into config_block */ |
| 133 | if (blk_dread(mmc_get_blk_desc(mmc), blk_start, 1, |
| 134 | (unsigned char *)config_block) != 1) { |
| 135 | ret = -EIO; |
| 136 | goto out; |
| 137 | } |
Marcel Ziswiler | 7a28dfc | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 138 | } else { |
| 139 | /* Just writing one 512 byte block */ |
| 140 | if (blk_dwrite(mmc_get_blk_desc(mmc), blk_start, 1, |
| 141 | (unsigned char *)config_block) != 1) { |
| 142 | ret = -EIO; |
| 143 | goto out; |
| 144 | } |
| 145 | } |
| 146 | |
| 147 | out: |
| 148 | /* Switch back to regular eMMC user partition */ |
| 149 | blk_select_hwpart_devnum(IF_TYPE_MMC, 0, 0); |
| 150 | |
| 151 | return ret; |
| 152 | } |
| 153 | #endif |
| 154 | |
| 155 | #ifdef CONFIG_TDX_CFG_BLOCK_IS_IN_NAND |
| 156 | static int read_tdx_cfg_block_from_nand(unsigned char *config_block) |
| 157 | { |
| 158 | size_t size = TDX_CFG_BLOCK_MAX_SIZE; |
Stefan Agner | 8843b6d | 2018-08-06 09:19:18 +0200 | [diff] [blame] | 159 | struct mtd_info *mtd = get_nand_dev_by_index(0); |
| 160 | |
| 161 | if (!mtd) |
| 162 | return -ENODEV; |
Marcel Ziswiler | 7a28dfc | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 163 | |
| 164 | /* Read production parameter config block from NAND page */ |
Stefan Agner | 8843b6d | 2018-08-06 09:19:18 +0200 | [diff] [blame] | 165 | return nand_read_skip_bad(mtd, CONFIG_TDX_CFG_BLOCK_OFFSET, |
Grygorii Strashko | bb31462 | 2017-06-26 19:13:06 -0500 | [diff] [blame] | 166 | &size, NULL, TDX_CFG_BLOCK_MAX_SIZE, |
| 167 | config_block); |
Marcel Ziswiler | 7a28dfc | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 168 | } |
| 169 | |
| 170 | static int write_tdx_cfg_block_to_nand(unsigned char *config_block) |
| 171 | { |
| 172 | size_t size = TDX_CFG_BLOCK_MAX_SIZE; |
| 173 | |
| 174 | /* Write production parameter config block to NAND page */ |
Grygorii Strashko | bb31462 | 2017-06-26 19:13:06 -0500 | [diff] [blame] | 175 | return nand_write_skip_bad(get_nand_dev_by_index(0), |
| 176 | CONFIG_TDX_CFG_BLOCK_OFFSET, |
Marcel Ziswiler | 7a28dfc | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 177 | &size, NULL, TDX_CFG_BLOCK_MAX_SIZE, |
| 178 | config_block, WITH_WR_VERIFY); |
| 179 | } |
| 180 | #endif |
| 181 | |
| 182 | #ifdef CONFIG_TDX_CFG_BLOCK_IS_IN_NOR |
| 183 | static int read_tdx_cfg_block_from_nor(unsigned char *config_block) |
| 184 | { |
| 185 | /* Read production parameter config block from NOR flash */ |
| 186 | memcpy(config_block, (void *)CONFIG_TDX_CFG_BLOCK_OFFSET, |
| 187 | TDX_CFG_BLOCK_MAX_SIZE); |
| 188 | return 0; |
| 189 | } |
| 190 | |
| 191 | static int write_tdx_cfg_block_to_nor(unsigned char *config_block) |
| 192 | { |
| 193 | /* Write production parameter config block to NOR flash */ |
| 194 | return flash_write((void *)config_block, CONFIG_TDX_CFG_BLOCK_OFFSET, |
| 195 | TDX_CFG_BLOCK_MAX_SIZE); |
| 196 | } |
| 197 | #endif |
| 198 | |
| 199 | int read_tdx_cfg_block(void) |
| 200 | { |
| 201 | int ret = 0; |
| 202 | u8 *config_block = NULL; |
| 203 | struct toradex_tag *tag; |
| 204 | size_t size = TDX_CFG_BLOCK_MAX_SIZE; |
| 205 | int offset; |
| 206 | |
| 207 | /* Allocate RAM area for config block */ |
| 208 | config_block = memalign(ARCH_DMA_MINALIGN, size); |
| 209 | if (!config_block) { |
| 210 | printf("Not enough malloc space available!\n"); |
| 211 | return -ENOMEM; |
| 212 | } |
| 213 | |
| 214 | memset(config_block, 0, size); |
| 215 | |
| 216 | #if defined(CONFIG_TDX_CFG_BLOCK_IS_IN_MMC) |
| 217 | ret = tdx_cfg_block_mmc_storage(config_block, 0); |
| 218 | #elif defined(CONFIG_TDX_CFG_BLOCK_IS_IN_NAND) |
| 219 | ret = read_tdx_cfg_block_from_nand(config_block); |
| 220 | #elif defined(CONFIG_TDX_CFG_BLOCK_IS_IN_NOR) |
| 221 | ret = read_tdx_cfg_block_from_nor(config_block); |
| 222 | #else |
| 223 | ret = -EINVAL; |
| 224 | #endif |
| 225 | if (ret) |
| 226 | goto out; |
| 227 | |
| 228 | /* Expect a valid tag first */ |
| 229 | tag = (struct toradex_tag *)config_block; |
| 230 | if (tag->flags != TAG_FLAG_VALID || tag->id != TAG_VALID) { |
| 231 | valid_cfgblock = false; |
| 232 | ret = -EINVAL; |
| 233 | goto out; |
| 234 | } |
| 235 | valid_cfgblock = true; |
| 236 | offset = 4; |
| 237 | |
| 238 | while (offset < TDX_CFG_BLOCK_MAX_SIZE) { |
| 239 | tag = (struct toradex_tag *)(config_block + offset); |
| 240 | offset += 4; |
| 241 | if (tag->id == TAG_INVALID) |
| 242 | break; |
| 243 | |
| 244 | if (tag->flags == TAG_FLAG_VALID) { |
| 245 | switch (tag->id) { |
| 246 | case TAG_MAC: |
| 247 | memcpy(&tdx_eth_addr, config_block + offset, |
| 248 | 6); |
| 249 | |
| 250 | /* NIC part of MAC address is serial number */ |
| 251 | tdx_serial = ntohl(tdx_eth_addr.nic) >> 8; |
| 252 | break; |
| 253 | case TAG_HW: |
| 254 | memcpy(&tdx_hw_tag, config_block + offset, 8); |
| 255 | break; |
| 256 | } |
| 257 | } |
| 258 | |
| 259 | /* Get to next tag according to current tags length */ |
| 260 | offset += tag->len * 4; |
| 261 | } |
| 262 | |
| 263 | /* Cap product id to avoid issues with a yet unknown one */ |
Marcel Ziswiler | 8c9127c | 2019-03-25 17:18:29 +0100 | [diff] [blame] | 264 | if (tdx_hw_tag.prodid >= (sizeof(toradex_modules) / |
Marcel Ziswiler | 7a28dfc | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 265 | sizeof(toradex_modules[0]))) |
| 266 | tdx_hw_tag.prodid = 0; |
| 267 | |
| 268 | out: |
| 269 | free(config_block); |
| 270 | return ret; |
| 271 | } |
| 272 | |
| 273 | static int get_cfgblock_interactive(void) |
| 274 | { |
| 275 | char message[CONFIG_SYS_CBSIZE]; |
| 276 | char *soc; |
| 277 | char it = 'n'; |
| 278 | int len; |
| 279 | |
| 280 | if (cpu_is_pxa27x()) |
| 281 | sprintf(message, "Is the module the 312 MHz version? [y/N] "); |
| 282 | else |
| 283 | sprintf(message, "Is the module an IT version? [y/N] "); |
| 284 | |
| 285 | len = cli_readline(message); |
| 286 | it = console_buffer[0]; |
| 287 | |
Simon Glass | 64b723f | 2017-08-03 12:22:12 -0600 | [diff] [blame] | 288 | soc = env_get("soc"); |
Marcel Ziswiler | 7a28dfc | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 289 | if (!strcmp("mx6", soc)) { |
| 290 | #ifdef CONFIG_MACH_TYPE |
| 291 | if (it == 'y' || it == 'Y') |
| 292 | if (is_cpu_type(MXC_CPU_MX6Q)) |
| 293 | tdx_hw_tag.prodid = APALIS_IMX6Q_IT; |
| 294 | else |
| 295 | tdx_hw_tag.prodid = APALIS_IMX6D_IT; |
| 296 | else |
| 297 | if (is_cpu_type(MXC_CPU_MX6Q)) |
| 298 | tdx_hw_tag.prodid = APALIS_IMX6Q; |
| 299 | else |
| 300 | tdx_hw_tag.prodid = APALIS_IMX6D; |
| 301 | #else |
| 302 | if (it == 'y' || it == 'Y') |
| 303 | if (is_cpu_type(MXC_CPU_MX6DL)) |
| 304 | tdx_hw_tag.prodid = COLIBRI_IMX6DL_IT; |
| 305 | else |
| 306 | tdx_hw_tag.prodid = COLIBRI_IMX6S_IT; |
| 307 | else |
| 308 | if (is_cpu_type(MXC_CPU_MX6DL)) |
| 309 | tdx_hw_tag.prodid = COLIBRI_IMX6DL; |
| 310 | else |
| 311 | tdx_hw_tag.prodid = COLIBRI_IMX6S; |
| 312 | #endif /* CONFIG_MACH_TYPE */ |
| 313 | } else if (!strcmp("imx7d", soc)) { |
| 314 | tdx_hw_tag.prodid = COLIBRI_IMX7D; |
| 315 | } else if (!strcmp("imx7s", soc)) { |
| 316 | tdx_hw_tag.prodid = COLIBRI_IMX7S; |
| 317 | } else if (!strcmp("tegra20", soc)) { |
| 318 | if (it == 'y' || it == 'Y') |
| 319 | if (gd->ram_size == 0x10000000) |
| 320 | tdx_hw_tag.prodid = COLIBRI_T20_256MB_IT; |
| 321 | else |
| 322 | tdx_hw_tag.prodid = COLIBRI_T20_512MB_IT; |
| 323 | else |
| 324 | if (gd->ram_size == 0x10000000) |
| 325 | tdx_hw_tag.prodid = COLIBRI_T20_256MB; |
| 326 | else |
| 327 | tdx_hw_tag.prodid = COLIBRI_T20_512MB; |
| 328 | } else if (cpu_is_pxa27x()) { |
| 329 | if (it == 'y' || it == 'Y') |
| 330 | tdx_hw_tag.prodid = COLIBRI_PXA270_312MHZ; |
| 331 | else |
| 332 | tdx_hw_tag.prodid = COLIBRI_PXA270_520MHZ; |
| 333 | #ifdef CONFIG_MACH_TYPE |
| 334 | } else if (!strcmp("tegra30", soc)) { |
| 335 | if (CONFIG_MACH_TYPE == MACH_TYPE_APALIS_T30) { |
| 336 | if (it == 'y' || it == 'Y') |
| 337 | tdx_hw_tag.prodid = APALIS_T30_IT; |
| 338 | else |
| 339 | if (gd->ram_size == 0x40000000) |
| 340 | tdx_hw_tag.prodid = APALIS_T30_1GB; |
| 341 | else |
| 342 | tdx_hw_tag.prodid = APALIS_T30_2GB; |
| 343 | } else { |
| 344 | if (it == 'y' || it == 'Y') |
| 345 | tdx_hw_tag.prodid = COLIBRI_T30_IT; |
| 346 | else |
| 347 | tdx_hw_tag.prodid = COLIBRI_T30; |
| 348 | } |
| 349 | #endif /* CONFIG_MACH_TYPE */ |
| 350 | } else if (!strcmp("tegra124", soc)) { |
| 351 | tdx_hw_tag.prodid = APALIS_TK1_2GB; |
| 352 | } else if (!strcmp("vf500", soc)) { |
| 353 | if (it == 'y' || it == 'Y') |
| 354 | tdx_hw_tag.prodid = COLIBRI_VF50_IT; |
| 355 | else |
| 356 | tdx_hw_tag.prodid = COLIBRI_VF50; |
| 357 | } else if (!strcmp("vf610", soc)) { |
| 358 | if (it == 'y' || it == 'Y') |
| 359 | tdx_hw_tag.prodid = COLIBRI_VF61_IT; |
| 360 | else |
| 361 | tdx_hw_tag.prodid = COLIBRI_VF61; |
| 362 | } else { |
| 363 | printf("Module type not detectable due to unknown SoC\n"); |
| 364 | return -1; |
| 365 | } |
| 366 | |
| 367 | while (len < 4) { |
| 368 | sprintf(message, "Enter the module version (e.g. V1.1B): V"); |
| 369 | len = cli_readline(message); |
| 370 | } |
| 371 | |
| 372 | tdx_hw_tag.ver_major = console_buffer[0] - '0'; |
| 373 | tdx_hw_tag.ver_minor = console_buffer[2] - '0'; |
| 374 | tdx_hw_tag.ver_assembly = console_buffer[3] - 'A'; |
| 375 | |
| 376 | if (cpu_is_pxa27x() && (tdx_hw_tag.ver_major == 1)) |
| 377 | tdx_hw_tag.prodid -= (COLIBRI_PXA270_312MHZ - |
| 378 | COLIBRI_PXA270_V1_312MHZ); |
| 379 | |
| 380 | while (len < 8) { |
| 381 | sprintf(message, "Enter module serial number: "); |
| 382 | len = cli_readline(message); |
| 383 | } |
| 384 | |
| 385 | tdx_serial = simple_strtoul(console_buffer, NULL, 10); |
| 386 | |
| 387 | return 0; |
| 388 | } |
| 389 | |
| 390 | static int get_cfgblock_barcode(char *barcode) |
| 391 | { |
| 392 | if (strlen(barcode) < 16) { |
| 393 | printf("Argument too short, barcode is 16 chars long\n"); |
| 394 | return -1; |
| 395 | } |
| 396 | |
| 397 | /* Get hardware information from the first 8 digits */ |
| 398 | tdx_hw_tag.ver_major = barcode[4] - '0'; |
| 399 | tdx_hw_tag.ver_minor = barcode[5] - '0'; |
| 400 | tdx_hw_tag.ver_assembly = barcode[7] - '0'; |
| 401 | |
| 402 | barcode[4] = '\0'; |
| 403 | tdx_hw_tag.prodid = simple_strtoul(barcode, NULL, 10); |
| 404 | |
| 405 | /* Parse second part of the barcode (serial number */ |
| 406 | barcode += 8; |
| 407 | tdx_serial = simple_strtoul(barcode, NULL, 10); |
| 408 | |
| 409 | return 0; |
| 410 | } |
| 411 | |
| 412 | static int do_cfgblock_create(cmd_tbl_t *cmdtp, int flag, int argc, |
| 413 | char * const argv[]) |
| 414 | { |
| 415 | u8 *config_block; |
| 416 | struct toradex_tag *tag; |
| 417 | size_t size = TDX_CFG_BLOCK_MAX_SIZE; |
| 418 | int offset = 0; |
| 419 | int ret = CMD_RET_SUCCESS; |
| 420 | int err; |
Dominik Sliwa | f1e1059 | 2019-03-25 17:18:27 +0100 | [diff] [blame] | 421 | int force_overwrite = 0; |
Marcel Ziswiler | 7a28dfc | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 422 | |
| 423 | /* Allocate RAM area for config block */ |
| 424 | config_block = memalign(ARCH_DMA_MINALIGN, size); |
| 425 | if (!config_block) { |
| 426 | printf("Not enough malloc space available!\n"); |
| 427 | return CMD_RET_FAILURE; |
| 428 | } |
| 429 | |
| 430 | memset(config_block, 0xff, size); |
| 431 | |
Dominik Sliwa | f1e1059 | 2019-03-25 17:18:27 +0100 | [diff] [blame] | 432 | if (argc >= 3) { |
| 433 | if (argv[2][0] == '-' && argv[2][1] == 'y') |
| 434 | force_overwrite = 1; |
| 435 | } |
| 436 | |
Marcel Ziswiler | 7a28dfc | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 437 | read_tdx_cfg_block(); |
| 438 | if (valid_cfgblock) { |
| 439 | #if defined(CONFIG_TDX_CFG_BLOCK_IS_IN_NAND) |
| 440 | /* |
| 441 | * On NAND devices, recreation is only allowed if the page is |
| 442 | * empty (config block invalid...) |
| 443 | */ |
| 444 | printf("NAND erase block %d need to be erased before creating a Toradex config block\n", |
Grygorii Strashko | bb31462 | 2017-06-26 19:13:06 -0500 | [diff] [blame] | 445 | CONFIG_TDX_CFG_BLOCK_OFFSET / |
| 446 | get_nand_dev_by_index(0)->erasesize); |
Marcel Ziswiler | 7a28dfc | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 447 | goto out; |
| 448 | #elif defined(CONFIG_TDX_CFG_BLOCK_IS_IN_NOR) |
| 449 | /* |
| 450 | * On NOR devices, recreation is only allowed if the sector is |
| 451 | * empty and write protection is off (config block invalid...) |
| 452 | */ |
| 453 | printf("NOR sector at offset 0x%02x need to be erased and unprotected before creating a Toradex config block\n", |
| 454 | CONFIG_TDX_CFG_BLOCK_OFFSET); |
| 455 | goto out; |
| 456 | #else |
Dominik Sliwa | f1e1059 | 2019-03-25 17:18:27 +0100 | [diff] [blame] | 457 | if (!force_overwrite) { |
| 458 | char message[CONFIG_SYS_CBSIZE]; |
| 459 | |
| 460 | sprintf(message, |
| 461 | "A valid Toradex config block is present, still recreate? [y/N] "); |
Marcel Ziswiler | 7a28dfc | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 462 | |
Dominik Sliwa | f1e1059 | 2019-03-25 17:18:27 +0100 | [diff] [blame] | 463 | if (!cli_readline(message)) |
| 464 | goto out; |
Marcel Ziswiler | 7a28dfc | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 465 | |
Dominik Sliwa | f1e1059 | 2019-03-25 17:18:27 +0100 | [diff] [blame] | 466 | if (console_buffer[0] != 'y' && |
| 467 | console_buffer[0] != 'Y') |
| 468 | goto out; |
| 469 | } |
Marcel Ziswiler | 7a28dfc | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 470 | #endif |
| 471 | } |
| 472 | |
| 473 | /* Parse new Toradex config block data... */ |
Dominik Sliwa | f1e1059 | 2019-03-25 17:18:27 +0100 | [diff] [blame] | 474 | if (argc < 3 || (force_overwrite && argc < 4)) { |
Marcel Ziswiler | 7a28dfc | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 475 | err = get_cfgblock_interactive(); |
Dominik Sliwa | f1e1059 | 2019-03-25 17:18:27 +0100 | [diff] [blame] | 476 | } else { |
| 477 | if (force_overwrite) |
| 478 | err = get_cfgblock_barcode(argv[3]); |
| 479 | else |
| 480 | err = get_cfgblock_barcode(argv[2]); |
| 481 | } |
Marcel Ziswiler | 7a28dfc | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 482 | if (err) { |
| 483 | ret = CMD_RET_FAILURE; |
| 484 | goto out; |
| 485 | } |
| 486 | |
| 487 | /* Convert serial number to MAC address (the storage format) */ |
| 488 | tdx_eth_addr.oui = htonl(0x00142dUL << 8); |
| 489 | tdx_eth_addr.nic = htonl(tdx_serial << 8); |
| 490 | |
| 491 | /* Valid Tag */ |
| 492 | tag = (struct toradex_tag *)config_block; |
| 493 | tag->id = TAG_VALID; |
| 494 | tag->flags = TAG_FLAG_VALID; |
| 495 | tag->len = 0; |
| 496 | offset += 4; |
| 497 | |
| 498 | /* Product Tag */ |
| 499 | tag = (struct toradex_tag *)(config_block + offset); |
| 500 | tag->id = TAG_HW; |
| 501 | tag->flags = TAG_FLAG_VALID; |
| 502 | tag->len = 2; |
| 503 | offset += 4; |
| 504 | |
| 505 | memcpy(config_block + offset, &tdx_hw_tag, 8); |
| 506 | offset += 8; |
| 507 | |
| 508 | /* MAC Tag */ |
| 509 | tag = (struct toradex_tag *)(config_block + offset); |
| 510 | tag->id = TAG_MAC; |
| 511 | tag->flags = TAG_FLAG_VALID; |
| 512 | tag->len = 2; |
| 513 | offset += 4; |
| 514 | |
| 515 | memcpy(config_block + offset, &tdx_eth_addr, 6); |
| 516 | offset += 6; |
| 517 | memset(config_block + offset, 0, 32 - offset); |
| 518 | |
| 519 | #if defined(CONFIG_TDX_CFG_BLOCK_IS_IN_MMC) |
| 520 | err = tdx_cfg_block_mmc_storage(config_block, 1); |
| 521 | #elif defined(CONFIG_TDX_CFG_BLOCK_IS_IN_NAND) |
| 522 | err = write_tdx_cfg_block_to_nand(config_block); |
| 523 | #elif defined(CONFIG_TDX_CFG_BLOCK_IS_IN_NOR) |
| 524 | err = write_tdx_cfg_block_to_nor(config_block); |
| 525 | #else |
| 526 | err = -EINVAL; |
| 527 | #endif |
| 528 | if (err) { |
| 529 | printf("Failed to write Toradex config block: %d\n", ret); |
| 530 | ret = CMD_RET_FAILURE; |
| 531 | goto out; |
| 532 | } |
| 533 | |
| 534 | printf("Toradex config block successfully written\n"); |
| 535 | |
| 536 | out: |
| 537 | free(config_block); |
| 538 | return ret; |
| 539 | } |
| 540 | |
| 541 | static int do_cfgblock(cmd_tbl_t *cmdtp, int flag, int argc, |
| 542 | char * const argv[]) |
| 543 | { |
| 544 | int ret; |
| 545 | |
| 546 | if (argc < 2) |
| 547 | return CMD_RET_USAGE; |
| 548 | |
| 549 | if (!strcmp(argv[1], "create")) { |
| 550 | return do_cfgblock_create(cmdtp, flag, argc, argv); |
| 551 | } else if (!strcmp(argv[1], "reload")) { |
| 552 | ret = read_tdx_cfg_block(); |
| 553 | if (ret) { |
| 554 | printf("Failed to reload Toradex config block: %d\n", |
| 555 | ret); |
| 556 | return CMD_RET_FAILURE; |
| 557 | } |
| 558 | return CMD_RET_SUCCESS; |
| 559 | } |
| 560 | |
| 561 | return CMD_RET_USAGE; |
| 562 | } |
| 563 | |
| 564 | U_BOOT_CMD( |
Dominik Sliwa | f1e1059 | 2019-03-25 17:18:27 +0100 | [diff] [blame] | 565 | cfgblock, 4, 0, do_cfgblock, |
Marcel Ziswiler | 7a28dfc | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 566 | "Toradex config block handling commands", |
Dominik Sliwa | f1e1059 | 2019-03-25 17:18:27 +0100 | [diff] [blame] | 567 | "create [-y] [barcode] - (Re-)create Toradex config block\n" |
Marcel Ziswiler | 7a28dfc | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 568 | "cfgblock reload - Reload Toradex config block from flash" |
| 569 | ); |