| Mario Six | 7cab147 | 2018-08-06 10:23:36 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
| 2 | /* |
| 3 | * (C) Copyright 2018 |
| 4 | * Mario Six, Guntermann & Drunck GmbH, mario.six@gdsys.cc |
| 5 | */ |
| 6 | |
| 7 | #ifndef DT_BINDINGS_MPC83XX_CLK_H |
| 8 | #define DT_BINDINGS_MPC83XX_CLK_H |
| 9 | #define MPC83XX_CLK_CORE 0 |
| 10 | #define MPC83XX_CLK_CSB 1 |
| 11 | #define MPC83XX_CLK_QE 2 |
| 12 | #define MPC83XX_CLK_BRG 3 |
| 13 | #define MPC83XX_CLK_LBIU 4 |
| 14 | #define MPC83XX_CLK_LCLK 5 |
| 15 | #define MPC83XX_CLK_MEM 6 |
| 16 | #define MPC83XX_CLK_MEM_SEC 7 |
| 17 | #define MPC83XX_CLK_ENC 8 |
| 18 | #define MPC83XX_CLK_I2C1 9 |
| 19 | #define MPC83XX_CLK_I2C2 10 |
| 20 | #define MPC83XX_CLK_TDM 11 |
| 21 | #define MPC83XX_CLK_SDHC 12 |
| 22 | #define MPC83XX_CLK_TSEC1 13 |
| 23 | #define MPC83XX_CLK_TSEC2 14 |
| 24 | #define MPC83XX_CLK_USBDR 15 |
| 25 | #define MPC83XX_CLK_USBMPH 16 |
| 26 | #define MPC83XX_CLK_PCIEXP1 17 |
| 27 | #define MPC83XX_CLK_PCIEXP2 18 |
| 28 | #define MPC83XX_CLK_SATA 19 |
| 29 | #define MPC83XX_CLK_DMAC 20 |
| 30 | #define MPC83XX_CLK_PCI 21 |
| 31 | /* Count */ |
| 32 | #define MPC83XX_CLK_COUNT 22 |
| 33 | #endif /* DT_BINDINGS_MPC83XX_CLK_H */ |