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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Tom Warren41b68382011-01-27 10:58:05 +00002/*
3 * (C) Copyright 2010,2011
4 * NVIDIA Corporation <www.nvidia.com>
Tom Warren41b68382011-01-27 10:58:05 +00005 */
6
Tom Warrenab371962012-09-19 15:50:56 -07007#ifndef _TEGRA20_H_
8#define _TEGRA20_H_
Tom Warren41b68382011-01-27 10:58:05 +00009
Tom Warrenab371962012-09-19 15:50:56 -070010#define NV_PA_SDRAM_BASE 0x00000000
Marcel Ziswilerc5ecf272014-10-10 23:32:32 +020011#define NV_PA_MC_BASE 0x7000F000
Tom Warren41b68382011-01-27 10:58:05 +000012
Tom Warrenab371962012-09-19 15:50:56 -070013#include <asm/arch-tegra/tegra.h>
Tom Warren41b68382011-01-27 10:58:05 +000014
Tom Warrenab371962012-09-19 15:50:56 -070015#define TEGRA_USB1_BASE 0xC5000000
Tom Warrenab371962012-09-19 15:50:56 -070016
17#define BCT_ODMDATA_OFFSET 4068 /* 12 bytes from end of BCT */
Tom Warren41b68382011-01-27 10:58:05 +000018
Tom Warren795f9d72013-01-23 14:01:01 -070019#define MAX_NUM_CPU 2
20
Tom Warrenab371962012-09-19 15:50:56 -070021#endif /* TEGRA20_H */