wdenk | 3d81826 | 2002-09-22 23:07:35 +0000 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2002 |
| 3 | * Sysgo Real-Time Solutions, GmbH <www.elinos.com> |
| 4 | * Marius Groeger <mgroeger@sysgo.de> |
| 5 | * |
| 6 | * (C) Copyright 2002 |
| 7 | * Gary Jennejohn, DENX Software Engineering, <gj@denx.de> |
| 8 | * |
| 9 | * See file CREDITS for list of people who contributed to this |
| 10 | * project. |
| 11 | * |
| 12 | * This program is free software; you can redistribute it and/or |
| 13 | * modify it under the terms of the GNU General Public License as |
| 14 | * published by the Free Software Foundation; either version 2 of |
| 15 | * the License, or (at your option) any later version. |
| 16 | * |
| 17 | * This program is distributed in the hope that it will be useful, |
| 18 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 19 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 20 | * GNU General Public License for more details. |
| 21 | * |
| 22 | * You should have received a copy of the GNU General Public License |
| 23 | * along with this program; if not, write to the Free Software |
| 24 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 25 | * MA 02111-1307 USA |
| 26 | */ |
| 27 | |
| 28 | /* |
| 29 | * CPU specific code |
| 30 | */ |
| 31 | |
| 32 | #include <common.h> |
| 33 | #include <command.h> |
| 34 | #include <arm920t.h> |
Jean-Christophe PLAGNIOL-VILLARD | 9053b5a | 2009-04-05 13:02:43 +0200 | [diff] [blame^] | 35 | #include <asm/system.h> |
wdenk | 3d81826 | 2002-09-22 23:07:35 +0000 | [diff] [blame] | 36 | |
Wolfgang Denk | 6405a15 | 2006-03-31 18:32:53 +0200 | [diff] [blame] | 37 | #ifdef CONFIG_USE_IRQ |
| 38 | DECLARE_GLOBAL_DATA_PTR; |
| 39 | #endif |
| 40 | |
wdenk | 3d81826 | 2002-09-22 23:07:35 +0000 | [diff] [blame] | 41 | static void cp_delay (void) |
| 42 | { |
| 43 | volatile int i; |
| 44 | |
| 45 | /* copro seems to need some delay between reading and writing */ |
| 46 | for (i = 0; i < 100; i++); |
| 47 | } |
| 48 | |
wdenk | 3d81826 | 2002-09-22 23:07:35 +0000 | [diff] [blame] | 49 | int cpu_init (void) |
| 50 | { |
| 51 | /* |
wdenk | c0aa5c5 | 2003-12-06 19:49:23 +0000 | [diff] [blame] | 52 | * setup up stacks if necessary |
wdenk | 3d81826 | 2002-09-22 23:07:35 +0000 | [diff] [blame] | 53 | */ |
| 54 | #ifdef CONFIG_USE_IRQ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 55 | IRQ_STACK_START = _armboot_start - CONFIG_SYS_MALLOC_LEN - CONFIG_SYS_GBL_DATA_SIZE - 4; |
wdenk | c0aa5c5 | 2003-12-06 19:49:23 +0000 | [diff] [blame] | 56 | FIQ_STACK_START = IRQ_STACK_START - CONFIG_STACKSIZE_IRQ; |
| 57 | #endif |
| 58 | return 0; |
wdenk | 3d81826 | 2002-09-22 23:07:35 +0000 | [diff] [blame] | 59 | } |
| 60 | |
| 61 | int cleanup_before_linux (void) |
| 62 | { |
| 63 | /* |
| 64 | * this function is called just before we call linux |
| 65 | * it prepares the processor for linux |
| 66 | * |
| 67 | * we turn off caches etc ... |
| 68 | */ |
| 69 | |
| 70 | unsigned long i; |
| 71 | |
| 72 | disable_interrupts (); |
| 73 | |
| 74 | /* turn off I/D-cache */ |
| 75 | asm ("mrc p15, 0, %0, c1, c0, 0":"=r" (i)); |
Jean-Christophe PLAGNIOL-VILLARD | 9053b5a | 2009-04-05 13:02:43 +0200 | [diff] [blame^] | 76 | i &= ~(CR_C | CR_I); |
wdenk | 3d81826 | 2002-09-22 23:07:35 +0000 | [diff] [blame] | 77 | asm ("mcr p15, 0, %0, c1, c0, 0": :"r" (i)); |
| 78 | |
| 79 | /* flush I/D-cache */ |
| 80 | i = 0; |
| 81 | asm ("mcr p15, 0, %0, c7, c7, 0": :"r" (i)); |
Wolfgang Denk | adf20a1 | 2005-09-25 01:48:28 +0200 | [diff] [blame] | 82 | |
wdenk | 3d81826 | 2002-09-22 23:07:35 +0000 | [diff] [blame] | 83 | return (0); |
| 84 | } |
| 85 | |
| 86 | int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) |
| 87 | { |
wdenk | 3d81826 | 2002-09-22 23:07:35 +0000 | [diff] [blame] | 88 | disable_interrupts (); |
| 89 | reset_cpu (0); |
| 90 | /*NOTREACHED*/ |
| 91 | return (0); |
| 92 | } |
| 93 | |
| 94 | void icache_enable (void) |
| 95 | { |
| 96 | ulong reg; |
| 97 | |
Jean-Christophe PLAGNIOL-VILLARD | 9053b5a | 2009-04-05 13:02:43 +0200 | [diff] [blame^] | 98 | reg = get_cr (); /* get control reg. */ |
wdenk | 3d81826 | 2002-09-22 23:07:35 +0000 | [diff] [blame] | 99 | cp_delay (); |
Jean-Christophe PLAGNIOL-VILLARD | 9053b5a | 2009-04-05 13:02:43 +0200 | [diff] [blame^] | 100 | set_cr (reg | CR_I); |
wdenk | 3d81826 | 2002-09-22 23:07:35 +0000 | [diff] [blame] | 101 | } |
| 102 | |
| 103 | void icache_disable (void) |
| 104 | { |
| 105 | ulong reg; |
| 106 | |
Jean-Christophe PLAGNIOL-VILLARD | 9053b5a | 2009-04-05 13:02:43 +0200 | [diff] [blame^] | 107 | reg = get_cr (); |
wdenk | 3d81826 | 2002-09-22 23:07:35 +0000 | [diff] [blame] | 108 | cp_delay (); |
Jean-Christophe PLAGNIOL-VILLARD | 9053b5a | 2009-04-05 13:02:43 +0200 | [diff] [blame^] | 109 | set_cr (reg & ~CR_I); |
wdenk | 3d81826 | 2002-09-22 23:07:35 +0000 | [diff] [blame] | 110 | } |
| 111 | |
| 112 | int icache_status (void) |
| 113 | { |
Jean-Christophe PLAGNIOL-VILLARD | 9053b5a | 2009-04-05 13:02:43 +0200 | [diff] [blame^] | 114 | return (get_cr () & CR_I) != 0; |
wdenk | 3d81826 | 2002-09-22 23:07:35 +0000 | [diff] [blame] | 115 | } |
| 116 | |
| 117 | #ifdef USE_920T_MMU |
| 118 | /* It makes no sense to use the dcache if the MMU is not enabled */ |
| 119 | void dcache_enable (void) |
| 120 | { |
| 121 | ulong reg; |
| 122 | |
Jean-Christophe PLAGNIOL-VILLARD | 9053b5a | 2009-04-05 13:02:43 +0200 | [diff] [blame^] | 123 | reg = get_cr (); |
wdenk | 3d81826 | 2002-09-22 23:07:35 +0000 | [diff] [blame] | 124 | cp_delay (); |
Jean-Christophe PLAGNIOL-VILLARD | 9053b5a | 2009-04-05 13:02:43 +0200 | [diff] [blame^] | 125 | set_cr (reg | CR_C); |
wdenk | 3d81826 | 2002-09-22 23:07:35 +0000 | [diff] [blame] | 126 | } |
| 127 | |
| 128 | void dcache_disable (void) |
| 129 | { |
| 130 | ulong reg; |
| 131 | |
Jean-Christophe PLAGNIOL-VILLARD | 9053b5a | 2009-04-05 13:02:43 +0200 | [diff] [blame^] | 132 | reg = get_cr (); |
wdenk | 3d81826 | 2002-09-22 23:07:35 +0000 | [diff] [blame] | 133 | cp_delay (); |
Jean-Christophe PLAGNIOL-VILLARD | 9053b5a | 2009-04-05 13:02:43 +0200 | [diff] [blame^] | 134 | reg &= ~CR_C; |
| 135 | set_cr (reg); |
wdenk | 3d81826 | 2002-09-22 23:07:35 +0000 | [diff] [blame] | 136 | } |
| 137 | |
| 138 | int dcache_status (void) |
| 139 | { |
Jean-Christophe PLAGNIOL-VILLARD | 9053b5a | 2009-04-05 13:02:43 +0200 | [diff] [blame^] | 140 | return (get_cr () & CR_C) != 0; |
wdenk | 3d81826 | 2002-09-22 23:07:35 +0000 | [diff] [blame] | 141 | } |
| 142 | #endif |