Yixun Lan | 904043b | 2023-07-08 19:24:35 +0800 | [diff] [blame^] | 1 | .. SPDX-License-Identifier: GPL-2.0+ |
| 2 | |
| 3 | Sipeed's Lichee PI 4A based on T-HEAD TH1520 SoC |
| 4 | ================================================ |
| 5 | |
| 6 | The LicheePi4A is a high-performance RISC-V SBC based on TH1520(4xC910@1.85GHz), |
| 7 | comes with 4/8/16 GB RAM, and up to 128GB eMMC, and rich peripherals. |
| 8 | |
| 9 | - SoC T-HEAD TH1520 SoC |
| 10 | - System Memory 4GB, 8GB, or 16GB LPDDR4X |
| 11 | - Storage eMMC flash with 8/32/128 GB |
| 12 | - external microSD slot |
| 13 | - Networking 2x Gigabit Ethernet |
| 14 | - WiFi+BT |
| 15 | - Display HDMI2.0, 4-lane MIPI DSI |
| 16 | - Camera 4-lane MIPI CSI + 2x2-lane MIPI CSI |
| 17 | - Audio Onboard Speaker, 2xMEMS MIC, 3.5mm headphone jack |
| 18 | - USB 4xUSB3.0 Type-A, 1xUSB2.0 Type-C |
| 19 | - GPIO 2x10Pin breakout, UART/IIC/SPI |
| 20 | - Power DC 12V/2A, POE 5V/2.4A, USB Type-C 5V/2A |
| 21 | |
| 22 | TH1520 RISC-V SoC |
| 23 | ----------------- |
| 24 | |
| 25 | The TH1520 SoC consist of quad-core RISC-V Xuantie C910 (RV64GCV) processor, |
| 26 | Xuantie C906 audio DSP, low power Xuantie E902 core, it also integrate |
| 27 | Imagination GPU for graphics, and 4 TOPS NPU for AI acceleration. |
| 28 | |
| 29 | Mainline support |
| 30 | ---------------- |
| 31 | |
| 32 | The support for following drivers are already enabled: |
| 33 | |
| 34 | 1. ns16550 UART Driver. |
| 35 | |
| 36 | Building |
| 37 | ~~~~~~~~ |
| 38 | |
| 39 | 1. Add the RISC-V toolchain to your PATH. |
| 40 | 2. Setup ARCH & cross compilation environment variable: |
| 41 | |
| 42 | .. code-block:: none |
| 43 | |
| 44 | export CROSS_COMPILE=<riscv64 toolchain prefix> |
| 45 | |
| 46 | The U-Boot is capable of running in M-Mode, so we can directly build it. |
| 47 | |
| 48 | .. code-block:: console |
| 49 | |
| 50 | cd <U-Boot-dir> |
| 51 | make th1520_lpi4a_defconfig |
| 52 | make |
| 53 | |
| 54 | This will generate u-boot-dtb.bin |
| 55 | |
| 56 | Booting |
| 57 | ~~~~~~~ |
| 58 | |
| 59 | Currently, we rely on vendor u-boot to initialize the clock, pinctrl subsystem, |
| 60 | and chain load the mainline u-boot image either via tftp or emmc storage, |
| 61 | then bootup from it. |
| 62 | |
| 63 | Sample boot log from Lichee PI 4A board via tftp |
| 64 | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
| 65 | |
| 66 | .. code-block:: none |
| 67 | |
| 68 | brom_ver 8 |
| 69 | [APP][E] protocol_connect failed, exit. |
| 70 | |
| 71 | U-Boot SPL 2020.01-00016-g8c870a6be8 (May 20 2023 - 01:04:49 +0000) |
| 72 | FM[1] lpddr4x dualrank freq=3733 64bit dbi_off=n sdram init |
| 73 | ddr initialized, jump to uboot |
| 74 | image has no header |
| 75 | |
| 76 | |
| 77 | U-Boot 2020.01-00016-g8c870a6be8 (May 20 2023 - 01:04:49 +0000) |
| 78 | |
| 79 | CPU: rv64imafdcvsu |
| 80 | Model: T-HEAD c910 light |
| 81 | DRAM: 8 GiB |
| 82 | C910 CPU FREQ: 750MHz |
| 83 | AHB2_CPUSYS_HCLK FREQ: 250MHz |
| 84 | AHB3_CPUSYS_PCLK FREQ: 125MHz |
| 85 | PERISYS_AHB_HCLK FREQ: 250MHz |
| 86 | PERISYS_APB_PCLK FREQ: 62MHz |
| 87 | GMAC PLL POSTDIV FREQ: 1000MHZ |
| 88 | DPU0 PLL POSTDIV FREQ: 1188MHZ |
| 89 | DPU1 PLL POSTDIV FREQ: 1188MHZ |
| 90 | MMC: sdhci@ffe7080000: 0, sd@ffe7090000: 1 |
| 91 | Loading Environment from MMC... OK |
| 92 | Error reading output register |
| 93 | Warning: cannot get lcd-en GPIO |
| 94 | LCD panel cannot be found : -121 |
| 95 | splash screen startup cost 16 ms |
| 96 | In: serial |
| 97 | Out: serial |
| 98 | Err: serial |
| 99 | Net: |
| 100 | Warning: ethernet@ffe7070000 using MAC address from ROM |
| 101 | eth0: ethernet@ffe7070000ethernet@ffe7070000:0 is connected to ethernet@ffe7070000. Reconnecting to ethernet@ffe7060000 |
| 102 | |
| 103 | Warning: ethernet@ffe7060000 (eth1) using random MAC address - 42:25:d4:16:5f:fc |
| 104 | , eth1: ethernet@ffe7060000 |
| 105 | Hit any key to stop autoboot: 2 |
| 106 | ethernet@ffe7060000 Waiting for PHY auto negotiation to complete.. done |
| 107 | Speed: 1000, full duplex |
| 108 | Using ethernet@ffe7070000 device |
| 109 | TFTP from server 192.168.8.50; our IP address is 192.168.8.45 |
| 110 | Filename 'u-boot-dtb.bin'. |
| 111 | Load address: 0x1c00000 |
| 112 | Loading: * ######################### |
| 113 | 8 MiB/s |
| 114 | done |
| 115 | Bytes transferred = 376686 (5bf6e hex) |
| 116 | ## Starting application at 0x01C00000 ... |
| 117 | |
| 118 | U-Boot 2023.07-rc2-00004-g1befbe31c1 (May 23 2023 - 18:40:01 +0800) |
| 119 | |
| 120 | CPU: rv64imafdc |
| 121 | Model: Sipeed Lichee Pi 4A |
| 122 | DRAM: 8 GiB |
| 123 | Core: 13 devices, 6 uclasses, devicetree: separate |
| 124 | Loading Environment from <NULL>... OK |
| 125 | In: serial@ffe7014000 |
| 126 | Out: serial@ffe7014000 |
| 127 | Err: serial@ffe7014000 |
| 128 | Model: Sipeed Lichee Pi 4A |
| 129 | LPI4A=> |