blob: 817ce17ff1607c217bc8a1bf6bb75b92541e8d7b [file] [log] [blame]
Dirk Eibach3397ec62008-10-08 15:37:50 +02001/*
2 * (C) Copyright 2007-2008
3 * Dirk Eibach, Guntermann & Drunck GmbH, eibach@gdsys.de
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24#include <common.h>
25#include <command.h>
26#include <asm/processor.h>
27#include <asm/io.h>
28
29#define HWTYPE_CCX16 1
30#define HWREV_300 3
31
32int board_early_init_f(void)
33{
34 mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */
35 mtdcr(uicer, 0x00000000); /* disable all ints */
36 mtdcr(uiccr, 0x00000000); /* set all to be non-critical */
37 mtdcr(uicpr, 0xFFFFFF80); /* set int polarities */
38 mtdcr(uictr, 0x10000000); /* set int trigger levels */
39 mtdcr(uicvcr, 0x00000001); /* set vect base=0,INT0 highest prio */
40 mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */
41
42 /*
43 * EBC Configuration Register: set ready timeout to 512 ebc-clks
44 * -> ca. 15 us
45 */
46 mtebc(epcr, 0xa8400000); /* ebc always driven */
47
48 return 0;
49}
50
51/*
52 * Check Board Identity:
53 */
54int checkboard(void)
55{
56 char *s = getenv("serial#");
57 u16 val = in_le16((void *)CONFIG_FPGA_BASE + 2);
58 u8 unit_type;
59 u8 hardware_cpu_ports;
60 u8 hardware_con_ports;
61 u8 hardware_version;
62
63 printf("Board: CATCenter Neo");
64
65 if (s != NULL) {
66 puts(", serial# ");
67 puts(s);
68 }
69 puts("\n ");
70
71 unit_type = (val & 0xf000) >> 12;
72 hardware_cpu_ports = ((val & 0x0f00) >> 8) * 8;
73 hardware_con_ports = ((val & 0x00f0) >> 4) * 2;
74 hardware_version = val & 0x000f;
75
76 switch (unit_type) {
77 case HWTYPE_CCX16:
78 printf("CCX16-FPGA (80 UARTs)");
79 break;
80
81 default:
82 printf("UnitType %d, unsupported", unit_type);
83 break;
84 }
85
86 printf(", %d cpu ports, %d console ports,",
87 hardware_cpu_ports, hardware_con_ports);
88
89 switch (hardware_version) {
90 case HWREV_300:
91 printf(" HW-Ver 3.00\n");
92 break;
93
94 default:
95 printf(" HW-Ver %d, unsupported\n",
96 hardware_version);
97 break;
98 }
99
100 return 0;
101}