blob: 5061f6c6fd16a4eb4d0271f514d100cb0c7aad50 [file] [log] [blame]
Stefan Roese73606402015-10-20 15:14:47 +02001/*
2 * Copyright (C) 2015 Stefan Roese <sr@denx.de>
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6
7#ifndef _CONFIG_CLEARFOG_H
8#define _CONFIG_CLEARFOG_H
9
10/*
11 * High Level Configuration Options (easy to change)
12 */
Stefan Roese73606402015-10-20 15:14:47 +020013
14#define CONFIG_DISPLAY_BOARDINFO_LATE
15
16/*
17 * TEXT_BASE needs to be below 16MiB, since this area is scrubbed
18 * for DDR ECC byte filling in the SPL before loading the main
19 * U-Boot into it.
20 */
21#define CONFIG_SYS_TEXT_BASE 0x00800000
22#define CONFIG_SYS_TCLK 250000000 /* 250MHz */
23
24/*
25 * Commands configuration
26 */
Stefan Roese73606402015-10-20 15:14:47 +020027
28/* I2C */
29#define CONFIG_SYS_I2C
30#define CONFIG_SYS_I2C_MVTWSI
31#define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE
32#define CONFIG_SYS_I2C_SLAVE 0x0
33#define CONFIG_SYS_I2C_SPEED 100000
34
35/* SPI NOR flash default params, used by sf commands */
36#define CONFIG_SF_DEFAULT_SPEED 1000000
37#define CONFIG_SF_DEFAULT_MODE SPI_MODE_3
38#define CONFIG_SPI_FLASH_STMICRO
39
40/*
41 * SDIO/MMC Card Configuration
42 */
Stefan Roese73606402015-10-20 15:14:47 +020043#define CONFIG_SYS_MMC_BASE MVEBU_SDIO_BASE
44
45/* Partition support */
Stefan Roese73606402015-10-20 15:14:47 +020046
47/* Additional FS support/configuration */
48#define CONFIG_SUPPORT_VFAT
49
50/* USB/EHCI configuration */
51#define CONFIG_EHCI_IS_TDI
52
53#define CONFIG_ENV_MIN_ENTRIES 128
54
55/* Environment in MMC */
Stefan Roese73606402015-10-20 15:14:47 +020056#define CONFIG_SYS_MMC_ENV_DEV 0
57#define CONFIG_ENV_SECT_SIZE 0x200
58#define CONFIG_ENV_SIZE 0x10000
59/*
60 * For SD - reserve 1 LBA for MBR + 1M for u-boot image. The MMC/eMMC
61 * boot image starts @ LBA-0.
62 * As result in MMC/eMMC case it will be a 1 sector gap between u-boot
63 * image and environment
64 */
65#define CONFIG_ENV_OFFSET 0xf0000
66#define CONFIG_ENV_ADDR CONFIG_ENV_OFFSET
67
68#define CONFIG_PHY_MARVELL /* there is a marvell phy */
69#define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */
70
71/* PCIe support */
72#ifndef CONFIG_SPL_BUILD
Stefan Roese73606402015-10-20 15:14:47 +020073#define CONFIG_PCI_MVEBU
Stefan Roese73606402015-10-20 15:14:47 +020074#define CONFIG_PCI_SCAN_SHOW
75#endif
76
Stefan Roese73606402015-10-20 15:14:47 +020077#define CONFIG_SYS_ALT_MEMTEST
78
79/* Keep device tree and initrd in lower memory so the kernel can access them */
Patrick Wildt7e5b0192017-05-10 15:12:34 +020080#define RELOCATION_LIMITS_ENV_SETTINGS \
Stefan Roese73606402015-10-20 15:14:47 +020081 "fdt_high=0x10000000\0" \
82 "initrd_high=0x10000000\0"
83
84/* SPL */
85/*
86 * Select the boot device here
87 *
88 * Currently supported are:
89 * SPL_BOOT_SPI_NOR_FLASH - Booting via SPI NOR flash
90 * SPL_BOOT_SDIO_MMC_CARD - Booting via SDIO/MMC card (partition 1)
91 */
92#define SPL_BOOT_SPI_NOR_FLASH 1
93#define SPL_BOOT_SDIO_MMC_CARD 2
94#define CONFIG_SPL_BOOT_DEVICE SPL_BOOT_SDIO_MMC_CARD
95
96/* Defines for SPL */
97#define CONFIG_SPL_FRAMEWORK
98#define CONFIG_SPL_SIZE (140 << 10)
99#define CONFIG_SPL_TEXT_BASE 0x40000030
100#define CONFIG_SPL_MAX_SIZE (CONFIG_SPL_SIZE - 0x0030)
101
102#define CONFIG_SPL_BSS_START_ADDR (0x40000000 + CONFIG_SPL_SIZE)
103#define CONFIG_SPL_BSS_MAX_SIZE (16 << 10)
104
105#ifdef CONFIG_SPL_BUILD
106#define CONFIG_SYS_MALLOC_SIMPLE
107#endif
108
109#define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10))
110#define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)
111
Stefan Roese73606402015-10-20 15:14:47 +0200112#if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SPI_NOR_FLASH
113/* SPL related SPI defines */
Stefan Roese73606402015-10-20 15:14:47 +0200114#define CONFIG_SPL_SPI_LOAD
Stefan Roese73606402015-10-20 15:14:47 +0200115#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000
116#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS
117#endif
118
119#if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SDIO_MMC_CARD
120/* SPL related MMC defines */
Stefan Roese73606402015-10-20 15:14:47 +0200121#define CONFIG_SYS_MMC_U_BOOT_OFFS (160 << 10)
122#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_MMC_U_BOOT_OFFS
Stefan Roese73606402015-10-20 15:14:47 +0200123#ifdef CONFIG_SPL_BUILD
124#define CONFIG_FIXED_SDHCI_ALIGNED_BUFFER 0x00180000 /* in SDRAM */
125#endif
126#endif
127
Stefan Roese73606402015-10-20 15:14:47 +0200128/*
129 * mv-common.h should be defined after CMD configs since it used them
130 * to enable certain macros
131 */
132#include "mv-common.h"
133
Patrick Wildt7e5b0192017-05-10 15:12:34 +0200134/* Include the common distro boot environment */
135#ifndef CONFIG_SPL_BUILD
136#include <config_distro_defaults.h>
137
138#ifdef CONFIG_MMC
139#define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0)
140#else
141#define BOOT_TARGET_DEVICES_MMC(func)
142#endif
143
144#ifdef CONFIG_USB_STORAGE
145#define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0)
146#else
147#define BOOT_TARGET_DEVICES_USB(func)
148#endif
149
150#define BOOT_TARGET_DEVICES(func) \
151 BOOT_TARGET_DEVICES_MMC(func) \
152 BOOT_TARGET_DEVICES_USB(func) \
153 func(PXE, pxe, na) \
154 func(DHCP, dhcp, na)
155
156#define KERNEL_ADDR_R __stringify(0x800000)
157#define FDT_ADDR_R __stringify(0x100000)
158#define RAMDISK_ADDR_R __stringify(0x1800000)
159#define SCRIPT_ADDR_R __stringify(0x200000)
160#define PXEFILE_ADDR_R __stringify(0x300000)
161
162#define LOAD_ADDRESS_ENV_SETTINGS \
163 "kernel_addr_r=" KERNEL_ADDR_R "\0" \
164 "fdt_addr_r=" FDT_ADDR_R "\0" \
165 "ramdisk_addr_r=" RAMDISK_ADDR_R "\0" \
166 "scriptaddr=" SCRIPT_ADDR_R "\0" \
167 "pxefile_addr_r=" PXEFILE_ADDR_R "\0"
168
169#include <config_distro_bootcmd.h>
170
171#define CONFIG_EXTRA_ENV_SETTINGS \
172 RELOCATION_LIMITS_ENV_SETTINGS \
173 LOAD_ADDRESS_ENV_SETTINGS \
174 "fdtfile=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \
175 "console=ttyS0,115200\0" \
176 BOOTENV
177
178#endif /* CONFIG_SPL_BUILD */
179
Stefan Roese73606402015-10-20 15:14:47 +0200180#endif /* _CONFIG_CLEARFOG_H */