Sergei Poselenov | f2bf96c | 2008-04-30 11:42:50 +0200 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2008 |
| 3 | * Sergei Poselenov, Emcraft Systems, sposelenov@emcraft.com. |
| 4 | * |
| 5 | * Copyright 2004 Freescale Semiconductor. |
| 6 | * (C) Copyright 2002,2003, Motorola Inc. |
| 7 | * Xianghua Xiao, (X.Xiao@motorola.com) |
| 8 | * |
| 9 | * (C) Copyright 2002 Scott McNutt <smcnutt@artesyncp.com> |
| 10 | * |
Wolfgang Denk | d79de1d | 2013-07-08 09:37:19 +0200 | [diff] [blame] | 11 | * SPDX-License-Identifier: GPL-2.0+ |
Sergei Poselenov | f2bf96c | 2008-04-30 11:42:50 +0200 | [diff] [blame] | 12 | */ |
| 13 | |
| 14 | #include <common.h> |
| 15 | #include <pci.h> |
| 16 | #include <asm/processor.h> |
| 17 | #include <asm/immap_85xx.h> |
| 18 | #include <ioports.h> |
| 19 | #include <flash.h> |
Sergei Poselenov | 09842c5 | 2008-05-07 15:10:49 +0200 | [diff] [blame] | 20 | #include <libfdt.h> |
| 21 | #include <fdt_support.h> |
Andy Fleming | 7109ea3 | 2008-06-10 18:49:34 -0500 | [diff] [blame] | 22 | #include <asm/io.h> |
u-boot@bugs.denx.de | bbab0bc | 2008-09-11 15:40:01 +0200 | [diff] [blame] | 23 | #include <i2c.h> |
| 24 | #include <mb862xx.h> |
| 25 | #include <video_fb.h> |
Sergei Poselenov | 96dd16b | 2008-06-06 15:42:41 +0200 | [diff] [blame] | 26 | #include "upm_table.h" |
Detlev Zundel | 0244f67 | 2008-08-15 15:42:12 +0200 | [diff] [blame] | 27 | |
Sergei Poselenov | f2bf96c | 2008-04-30 11:42:50 +0200 | [diff] [blame] | 28 | DECLARE_GLOBAL_DATA_PTR; |
| 29 | |
| 30 | extern flash_info_t flash_info[]; /* FLASH chips info */ |
u-boot@bugs.denx.de | bbab0bc | 2008-09-11 15:40:01 +0200 | [diff] [blame] | 31 | extern GraphicDevice mb862xx; |
Sergei Poselenov | f2bf96c | 2008-04-30 11:42:50 +0200 | [diff] [blame] | 32 | |
| 33 | void local_bus_init (void); |
| 34 | ulong flash_get_size (ulong base, int banknum); |
| 35 | |
| 36 | int checkboard (void) |
| 37 | { |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 38 | volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); |
Wolfgang Denk | 5c1cfee | 2011-05-04 10:32:28 +0000 | [diff] [blame] | 39 | char buf[64]; |
Sergei Poselenov | e13be1a | 2008-05-27 13:47:00 +0200 | [diff] [blame] | 40 | int f; |
Simon Glass | 64b723f | 2017-08-03 12:22:12 -0600 | [diff] [blame] | 41 | int i = env_get_f("serial#", buf, sizeof(buf)); |
Wolfgang Denk | 5c1cfee | 2011-05-04 10:32:28 +0000 | [diff] [blame] | 42 | #ifdef CONFIG_PCI |
| 43 | char *src; |
| 44 | #endif |
Sergei Poselenov | f2bf96c | 2008-04-30 11:42:50 +0200 | [diff] [blame] | 45 | |
| 46 | puts("Board: Socrates"); |
Wolfgang Denk | 5c1cfee | 2011-05-04 10:32:28 +0000 | [diff] [blame] | 47 | if (i > 0) { |
Sergei Poselenov | f2bf96c | 2008-04-30 11:42:50 +0200 | [diff] [blame] | 48 | puts(", serial# "); |
Wolfgang Denk | 5c1cfee | 2011-05-04 10:32:28 +0000 | [diff] [blame] | 49 | puts(buf); |
Sergei Poselenov | f2bf96c | 2008-04-30 11:42:50 +0200 | [diff] [blame] | 50 | } |
| 51 | putc('\n'); |
| 52 | |
| 53 | #ifdef CONFIG_PCI |
Andy Fleming | 7109ea3 | 2008-06-10 18:49:34 -0500 | [diff] [blame] | 54 | /* Check the PCI_clk sel bit */ |
| 55 | if (in_be32(&gur->porpllsr) & (1<<15)) { |
Sergei Poselenov | e13be1a | 2008-05-27 13:47:00 +0200 | [diff] [blame] | 56 | src = "SYSCLK"; |
| 57 | f = CONFIG_SYS_CLK_FREQ; |
| 58 | } else { |
| 59 | src = "PCI_CLK"; |
| 60 | f = CONFIG_PCI_CLK_FREQ; |
| 61 | } |
| 62 | printf ("PCI1: 32 bit, %d MHz (%s)\n", f/1000000, src); |
Sergei Poselenov | f2bf96c | 2008-04-30 11:42:50 +0200 | [diff] [blame] | 63 | #else |
| 64 | printf ("PCI1: disabled\n"); |
| 65 | #endif |
| 66 | |
| 67 | /* |
| 68 | * Initialize local bus. |
| 69 | */ |
| 70 | local_bus_init (); |
Sergei Poselenov | f2bf96c | 2008-04-30 11:42:50 +0200 | [diff] [blame] | 71 | return 0; |
| 72 | } |
| 73 | |
| 74 | int misc_init_r (void) |
| 75 | { |
Sergei Poselenov | f2bf96c | 2008-04-30 11:42:50 +0200 | [diff] [blame] | 76 | /* |
| 77 | * Adjust flash start and offset to detected values |
| 78 | */ |
| 79 | gd->bd->bi_flashstart = 0 - gd->bd->bi_flashsize; |
| 80 | gd->bd->bi_flashoffset = 0; |
| 81 | |
| 82 | /* |
| 83 | * Check if boot FLASH isn't max size |
| 84 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 85 | if (gd->bd->bi_flashsize < (0 - CONFIG_SYS_FLASH0)) { |
Becky Bruce | 0d4cee1 | 2010-06-17 11:37:20 -0500 | [diff] [blame] | 86 | set_lbc_or(0, gd->bd->bi_flashstart | |
| 87 | (CONFIG_SYS_OR0_PRELIM & 0x00007fff)); |
| 88 | set_lbc_br(0, gd->bd->bi_flashstart | |
| 89 | (CONFIG_SYS_BR0_PRELIM & 0x00007fff)); |
Sergei Poselenov | f2bf96c | 2008-04-30 11:42:50 +0200 | [diff] [blame] | 90 | |
| 91 | /* |
| 92 | * Re-check to get correct base address |
| 93 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 94 | flash_get_size(gd->bd->bi_flashstart, CONFIG_SYS_MAX_FLASH_BANKS - 1); |
Sergei Poselenov | f2bf96c | 2008-04-30 11:42:50 +0200 | [diff] [blame] | 95 | } |
| 96 | |
| 97 | /* |
| 98 | * Check if only one FLASH bank is available |
| 99 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 100 | if (gd->bd->bi_flashsize != CONFIG_SYS_MAX_FLASH_BANKS * (0 - CONFIG_SYS_FLASH0)) { |
Becky Bruce | 0d4cee1 | 2010-06-17 11:37:20 -0500 | [diff] [blame] | 101 | set_lbc_or(1, 0); |
| 102 | set_lbc_br(1, 0); |
Sergei Poselenov | f2bf96c | 2008-04-30 11:42:50 +0200 | [diff] [blame] | 103 | |
| 104 | /* |
| 105 | * Re-do flash protection upon new addresses |
| 106 | */ |
| 107 | flash_protect (FLAG_PROTECT_CLEAR, |
| 108 | gd->bd->bi_flashstart, 0xffffffff, |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 109 | &flash_info[CONFIG_SYS_MAX_FLASH_BANKS - 1]); |
Sergei Poselenov | f2bf96c | 2008-04-30 11:42:50 +0200 | [diff] [blame] | 110 | |
| 111 | /* Monitor protection ON by default */ |
| 112 | flash_protect (FLAG_PROTECT_SET, |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 113 | CONFIG_SYS_MONITOR_BASE, CONFIG_SYS_MONITOR_BASE + monitor_flash_len - 1, |
| 114 | &flash_info[CONFIG_SYS_MAX_FLASH_BANKS - 1]); |
Sergei Poselenov | f2bf96c | 2008-04-30 11:42:50 +0200 | [diff] [blame] | 115 | |
| 116 | /* Environment protection ON by default */ |
| 117 | flash_protect (FLAG_PROTECT_SET, |
Jean-Christophe PLAGNIOL-VILLARD | 7e1cda6 | 2008-09-10 22:48:06 +0200 | [diff] [blame] | 118 | CONFIG_ENV_ADDR, |
| 119 | CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1, |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 120 | &flash_info[CONFIG_SYS_MAX_FLASH_BANKS - 1]); |
Sergei Poselenov | f2bf96c | 2008-04-30 11:42:50 +0200 | [diff] [blame] | 121 | |
| 122 | /* Redundant environment protection ON by default */ |
| 123 | flash_protect (FLAG_PROTECT_SET, |
Jean-Christophe PLAGNIOL-VILLARD | 7e1cda6 | 2008-09-10 22:48:06 +0200 | [diff] [blame] | 124 | CONFIG_ENV_ADDR_REDUND, |
Wolfgang Denk | 4791383 | 2009-05-15 00:16:03 +0200 | [diff] [blame] | 125 | CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SECT_SIZE - 1, |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 126 | &flash_info[CONFIG_SYS_MAX_FLASH_BANKS - 1]); |
Sergei Poselenov | f2bf96c | 2008-04-30 11:42:50 +0200 | [diff] [blame] | 127 | } |
| 128 | |
| 129 | return 0; |
| 130 | } |
| 131 | |
| 132 | /* |
| 133 | * Initialize Local Bus |
| 134 | */ |
| 135 | void local_bus_init (void) |
| 136 | { |
Becky Bruce | 0d4cee1 | 2010-06-17 11:37:20 -0500 | [diff] [blame] | 137 | volatile fsl_lbc_t *lbc = LBC_BASE_ADDR; |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 138 | volatile ccsr_local_ecm_t *ecm = (void *)(CONFIG_SYS_MPC85xx_ECM_ADDR); |
Detlev Zundel | 0244f67 | 2008-08-15 15:42:12 +0200 | [diff] [blame] | 139 | sys_info_t sysinfo; |
| 140 | uint clkdiv; |
| 141 | uint lbc_mhz; |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 142 | uint lcrr = CONFIG_SYS_LBC_LCRR; |
Detlev Zundel | 0244f67 | 2008-08-15 15:42:12 +0200 | [diff] [blame] | 143 | |
| 144 | get_sys_info (&sysinfo); |
Trent Piepho | 1b560ac | 2008-12-03 15:16:34 -0800 | [diff] [blame] | 145 | clkdiv = lbc->lcrr & LCRR_CLKDIV; |
Prabhakar Kushwaha | d169808 | 2013-08-16 14:52:26 +0530 | [diff] [blame] | 146 | lbc_mhz = sysinfo.freq_systembus / 1000000 / clkdiv; |
Detlev Zundel | 0244f67 | 2008-08-15 15:42:12 +0200 | [diff] [blame] | 147 | |
| 148 | /* Disable PLL bypass for Local Bus Clock >= 66 MHz */ |
| 149 | if (lbc_mhz >= 66) |
| 150 | lcrr &= ~LCRR_DBYP; /* DLL Enabled */ |
| 151 | else |
| 152 | lcrr |= LCRR_DBYP; /* DLL Bypass */ |
| 153 | |
| 154 | out_be32 (&lbc->lcrr, lcrr); |
| 155 | asm ("sync;isync;msync"); |
Sergei Poselenov | f2bf96c | 2008-04-30 11:42:50 +0200 | [diff] [blame] | 156 | |
Detlev Zundel | 0244f67 | 2008-08-15 15:42:12 +0200 | [diff] [blame] | 157 | out_be32 (&lbc->ltesr, 0xffffffff); /* Clear LBC error interrupts */ |
| 158 | out_be32 (&lbc->lteir, 0xffffffff); /* Enable LBC error interrupts */ |
| 159 | out_be32 (&ecm->eedr, 0xffffffff); /* Clear ecm errors */ |
| 160 | out_be32 (&ecm->eeer, 0xffffffff); /* Enable ecm errors */ |
Sergei Poselenov | f2bf96c | 2008-04-30 11:42:50 +0200 | [diff] [blame] | 161 | |
Detlev Zundel | 0244f67 | 2008-08-15 15:42:12 +0200 | [diff] [blame] | 162 | /* Init UPMA for FPGA access */ |
| 163 | out_be32 (&lbc->mamr, 0x44440); /* Use a customer-supplied value */ |
| 164 | upmconfig (UPMA, (uint *)UPMTableA, sizeof(UPMTableA)/sizeof(int)); |
Anatolij Gustschin | e6f5c91 | 2008-08-15 15:42:13 +0200 | [diff] [blame] | 165 | |
u-boot@bugs.denx.de | bbab0bc | 2008-09-11 15:40:01 +0200 | [diff] [blame] | 166 | /* Init UPMB for Lime controller access */ |
| 167 | out_be32 (&lbc->mbmr, 0x444440); /* Use a customer-supplied value */ |
| 168 | upmconfig (UPMB, (uint *)UPMTableB, sizeof(UPMTableB)/sizeof(int)); |
Sergei Poselenov | f2bf96c | 2008-04-30 11:42:50 +0200 | [diff] [blame] | 169 | } |
| 170 | |
| 171 | #if defined(CONFIG_PCI) |
| 172 | /* |
| 173 | * Initialize PCI Devices, report devices found. |
| 174 | */ |
| 175 | |
| 176 | #ifndef CONFIG_PCI_PNP |
| 177 | static struct pci_config_table pci_mpc85xxads_config_table[] = { |
| 178 | {PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, |
| 179 | PCI_IDSEL_NUMBER, PCI_ANY_ID, |
| 180 | pci_cfgfunc_config_device, {PCI_ENET0_IOADDR, |
| 181 | PCI_ENET0_MEMADDR, |
| 182 | PCI_COMMAND_MEMORY | |
| 183 | PCI_COMMAND_MASTER}}, |
| 184 | {} |
| 185 | }; |
| 186 | #endif |
| 187 | |
| 188 | |
| 189 | static struct pci_controller hose = { |
| 190 | #ifndef CONFIG_PCI_PNP |
| 191 | config_table:pci_mpc85xxads_config_table, |
| 192 | #endif |
| 193 | }; |
| 194 | |
| 195 | #endif /* CONFIG_PCI */ |
| 196 | |
| 197 | |
| 198 | void pci_init_board (void) |
| 199 | { |
| 200 | #ifdef CONFIG_PCI |
| 201 | pci_mpc85xx_init (&hose); |
| 202 | #endif /* CONFIG_PCI */ |
| 203 | } |
| 204 | |
| 205 | #ifdef CONFIG_BOARD_EARLY_INIT_R |
| 206 | int board_early_init_r (void) |
| 207 | { |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 208 | volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); |
Detlev Zundel | 0244f67 | 2008-08-15 15:42:12 +0200 | [diff] [blame] | 209 | |
| 210 | /* set and reset the GPIO pin 2 which will reset the W83782G chip */ |
| 211 | out_8((unsigned char*)&gur->gpoutdr, 0x3F ); |
| 212 | out_be32((unsigned int*)&gur->gpiocr, 0x200 ); /* enable GPOut */ |
| 213 | udelay(200); |
| 214 | out_8( (unsigned char*)&gur->gpoutdr, 0x1F ); |
| 215 | |
Sergei Poselenov | f2bf96c | 2008-04-30 11:42:50 +0200 | [diff] [blame] | 216 | return (0); |
| 217 | } |
| 218 | #endif /* CONFIG_BOARD_EARLY_INIT_R */ |
Sergei Poselenov | 09842c5 | 2008-05-07 15:10:49 +0200 | [diff] [blame] | 219 | |
Robert P. J. Day | 3c75700 | 2016-05-19 15:23:12 -0400 | [diff] [blame] | 220 | #ifdef CONFIG_OF_BOARD_SETUP |
Simon Glass | 2aec3cc | 2014-10-23 18:58:47 -0600 | [diff] [blame] | 221 | int ft_board_setup(void *blob, bd_t *bd) |
Sergei Poselenov | 09842c5 | 2008-05-07 15:10:49 +0200 | [diff] [blame] | 222 | { |
Detlev Zundel | 0244f67 | 2008-08-15 15:42:12 +0200 | [diff] [blame] | 223 | u32 val[12]; |
| 224 | int rc, i = 0; |
Sergei Poselenov | 09842c5 | 2008-05-07 15:10:49 +0200 | [diff] [blame] | 225 | |
| 226 | ft_cpu_setup(blob, bd); |
| 227 | |
Detlev Zundel | 0244f67 | 2008-08-15 15:42:12 +0200 | [diff] [blame] | 228 | /* Fixup NOR FLASH mapping */ |
| 229 | val[i++] = 0; /* chip select number */ |
| 230 | val[i++] = 0; /* always 0 */ |
| 231 | val[i++] = gd->bd->bi_flashstart; |
| 232 | val[i++] = gd->bd->bi_flashsize; |
Sergei Poselenov | 09842c5 | 2008-05-07 15:10:49 +0200 | [diff] [blame] | 233 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 234 | if (mb862xx.frameAdrs == CONFIG_SYS_LIME_BASE) { |
Anatolij Gustschin | e6f5c91 | 2008-08-15 15:42:13 +0200 | [diff] [blame] | 235 | /* Fixup LIME mapping */ |
| 236 | val[i++] = 2; /* chip select number */ |
| 237 | val[i++] = 0; /* always 0 */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 238 | val[i++] = CONFIG_SYS_LIME_BASE; |
| 239 | val[i++] = CONFIG_SYS_LIME_SIZE; |
Anatolij Gustschin | e6f5c91 | 2008-08-15 15:42:13 +0200 | [diff] [blame] | 240 | } |
| 241 | |
Detlev Zundel | 0244f67 | 2008-08-15 15:42:12 +0200 | [diff] [blame] | 242 | /* Fixup FPGA mapping */ |
| 243 | val[i++] = 3; /* chip select number */ |
| 244 | val[i++] = 0; /* always 0 */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 245 | val[i++] = CONFIG_SYS_FPGA_BASE; |
| 246 | val[i++] = CONFIG_SYS_FPGA_SIZE; |
Sergei Poselenov | bc3d08d | 2008-06-06 15:42:45 +0200 | [diff] [blame] | 247 | |
Detlev Zundel | 0244f67 | 2008-08-15 15:42:12 +0200 | [diff] [blame] | 248 | rc = fdt_find_and_setprop(blob, "/localbus", "ranges", |
| 249 | val, i * sizeof(u32), 1); |
Sergei Poselenov | bc3d08d | 2008-06-06 15:42:45 +0200 | [diff] [blame] | 250 | if (rc) |
Detlev Zundel | 0244f67 | 2008-08-15 15:42:12 +0200 | [diff] [blame] | 251 | printf("Unable to update localbus ranges, err=%s\n", |
Sergei Poselenov | bc3d08d | 2008-06-06 15:42:45 +0200 | [diff] [blame] | 252 | fdt_strerror(rc)); |
Simon Glass | 2aec3cc | 2014-10-23 18:58:47 -0600 | [diff] [blame] | 253 | |
| 254 | return 0; |
Sergei Poselenov | 09842c5 | 2008-05-07 15:10:49 +0200 | [diff] [blame] | 255 | } |
Robert P. J. Day | 3c75700 | 2016-05-19 15:23:12 -0400 | [diff] [blame] | 256 | #endif /* CONFIG_OF_BOARD_SETUP */ |
Anatolij Gustschin | e6f5c91 | 2008-08-15 15:42:13 +0200 | [diff] [blame] | 257 | |
Anatolij Gustschin | e6f5c91 | 2008-08-15 15:42:13 +0200 | [diff] [blame] | 258 | #define DEFAULT_BRIGHTNESS 25 |
| 259 | #define BACKLIGHT_ENABLE (1 << 31) |
| 260 | |
Anatolij Gustschin | e6f5c91 | 2008-08-15 15:42:13 +0200 | [diff] [blame] | 261 | static const gdc_regs init_regs [] = |
| 262 | { |
| 263 | {0x0100, 0x00010f00}, |
| 264 | {0x0020, 0x801901df}, |
| 265 | {0x0024, 0x00000000}, |
| 266 | {0x0028, 0x00000000}, |
| 267 | {0x002c, 0x00000000}, |
| 268 | {0x0110, 0x00000000}, |
| 269 | {0x0114, 0x00000000}, |
| 270 | {0x0118, 0x01df0320}, |
| 271 | {0x0004, 0x041f0000}, |
| 272 | {0x0008, 0x031f031f}, |
| 273 | {0x000c, 0x017f0349}, |
| 274 | {0x0010, 0x020c0000}, |
| 275 | {0x0014, 0x01df01e9}, |
| 276 | {0x0018, 0x00000000}, |
| 277 | {0x001c, 0x01e00320}, |
| 278 | {0x0100, 0x80010f00}, |
| 279 | {0x0, 0x0} |
| 280 | }; |
| 281 | |
| 282 | const gdc_regs *board_get_regs (void) |
| 283 | { |
| 284 | return init_regs; |
| 285 | } |
| 286 | |
u-boot@bugs.denx.de | bbab0bc | 2008-09-11 15:40:01 +0200 | [diff] [blame] | 287 | int lime_probe(void) |
| 288 | { |
u-boot@bugs.denx.de | bbab0bc | 2008-09-11 15:40:01 +0200 | [diff] [blame] | 289 | uint cfg_br2; |
| 290 | uint cfg_or2; |
Wolfgang Grandegger | b890f9e | 2009-10-23 12:03:13 +0200 | [diff] [blame] | 291 | int type; |
u-boot@bugs.denx.de | bbab0bc | 2008-09-11 15:40:01 +0200 | [diff] [blame] | 292 | |
Becky Bruce | 0d4cee1 | 2010-06-17 11:37:20 -0500 | [diff] [blame] | 293 | cfg_br2 = get_lbc_br(2); |
| 294 | cfg_or2 = get_lbc_or(2); |
u-boot@bugs.denx.de | bbab0bc | 2008-09-11 15:40:01 +0200 | [diff] [blame] | 295 | |
| 296 | /* Configure GPCM for CS2 */ |
Becky Bruce | 0d4cee1 | 2010-06-17 11:37:20 -0500 | [diff] [blame] | 297 | set_lbc_br(2, 0); |
| 298 | set_lbc_or(2, 0xfc000410); |
| 299 | set_lbc_br(2, (CONFIG_SYS_LIME_BASE) | 0x00001901); |
u-boot@bugs.denx.de | bbab0bc | 2008-09-11 15:40:01 +0200 | [diff] [blame] | 300 | |
Wolfgang Grandegger | b890f9e | 2009-10-23 12:03:13 +0200 | [diff] [blame] | 301 | /* Get controller type */ |
| 302 | type = mb862xx_probe(CONFIG_SYS_LIME_BASE); |
u-boot@bugs.denx.de | bbab0bc | 2008-09-11 15:40:01 +0200 | [diff] [blame] | 303 | |
| 304 | /* Restore previous CS2 configuration */ |
Becky Bruce | 0d4cee1 | 2010-06-17 11:37:20 -0500 | [diff] [blame] | 305 | set_lbc_br(2, 0); |
| 306 | set_lbc_or(2, cfg_or2); |
| 307 | set_lbc_br(2, cfg_br2); |
Wolfgang Grandegger | b890f9e | 2009-10-23 12:03:13 +0200 | [diff] [blame] | 308 | |
| 309 | return (type == MB862XX_TYPE_LIME) ? 1 : 0; |
u-boot@bugs.denx.de | bbab0bc | 2008-09-11 15:40:01 +0200 | [diff] [blame] | 310 | } |
| 311 | |
Anatolij Gustschin | e6f5c91 | 2008-08-15 15:42:13 +0200 | [diff] [blame] | 312 | /* Returns Lime base address */ |
| 313 | unsigned int board_video_init (void) |
| 314 | { |
u-boot@bugs.denx.de | bbab0bc | 2008-09-11 15:40:01 +0200 | [diff] [blame] | 315 | if (!lime_probe()) |
Anatolij Gustschin | e6f5c91 | 2008-08-15 15:42:13 +0200 | [diff] [blame] | 316 | return 0; |
| 317 | |
Wolfgang Grandegger | b890f9e | 2009-10-23 12:03:13 +0200 | [diff] [blame] | 318 | mb862xx.winSizeX = 800; |
| 319 | mb862xx.winSizeY = 480; |
Anatolij Gustschin | e6f5c91 | 2008-08-15 15:42:13 +0200 | [diff] [blame] | 320 | mb862xx.gdfIndex = GDF_15BIT_555RGB; |
| 321 | mb862xx.gdfBytesPP = 2; |
| 322 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 323 | return CONFIG_SYS_LIME_BASE; |
Anatolij Gustschin | e6f5c91 | 2008-08-15 15:42:13 +0200 | [diff] [blame] | 324 | } |
| 325 | |
| 326 | #define W83782D_REG_CFG 0x40 |
| 327 | #define W83782D_REG_BANK_SEL 0x4e |
| 328 | #define W83782D_REG_ADCCLK 0x4b |
| 329 | #define W83782D_REG_BEEP_CTRL 0x4d |
| 330 | #define W83782D_REG_BEEP_CTRL2 0x57 |
| 331 | #define W83782D_REG_PWMOUT1 0x5b |
| 332 | #define W83782D_REG_VBAT 0x5d |
| 333 | |
| 334 | static int w83782d_hwmon_init(void) |
| 335 | { |
| 336 | u8 buf; |
| 337 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 338 | if (i2c_read(CONFIG_SYS_I2C_W83782G_ADDR, W83782D_REG_CFG, 1, &buf, 1)) |
Anatolij Gustschin | e6f5c91 | 2008-08-15 15:42:13 +0200 | [diff] [blame] | 339 | return -1; |
| 340 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 341 | i2c_reg_write(CONFIG_SYS_I2C_W83782G_ADDR, W83782D_REG_CFG, 0x80); |
| 342 | i2c_reg_write(CONFIG_SYS_I2C_W83782G_ADDR, W83782D_REG_BANK_SEL, 0); |
| 343 | i2c_reg_write(CONFIG_SYS_I2C_W83782G_ADDR, W83782D_REG_ADCCLK, 0x40); |
Anatolij Gustschin | e6f5c91 | 2008-08-15 15:42:13 +0200 | [diff] [blame] | 344 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 345 | buf = i2c_reg_read(CONFIG_SYS_I2C_W83782G_ADDR, W83782D_REG_BEEP_CTRL); |
| 346 | i2c_reg_write(CONFIG_SYS_I2C_W83782G_ADDR, W83782D_REG_BEEP_CTRL, |
Anatolij Gustschin | e6f5c91 | 2008-08-15 15:42:13 +0200 | [diff] [blame] | 347 | buf | 0x80); |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 348 | i2c_reg_write(CONFIG_SYS_I2C_W83782G_ADDR, W83782D_REG_BEEP_CTRL2, 0); |
| 349 | i2c_reg_write(CONFIG_SYS_I2C_W83782G_ADDR, W83782D_REG_PWMOUT1, 0x47); |
| 350 | i2c_reg_write(CONFIG_SYS_I2C_W83782G_ADDR, W83782D_REG_VBAT, 0x01); |
Anatolij Gustschin | e6f5c91 | 2008-08-15 15:42:13 +0200 | [diff] [blame] | 351 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 352 | buf = i2c_reg_read(CONFIG_SYS_I2C_W83782G_ADDR, W83782D_REG_CFG); |
| 353 | i2c_reg_write(CONFIG_SYS_I2C_W83782G_ADDR, W83782D_REG_CFG, |
Anatolij Gustschin | e6f5c91 | 2008-08-15 15:42:13 +0200 | [diff] [blame] | 354 | (buf & 0xf4) | 0x01); |
| 355 | return 0; |
| 356 | } |
| 357 | |
| 358 | static void board_backlight_brightness(int br) |
| 359 | { |
| 360 | u32 reg; |
| 361 | u8 buf; |
| 362 | u8 old_buf; |
| 363 | |
| 364 | /* Select bank 0 */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 365 | if (i2c_read(CONFIG_SYS_I2C_W83782G_ADDR, 0x4e, 1, &old_buf, 1)) |
Anatolij Gustschin | e6f5c91 | 2008-08-15 15:42:13 +0200 | [diff] [blame] | 366 | goto err; |
| 367 | else |
| 368 | buf = old_buf & 0xf8; |
| 369 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 370 | if (i2c_write(CONFIG_SYS_I2C_W83782G_ADDR, 0x4e, 1, &buf, 1)) |
Anatolij Gustschin | e6f5c91 | 2008-08-15 15:42:13 +0200 | [diff] [blame] | 371 | goto err; |
| 372 | |
| 373 | if (br > 0) { |
| 374 | /* PWMOUT1 duty cycle ctrl */ |
| 375 | buf = 255 / (100 / br); |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 376 | if (i2c_write(CONFIG_SYS_I2C_W83782G_ADDR, 0x5b, 1, &buf, 1)) |
Anatolij Gustschin | e6f5c91 | 2008-08-15 15:42:13 +0200 | [diff] [blame] | 377 | goto err; |
| 378 | |
| 379 | /* LEDs on */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 380 | reg = in_be32((void *)(CONFIG_SYS_FPGA_BASE + 0x0c)); |
Tom Rini | 9b88702 | 2017-05-08 22:14:19 -0400 | [diff] [blame] | 381 | if (!(reg & BACKLIGHT_ENABLE)) |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 382 | out_be32((void *)(CONFIG_SYS_FPGA_BASE + 0x0c), |
Anatolij Gustschin | e6f5c91 | 2008-08-15 15:42:13 +0200 | [diff] [blame] | 383 | reg | BACKLIGHT_ENABLE); |
| 384 | } else { |
| 385 | buf = 0; |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 386 | if (i2c_write(CONFIG_SYS_I2C_W83782G_ADDR, 0x5b, 1, &buf, 1)) |
Anatolij Gustschin | e6f5c91 | 2008-08-15 15:42:13 +0200 | [diff] [blame] | 387 | goto err; |
| 388 | |
| 389 | /* LEDs off */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 390 | reg = in_be32((void *)(CONFIG_SYS_FPGA_BASE + 0x0c)); |
Anatolij Gustschin | e6f5c91 | 2008-08-15 15:42:13 +0200 | [diff] [blame] | 391 | reg &= ~BACKLIGHT_ENABLE; |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 392 | out_be32((void *)(CONFIG_SYS_FPGA_BASE + 0x0c), reg); |
Anatolij Gustschin | e6f5c91 | 2008-08-15 15:42:13 +0200 | [diff] [blame] | 393 | } |
| 394 | /* Restore previous bank setting */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 395 | if (i2c_write(CONFIG_SYS_I2C_W83782G_ADDR, 0x4e, 1, &old_buf, 1)) |
Anatolij Gustschin | e6f5c91 | 2008-08-15 15:42:13 +0200 | [diff] [blame] | 396 | goto err; |
| 397 | |
| 398 | return; |
| 399 | err: |
| 400 | printf("W83782G I2C access failed\n"); |
| 401 | } |
| 402 | |
| 403 | void board_backlight_switch (int flag) |
| 404 | { |
| 405 | char * param; |
| 406 | int rc; |
| 407 | |
| 408 | if (w83782d_hwmon_init()) |
| 409 | printf ("hwmon IC init failed\n"); |
| 410 | |
| 411 | if (flag) { |
Simon Glass | 64b723f | 2017-08-03 12:22:12 -0600 | [diff] [blame] | 412 | param = env_get("brightness"); |
Anatolij Gustschin | e6f5c91 | 2008-08-15 15:42:13 +0200 | [diff] [blame] | 413 | rc = param ? simple_strtol(param, NULL, 10) : -1; |
| 414 | if (rc < 0) |
| 415 | rc = DEFAULT_BRIGHTNESS; |
| 416 | } else { |
| 417 | rc = 0; |
| 418 | } |
| 419 | board_backlight_brightness(rc); |
| 420 | } |
| 421 | |
| 422 | #if defined(CONFIG_CONSOLE_EXTRA_INFO) |
| 423 | /* |
| 424 | * Return text to be printed besides the logo. |
| 425 | */ |
| 426 | void video_get_info_str (int line_number, char *info) |
| 427 | { |
| 428 | if (line_number == 1) { |
| 429 | strcpy (info, " Board: Socrates"); |
| 430 | } else { |
| 431 | info [0] = '\0'; |
| 432 | } |
| 433 | } |
| 434 | #endif |