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git01.mediatek.com / filogic / uboot / 9030f69485dea1dde3afafc1e7a7fbe0a77905f8 / . / arch / x86 / include / asm / arch-quark / acpi / southcluster.asl
blob: a89cfaf8af1c05ff7f5379818a092e772d7dde61 [file] [log] [blame]
Bin Meng1dd2f672016-05-25 19:19:10 -0700[diff] [blame]1/*
2 * Copyright (C) 2016, Bin Meng <bmeng.cn@gmail.com>
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6
7Device (PCI0)
8{
9 Name(_HID, EISAID("PNP0A08")) /* PCIe */
10 Name(_CID, EISAID("PNP0A03")) /* PCI */
11
12 Name(_ADR, 0)
13 Name(_BBN, 0)
14
15 Name(MCRS, ResourceTemplate()
16 {
17 /* Bus Numbers */
18 WordBusNumber(ResourceProducer, MinFixed, MaxFixed, PosDecode,
19 0x0000, 0x0000, 0x00ff, 0x0000, 0x0100, , , PB00)
20
21 /* IO Region 0 */
22 WordIO(ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,
23 0x0000, 0x0000, 0x0cf7, 0x0000, 0x0cf8, , , PI00)
24
25 /* PCI Config Space */
26 IO(Decode16, 0x0cf8, 0x0cf8, 0x0001, 0x0008)
27
28 /* IO Region 1 */
29 WordIO(ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,
30 0x0000, 0x0d00, 0xffff, 0x0000, 0xf300, , , PI01)
31
32 /* VGA memory (0xa0000-0xbffff) */
33 DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed,
34 Cacheable, ReadWrite,
35 0x00000000, 0x000a0000, 0x000bffff, 0x00000000,
36 0x00020000, , , ASEG)
37
38 /* OPROM reserved (0xc0000-0xc3fff) */
39 DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed,
40 Cacheable, ReadWrite,
41 0x00000000, 0x000c0000, 0x000c3fff, 0x00000000,
42 0x00004000, , , OPR0)
43
44 /* OPROM reserved (0xc4000-0xc7fff) */
45 DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed,
46 Cacheable, ReadWrite,
47 0x00000000, 0x000c4000, 0x000c7fff, 0x00000000,
48 0x00004000, , , OPR1)
49
50 /* OPROM reserved (0xc8000-0xcbfff) */
51 DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed,
52 Cacheable, ReadWrite,
53 0x00000000, 0x000c8000, 0x000cbfff, 0x00000000,
54 0x00004000, , , OPR2)
55
56 /* OPROM reserved (0xcc000-0xcffff) */
57 DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed,
58 Cacheable, ReadWrite,
59 0x00000000, 0x000cc000, 0x000cffff, 0x00000000,
60 0x00004000, , , OPR3)
61
62 /* OPROM reserved (0xd0000-0xd3fff) */
63 DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed,
64 Cacheable, ReadWrite,
65 0x00000000, 0x000d0000, 0x000d3fff, 0x00000000,
66 0x00004000, , , OPR4)
67
68 /* OPROM reserved (0xd4000-0xd7fff) */
69 DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed,
70 Cacheable, ReadWrite,
71 0x00000000, 0x000d4000, 0x000d7fff, 0x00000000,
72 0x00004000, , , OPR5)
73
74 /* OPROM reserved (0xd8000-0xdbfff) */
75 DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed,
76 Cacheable, ReadWrite,
77 0x00000000, 0x000d8000, 0x000dbfff, 0x00000000,
78 0x00004000, , , OPR6)
79
80 /* OPROM reserved (0xdc000-0xdffff) */
81 DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed,
82 Cacheable, ReadWrite,
83 0x00000000, 0x000dc000, 0x000dffff, 0x00000000,
84 0x00004000, , , OPR7)
85
86 /* BIOS Extension (0xe0000-0xe3fff) */
87 DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed,
88 Cacheable, ReadWrite,
89 0x00000000, 0x000e0000, 0x000e3fff, 0x00000000,
90 0x00004000, , , ESG0)
91
92 /* BIOS Extension (0xe4000-0xe7fff) */
93 DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed,
94 Cacheable, ReadWrite,
95 0x00000000, 0x000e4000, 0x000e7fff, 0x00000000,
96 0x00004000, , , ESG1)
97
98 /* BIOS Extension (0xe8000-0xebfff) */
99 DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed,
100 Cacheable, ReadWrite,
101 0x00000000, 0x000e8000, 0x000ebfff, 0x00000000,
102 0x00004000, , , ESG2)
103
104 /* BIOS Extension (0xec000-0xeffff) */
105 DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed,
106 Cacheable, ReadWrite,
107 0x00000000, 0x000ec000, 0x000effff, 0x00000000,
108 0x00004000, , , ESG3)
109
110 /* System BIOS (0xf0000-0xfffff) */
111 DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed,
112 Cacheable, ReadWrite,
113 0x00000000, 0x000f0000, 0x000fffff, 0x00000000,
114 0x00010000, , , FSEG)
115
116 /* PCI Memory Region (TOLM-CONFIG_MMCONF_BASE_ADDRESS) */
117 DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed,
118 Cacheable, ReadWrite,
119 0x00000000, 0x00000000, 0x00000000, 0x00000000,
120 0x00000000, , , PMEM)
121 })
122
123 Method(_CRS, 0, Serialized)
124 {
125 /* Update PCI resource area */
126 CreateDwordField(MCRS, ^PMEM._MIN, PMIN)
127 CreateDwordField(MCRS, ^PMEM._MAX, PMAX)
128 CreateDwordField(MCRS, ^PMEM._LEN, PLEN)
129
130 /*
131 * Hardcode TOLM to 2GB for now (see DRAM_MAX_SIZE in quark.h)
132 *
133 * TODO: for generic usage, read TOLM value from register, or
134 * from global NVS (not implemented by U-Boot yet).
135 */
136 Store(0x80000000, PMIN)
137 Store(Subtract(MCFG_BASE_ADDRESS, 1), PMAX)
138 Add(Subtract(PMAX, PMIN), 1, PLEN)
139
140 Return (MCRS)
141 }
142
143 /* Device Resource Consumption */
144 Device (PDRC)
145 {
146 Name(_HID, EISAID("PNP0C02"))
147 Name(_UID, 1)
148
149 Name(PDRS, ResourceTemplate() {
150 Memory32Fixed(ReadWrite, CONFIG_ESRAM_BASE, 0x80000)
151 Memory32Fixed(ReadWrite, MCFG_BASE_ADDRESS, MCFG_BASE_SIZE)
152 Memory32Fixed(ReadWrite, RCBA_BASE_ADDRESS, RCBA_BASE_SIZE)
153 IO(Decode16, SPI_DMA_BASE_ADDRESS, SPI_DMA_BASE_ADDRESS, 0x0010, SPI_DMA_BASE_SIZE)
154 IO(Decode16, GPIO_BASE_ADDRESS, GPIO_BASE_ADDRESS, 0x0080, GPIO_BASE_SIZE)
155 IO(Decode16, WDT_BASE_ADDRESS, WDT_BASE_ADDRESS, 0x0040, WDT_BASE_SIZE)
156 })
157
158 /* Current Resource Settings */
159 Method(_CRS, 0, Serialized)
160 {
161 Return (PDRS)
162 }
163 }
164
165 Method(_OSC, 4)
166 {
167 /* Check for proper GUID */
168 If (LEqual(Arg0, ToUUID("33DB4D5B-1FF7-401C-9657-7441C03DD766"))) {
169 /* Let OS control everything */
170 Return (Arg3)
171 } Else {
172 /* Unrecognized UUID */
173 CreateDWordField(Arg3, 0, CDW1)
174 Or(CDW1, 4, CDW1)
175 Return (Arg3)
176 }
177 }
178
179 /* LPC Bridge 0:1f.0 */
180 #include "lpc.asl"
181
182 /* IRQ routing for each PCI device */
183 #include <asm/acpi/irqroute.asl>
184}